-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Friday, February 27, 2015 7:41 AM
To: Wu, Feng
Cc: t...@linutronix.de; mi...@redhat.com; h...@zytor.com; x...@kernel.org;
g...@kernel.org; pbonz...@redhat.com; dw...@infradead.org;
j...@8bytes.org;
From: Antonios Motakis a.mota...@virtualopensystems.com
Return information for the interrupts exposed by the device.
This patch extends VFIO_DEVICE_GET_INFO with the number of IRQs
and enables VFIO_DEVICE_GET_IRQ_INFO.
Signed-off-by: Antonios Motakis a.mota...@virtualopensystems.com
From: Antonios Motakis a.mota...@virtualopensystems.com
Replace the function vfio_domains_have_iommu_cache() with a more generic
function vfio_domains_have_iommu_cap() which allows to check all domains
of an vfio_iommu structure for a given cached capability.
Signed-off-by: Antonios Motakis
From: Antonios Motakis a.mota...@virtualopensystems.com
VFIO returns a file descriptor which we can use to manipulate the memory
regions of the device. Usually, the user will mmap memory regions that are
addressable on page boundaries, however for memory regions where this is
not the case we
From: Antonios Motakis a.mota...@virtualopensystems.com
VFIO_IOMMU_TYPE1 keeps track for each domain it knows a list of protection
flags it always applies to all mappings in the domain. This is used for
domains that support IOMMU_CAP_CACHE_COHERENCY.
Refactor this slightly, by keeping track
From: Antonios Motakis a.mota...@virtualopensystems.com
Enable building the VFIO PLATFORM driver that allows to use Linux platform
devices with VFIO.
Signed-off-by: Antonios Motakis a.mota...@virtualopensystems.com
Signed-off-by: Baptiste Reynal b.rey...@virtualopensystems.com
---
This patch is a fix to iommu/arm-smmu: add support for iova_to_phys
through ATS1PR.
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
Signed-off-by: Baptiste Reynal b.rey...@virtualopensystems.com
---
From: Antonios Motakis a.mota...@virtualopensystems.com
Currently a VFIO driver's IOMMU capabilities are encoded as a series of
numerical defines. Replace this with an enum for future maintainability.
Signed-off-by: Antonios Motakis a.mota...@virtualopensystems.com
Signed-off-by: Baptiste Reynal
From: Antonios Motakis a.mota...@virtualopensystems.com
Now we have finally completely decoupled virqfd from VFIO_PCI. We can
initialize it from the VFIO generic code, in order to safely use it from
multiple independent VFIO bus drivers.
Signed-off-by: Antonios Motakis
From: Antonios Motakis a.mota...@virtualopensystems.com
With this patch the VFIO user will be able to set an eventfd that can be
used in order to mask and unmask IRQs of platform devices.
Signed-off-by: Antonios Motakis a.mota...@virtualopensystems.com
Signed-off-by: Baptiste Reynal
From: Antonios Motakis a.mota...@virtualopensystems.com
The Virqfd code needs to keep accesses to any struct *virqfd safe, but
this comes into play only when creating or destroying eventfds, so sharing
the same spinlock with the VFIO bus driver is not necessary.
Signed-off-by: Antonios Motakis
From: Antonios Motakis a.mota...@virtualopensystems.com
Level sensitive interrupts are exposed as maskable and automasked
interrupts and are masked and disabled automatically when they fire.
Signed-off-by: Antonios Motakis a.mota...@virtualopensystems.com
[Baptiste Reynal: Move masked interrupt
From: Antonios Motakis a.mota...@virtualopensystems.com
A VFIO userspace driver will start by opening the VFIO device
that corresponds to an IOMMU group, and will use the ioctl interface
to get the basic device info, such as number of memory regions and
interrupts, and their properties. This
From: Antonios Motakis a.mota...@virtualopensystems.com
Some IOMMU drivers, such as the ARM SMMU driver, make available the
IOMMU_NOEXEC flag to set the page tables for a device as XN (execute never).
This affects devices such as the ARM PL330 DMA Controller, which respects
this flag and will
On Mon, Mar 02, 2015 at 04:57:22PM +, Baptiste Reynal wrote:
This patch is a fix to iommu/arm-smmu: add support for iova_to_phys
through ATS1PR.
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
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