On 2016-07-14 07:21, Auger Eric wrote:
Hi Robin, Nate,
On 14/07/2016 12:36, Robin Murphy wrote:
On 14/07/16 09:34, Joerg Roedel wrote:
On Wed, Jul 13, 2016 at 02:49:32PM -0400, Nate Watterson wrote:
Passing a NULL or uninitialized iova_domain into put_iova_domain
will currently crash the
On 2016-07-14 09:31, Will Deacon wrote:
On Tue, Jul 12, 2016 at 02:19:20PM -0400, Nate Watterson wrote:
In the current arm-smmu-v3 driver, all smmus that support 2-level
stream tables are being forced to use them. This is suboptimal for
smmus that support fewer stream id bits than would fill in
Hello Marek,
I've tested the patchset on 4.7-rc7 and noticed that it breaks reboot on
my ODROID-X2.
Going to check where exactly things break.
With best wishes,
Tobias
Marek Szyprowski wrote:
> Hello,
>
> This patch series finally implements proper runtime PM support in Exynos
> IOMMU
On Tue, Jul 12, 2016 at 02:19:20PM -0400, Nate Watterson wrote:
> In the current arm-smmu-v3 driver, all smmus that support 2-level
> stream tables are being forced to use them. This is suboptimal for
> smmus that support fewer stream id bits than would fill in a single
> second level table. This
Hi Robin, Nate,
On 14/07/2016 12:36, Robin Murphy wrote:
> On 14/07/16 09:34, Joerg Roedel wrote:
>> On Wed, Jul 13, 2016 at 02:49:32PM -0400, Nate Watterson wrote:
>>> Passing a NULL or uninitialized iova_domain into put_iova_domain
>>> will currently crash the kernel when the unconfigured
On 14/07/16 09:34, Joerg Roedel wrote:
> On Wed, Jul 13, 2016 at 02:49:32PM -0400, Nate Watterson wrote:
>> Passing a NULL or uninitialized iova_domain into put_iova_domain
>> will currently crash the kernel when the unconfigured iova_domain
>> data members are accessed. To prevent this from
On Wed, Jul 13, 2016 at 02:49:32PM -0400, Nate Watterson wrote:
> Passing a NULL or uninitialized iova_domain into put_iova_domain
> will currently crash the kernel when the unconfigured iova_domain
> data members are accessed. To prevent this from occurring, this patch
> adds a check to make sure
On Wed, Jul 13, 2016 at 05:04:08PM -0600, Alex Williamson wrote:
> With hpwdt disabled, can you reboot a few times and look for DMAR
> faults in the dmesg to see if they're all consistent, ie. device 1e.0
> doing a read from 0xb000? Is there any correlation to radeon hanging
> and one of those
On Wed, Jul 13, 2016 at 01:53:21PM +, Wei Yang wrote:
> In 'commit <55d940430ab9> ("iommu/vt-d: Get rid of domain->iommu_lock")',
> the error handling path is changed a little, which makes the function
> always return 0.
>
> This path fixes this.
>
> Signed-off-by: Wei Yang
