RE: [RESEND PATCH V6 0/6] Add support for privileged mappings

Hi Robin, >Hi Robin, > Hi Sricharan, On 02/12/16 14:55, Sricharan R wrote: > This series is a resend of the V5 that Mitch sent sometime back [2] > All the patches are the same and i have just rebased. Not sure why this > finally did not make it last time. The last

[PATCH V7 6/8] dmaengine: pl330: Make sure microcode is privileged

From: Mitchel Humpherys The PL330 is hard-wired such that instruction fetches on both the manager and channel threads go out onto the bus with the "privileged" bit set. This can become troublesome once there is an IOMMU or other form of memory protection downstream,

[PATCH V7 8/8] iommu/arm-smmu: Revert "iommu/arm-smmu: Set PRIVCFG in stage 1 STEs"

From: Robin Murphy Now that proper privileged mappings can be requested via IOMMU_PRIV, unconditionally overriding the incoming PRIVCFG becomes the wrong thing to do, so stop it. This reverts commit df5e1a0f2a2d779ad467a691203bcbc74d75690e. Signed-off-by: Robin Murphy

[PATCH V7 5/8] arm64/dma-mapping: Implement DMA_ATTR_PRIVILEGED

From: Mitchel Humpherys The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that are only accessible to privileged DMA engines. Implement it in dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it. Reviewed-by: Robin Murphy

[PATCH V7 4/8] common: DMA-mapping: add DMA_ATTR_PRIVILEGED attribute

From: Mitchel Humpherys This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping subsystem. Some advanced peripherals such as remote processors and GPUs perform accesses to DMA buffers in both privileged "supervisor" and unprivileged "user" modes. This

[PATCH V7 3/8] iommu/io-pgtable-arm-v7s: Add support for the IOMMU_PRIV flag

From: Robin Murphy The short-descriptor format also allows privileged-only mappings, so let's wire it up. Signed-off-by: Robin Murphy Tested-by: Sricharan R --- drivers/iommu/io-pgtable-arm-v7s.c | 6 +- 1 file

[PATCH V7 2/8] iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag

From: Jeremy Gebben Allow the creation of privileged mode mappings, for stage 1 only. Reviewed-by: Robin Murphy Tested-by: Robin Murphy Acked-by: Will Deacon Signed-off-by: Jeremy Gebben

Re: [PATCH v2] iommu/intel-iommu: fix pasid table size encoding

Hi Joerg/David, Just wondering if you have any more comments? Thanks, Jacob On Tue, 6 Dec 2016 10:14:23 -0800 Jacob Pan wrote: > Different encodings are used to represent supported PASID bits > and number of PASID table entries. > The current code assigns

[PATCH] iommu/amd: fix the left value check of cmd buffer

The generic command buffer entry is 128 bits (16 bytes), so the offset of tail and head pointer should be 16 bytes aligned and increased with 0x10 per command. When cmd buf is full, head = (tail + 0x10) % CMD_BUFFER_SIZE. So when left space of cmd buf should be able to store only two command, we

Re: [RFC v3 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions

Hi Don, On 11/12/2016 03:05, Don Dutile wrote: > On 12/08/2016 04:36 AM, Auger Eric wrote: >> Hi, >> >> On 15/11/2016 14:09, Eric Auger wrote: >>> Following LPC discussions, we now report reserved regions through >>> iommu-group sysfs reserved_regions attribute file. >> >> >> While I am