RE: [RFC v4 00/16] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions

Hi Eric, Tested this series on NXP ARMv8 platform. Thanks -Bharat > -Original Message- > From: Eric Auger [mailto:eric.au...@redhat.com] > Sent: Wednesday, December 14, 2016 2:00 AM > To: eric.au...@redhat.com; eric.auger@gmail.com; > christoffer.d...@linaro.org;

Re: [PATCH] Docs: dt: Be explicit and consistent in reference to IOMMU specifiers

On Thu, Dec 15, 2016 at 06:16:13PM -0600, Stuart Yoder wrote: > The generic IOMMU binding says that the meaning of an 'IOMMU specifier' > is defined by the binding of a specific SMMU. The ARM SMMU binding > never explicitly uses the term 'specifier' at all. Update implicit > references to use

possible dmar_init_reserved_ranges() error

Hi guys, I have some questions about dmar_init_reserved_ranges(). On systems where CPU physical address space is not identity-mapped to PCI bus address space, e.g., where the PCI host bridge windows have _TRA offsets, I'm not sure we're doing the right thing. Assume we have a PCI host bridge

[PATCH] iommu/arm-smmu-v3: prevent corruption of ste stage-1 context ptr

To ensure that the stage-1 context ptr for an ste points to the intended context descriptor, this patch adds code to clear away the stale context ptr value prior to or'ing in the new one. Signed-off-by: Nate Watterson --- drivers/iommu/arm-smmu-v3.c | 2 ++ 1 file

[PATCH] iommu/arm-smmu-v3: avoid over allocating for l2 stream tables

Currently, all l2 stream tables are being allocated with space for (1<

[PATCH] iommu/iova: use rb_entry()

To make the code clearer, use rb_entry() instead of container_of() to deal with rbtree. Signed-off-by: Geliang Tang --- drivers/iommu/iova.c | 23 +++ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/iova.c

RE: [PATCH 3/4] iommu/arm-smmu: Disable stalling faults for all endpoints

Hi Will, >On Tue, Dec 06, 2016 at 06:30:21PM -0500, Rob Clark wrote: >> On Thu, Aug 18, 2016 at 9:05 AM, Will Deacon wrote: >> > Enabling stalling faults can result in hardware deadlock on poorly >> > designed systems, particularly those with a PCI root complex upstream of