On 07/27/17 at 05:53pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:59:07PM +0800, Baoquan He wrote:
> > +static bool amd_iommu_is_attach_deferred(struct iommu_domain *domain,
> > +struct device *dev)
> > +{
> > + struct iommu_dev_data *dev_data =
On 07/27/17 at 05:29pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:59:03PM +0800, Baoquan He wrote:
> > Add function copy_dev_tables to copy the old DEV table entries of the
> > panicked
>
> Since there is only one (for now), you can name the function in
> singular: copy_dev_table() or
On 07/27/17 at 05:06pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:59:00PM +0800, Baoquan He wrote:
> > Move single iommu enabling codes into a wrapper function
> > early_enable_iommu().
> > This can make later kdump change easier.
> >
> > And also add iommu_disable_command_buffer and
On 07/27/17 at 05:04pm, Joerg Roedel wrote:
> On Fri, Jul 21, 2017 at 04:58:59PM +0800, Baoquan He wrote:
> > diff --git a/drivers/iommu/amd_iommu_types.h
> > b/drivers/iommu/amd_iommu_types.h
> > index 294a409e283b..d15966b62b33 100644
> > --- a/drivers/iommu/amd_iommu_types.h
> > +++
On Thu, 2017-07-27 at 17:42 +0200, Matthias Brugger wrote:
>
> On 07/27/2017 04:01 AM, honghui.zh...@mediatek.com wrote:
> > From: Honghui Zhang
> >
> > In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
> > the larb->larbid was added but not
On Thu, 2017-07-27 at 14:58 +0200, Joerg Roedel wrote:
> On Thu, Jul 27, 2017 at 10:01:09AM +0800, honghui.zh...@mediatek.com wrote:
> > From: Honghui Zhang
> >
> > Mediatek's gen1 smi need the hardware larbid to identify the offset for
> > the register which controls
tree: https://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git core
head: 6bd4f1c754b2fafac403073b0d8469bed1d37e2d
commit: d87beb749281404b4b4919930b1cc6352e3746f2 [1/3] iommu/of: Handle PCI
aliases properly
coccinelle warnings: (new ones prefixed by >>)
>>
On 20/07/17 22:49, Sakari Ailus wrote:
> Hi Robin,
>
> On Wed, Jul 19, 2017 at 02:37:12PM +0100, Robin Murphy wrote:
> ...
>>> +static int ipu3_mmu_map(struct iommu_domain *domain, unsigned long iova,
>>> + phys_addr_t paddr, size_t size, int prot)
>>> +{
>>> + struct
On Fri, Jul 21, 2017 at 04:59:09PM +0800, Baoquan He wrote:
> When iommu is pre_enabled in kdump kernel, if a device is set up with
> guest translations (DTE.GV=1), then don't copy GCR3 table root pointer
> but move the device over to an empty guest-cr3 table and handle the
> faults in the PPR log
On Fri, Jul 21, 2017 at 04:59:08PM +0800, Baoquan He wrote:
> AMD pointed out it's unsafe to update the device-table while iommu
> is enabled. It turns out that device-table pointer update is split
> up into two 32bit writes in the IOMMU hardware. So updating it while
> the IOMMU is enabled could
On Fri, Jul 21, 2017 at 04:59:07PM +0800, Baoquan He wrote:
> +static bool amd_iommu_is_attach_deferred(struct iommu_domain *domain,
> + struct device *dev)
> +{
> + struct iommu_dev_data *dev_data = dev->archdata.iommu;
> + return
On Fri, Jul 21, 2017 at 04:59:04PM +0800, Baoquan He wrote:
> @@ -2128,9 +2131,43 @@ static void early_enable_iommu(struct amd_iommu *iommu)
> static void early_enable_iommus(void)
> {
> struct amd_iommu *iommu;
> + bool is_pre_enabled = false;
>
> - for_each_iommu(iommu)
> -
On Fri, Jul 21, 2017 at 04:59:03PM +0800, Baoquan He wrote:
> Add function copy_dev_tables to copy the old DEV table entries of the panicked
Since there is only one (for now), you can name the function in
singular: copy_dev_table() or copy_device_table().
> kernel to the new allocated DEV table.
On Fri, Jul 21, 2017 at 04:59:00PM +0800, Baoquan He wrote:
> Move single iommu enabling codes into a wrapper function early_enable_iommu().
> This can make later kdump change easier.
>
> And also add iommu_disable_command_buffer and iommu_disable_event_buffer
> for later usage.
>
>
On Fri, Jul 21, 2017 at 04:58:59PM +0800, Baoquan He wrote:
> diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
> index 294a409e283b..d15966b62b33 100644
> --- a/drivers/iommu/amd_iommu_types.h
> +++ b/drivers/iommu/amd_iommu_types.h
> @@ -417,6 +417,7 @@ extern struct
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: Thursday, July 27, 2017 12:13 PM
> To: Shameerali Kolothum Thodi; Lorenzo Pieralisi
> Cc: Guohanjun (Hanjun Guo); Gabriele Paoloni; marc.zyng...@arm.com;
> John Garry; will.dea...@arm.com; Linuxarm;
On Thu, Jul 27, 2017 at 10:01:09AM +0800, honghui.zh...@mediatek.com wrote:
> From: Honghui Zhang
>
> Mediatek's gen1 smi need the hardware larbid to identify the offset for
> the register which controls whether enable iommu for this larb.
> In the commit 3c8f4ad85c4b
On Thu, Jul 27, 2017 at 02:26:26PM +0200, Heiko Stübner wrote:
> Am Donnerstag, 27. Juli 2017, 14:15:18 CEST schrieb Joerg Roedel:
> > ARM64: dts: rockchip: rk3328 add iommu nodes
> > ARM: dts: rockchip: rk322x add iommu nodes
> > ARM64: dts: rockchip: rk3368 add iommu nodes
> > ARM64: dts:
Hi Joerg,
Am Donnerstag, 27. Juli 2017, 14:15:18 CEST schrieb Joerg Roedel:
> Hey Heiko,
>
> On Wed, Jul 26, 2017 at 03:53:06PM +0200, Heiko Stübner wrote:
> > Having code and dts changes go through different trees is no problem, as
> > they don't have a compile-time dependencies on each other
Hey Heiko,
On Wed, Jul 26, 2017 at 03:53:06PM +0200, Heiko Stübner wrote:
> Having code and dts changes go through different trees is no problem, as they
> don't have a compile-time dependencies on each other and come together nicely
> in linux-next again.
Okay, I removed
ARM64: dts:
On 27/07/17 10:13, Shameerali Kolothum Thodi wrote:
>
>
>> -Original Message-
>> From: Lorenzo Pieralisi [mailto:lorenzo.pieral...@arm.com]
>> Sent: Wednesday, July 26, 2017 10:52 AM
>> To: Robin Murphy
>> Cc: Shameerali Kolothum Thodi; marc.zyng...@arm.com;
>> sudeep.ho...@arm.com;
> -Original Message-
> From: Lorenzo Pieralisi [mailto:lorenzo.pieral...@arm.com]
> Sent: Wednesday, July 26, 2017 10:52 AM
> To: Robin Murphy
> Cc: Shameerali Kolothum Thodi; marc.zyng...@arm.com;
> sudeep.ho...@arm.com; will.dea...@arm.com; hanjun@linaro.org;
> Gabriele Paoloni;
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