Hi,
On 05/15/2018 04:55 AM, Jacob Pan wrote:
> On Mon, 14 May 2018 14:01:06 +0800
> Lu Baolu wrote:
>
>> Hi,
>>
>> On 05/12/2018 04:54 AM, Jacob Pan wrote:
>>> Traditionally, device specific faults are detected and handled
>>> within their own device drivers. When IOMMU is enabled, faults such
>>
On Fri, 2018-05-11 at 09:59 +0200, Christoph Hellwig wrote:
> Switch to the generic noncoherent direct mapping implementation.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/c6x/Kconfig | 3 +
> arch/c6x/include/asm/Kbuild| 1 +
> arch/c6x/include/asm/dma-mapping
On 05/14/2018 01:00 PM, Gary R Hook wrote:
> On 05/14/2018 12:50 PM, Randy Dunlap wrote:
>> On 05/14/2018 10:20 AM, Gary R Hook wrote:
>>> Implement a skeleton framework for debugfs support in the
>>> AMD IOMMU.
>>>
>>> Signed-off-by: Gary R Hook
>>> ---
>>> drivers/iommu/Makefile |
On Mon, 14 May 2018 14:01:06 +0800
Lu Baolu wrote:
> Hi,
>
> On 05/12/2018 04:54 AM, Jacob Pan wrote:
> > Traditionally, device specific faults are detected and handled
> > within their own device drivers. When IOMMU is enabled, faults such
> > as DMA related transactions are detected by IOMMU.
On Mon, 14 May 2018 13:27:13 +0800
Lu Baolu wrote:
> Hi,
>
> On 05/12/2018 04:54 AM, Jacob Pan wrote:
> > DMA faults can be detected by IOMMU at device level. Adding a
> > pointer to struct device allows IOMMU subsystem to report relevant
> > faults back to the device driver for further handling
On Mon, 14 May 2018 11:35:05 +0800
Lu Baolu wrote:
> > + switch (inv_info->hdr.type) {
> > + case IOMMU_INV_TYPE_TLB:
> > + if (inv_info->size &&
> > + (inv_info->addr & ((1 << (VTD_PAGE_SHIFT +
> > inv_info->size)) - 1))) {
> > + pr_err("Addr out
On Mon, 14 May 2018 10:18:44 +0800
Lu Baolu wrote:
> Hi,
>
> On 05/12/2018 04:54 AM, Jacob Pan wrote:
> > When Shared Virtual Memory is exposed to a guest via vIOMMU,
> > extended IOTLB invalidation may be passed down from outside IOMMU
> > subsystems. This patch adds invalidation functions that
On Mon, 14 May 2018 09:52:04 +0800
Lu Baolu wrote:
> > diff --git a/drivers/iommu/intel-iommu.c
> > b/drivers/iommu/intel-iommu.c index 4623294..732a10f 100644
> > --- a/drivers/iommu/intel-iommu.c
> > +++ b/drivers/iommu/intel-iommu.c
> > @@ -1459,6 +1459,19 @@ static void iommu_enable_dev_iotlb
On Mon, 14 May 2018 09:36:08 +0800
Lu Baolu wrote:
> Hi,
>
> On 05/12/2018 04:53 AM, Jacob Pan wrote:
> > When SRIOV VF device IOTLB is invalidated, we need to provide
> > the PF source ID such that IOMMU hardware can gauge the depth
> > of invalidation queue which is shared among VFs. This is n
On Sun, 13 May 2018 17:29:47 +0800
Lu Baolu wrote:
> Hi,
>
> On 05/12/2018 04:53 AM, Jacob Pan wrote:
> > Add Intel VT-d ops to the generic iommu_bind_pasid_table API
> > functions.
> >
> > The primary use case is for direct assignment of SVM capable
> > device. Originated from emulated IOMMU in
On 05/14/2018 12:50 PM, Randy Dunlap wrote:
On 05/14/2018 10:20 AM, Gary R Hook wrote:
Implement a skeleton framework for debugfs support in the
AMD IOMMU.
Signed-off-by: Gary R Hook
---
drivers/iommu/Makefile|5 +
drivers/iommu/amd_iommu_debugfs.c | 39 +++
Hello Arindam,
There is a bug report[0] that you created a patch[1] for a while back.
However, the patch never landed in mainline. There is a bug reporter in
Ubuntu[2] that is affected by this bug and is willing to test the
patch. I attempted to build a test kernel with the patch, but it does
n
On Sun, 13 May 2018 16:01:50 +0800
Lu Baolu wrote:
> > + u8 pasid_table_bound:1;
>
> Can you please add some comments here? So that, people can
> understand the purpose for this bit exactly.
will do. I will add:
u8 pasid_table_bound:1; /* PASID table is bound to a guest */
__
On Sun, 13 May 2018 15:33:23 +0800
Lu Baolu wrote:
> Hi,
>
> On 05/12/2018 04:53 AM, Jacob Pan wrote:
> > Adding a flag in device domain into to track whether a guest or
> typo: ^^info
>
good catch, will fix. thanks
> Best regards,
> Lu Baolu
>
> [...]
On Mon, 14 May 2018 06:56:11 +
"Liu, Yi L" wrote:
> Same comment with the one to patch 16, pci_get_bus_and_slot() is
> deprecated, may update accordingly.
yes, it has been updated in v5, could you review v5?
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On 11/05/18 21:05, Dmitry Osipenko wrote:
On 11.05.2018 15:32, Robin Murphy wrote:
On 08/05/18 19:16, Dmitry Osipenko wrote:
GART aperture is shared by all devices, hence there is a single IOMMU
domain and group shared by these devices. Allocation of a group per
device only wastes resources and
On 05/14/2018 10:20 AM, Gary R Hook wrote:
> Implement a skeleton framework for debugfs support in the
> AMD IOMMU.
>
> Signed-off-by: Gary R Hook
> ---
> drivers/iommu/Makefile|5 +
> drivers/iommu/amd_iommu_debugfs.c | 39
> +
> driver
Implement a skeleton framework for debugfs support in the
AMD IOMMU.
Signed-off-by: Gary R Hook
---
drivers/iommu/Makefile|5 +
drivers/iommu/amd_iommu_debugfs.c | 39 +
drivers/iommu/amd_iommu_init.c|6 --
drivers/iommu/amd_i
Provide base enablement for using debugfs to expose internal data of an
IOMMU driver. When called, create the /sys/kernel/debug/iommu directory.
Emit a strong warning at boot time to indicate that this feature is
enabled.
This function is called from iommu_init, and creates the initial DebugFS
di
These patches create a top-level function, called at IOMMU
initialization, to create a debugfs directory for the IOMMU. Under
this directory drivers may create and populate-specific directories
for their device internals.
Patch 1: general IOMMU enablement
Patch 2: basic AMD enablement to demonstra
strtobool() does check for NULL parameter already. No need to repeat.
While here, switch to kstrtobool() and unshadow actual error code
(which is still -EINVAL).
No functional change intended.
Signed-off-by: Andy Shevchenko
---
drivers/iommu/iommu.c | 6 --
1 file changed, 4 insertions(+),
On Sat, May 12, 2018 at 02:38:29PM +0200, Christoph Hellwig wrote:
> On Fri, May 11, 2018 at 02:55:47PM +0100, Catalin Marinas wrote:
> > On systems with a Cache Writeback Granule (CTR_EL0.CWG) greater than
> > ARCH_DMA_MINALIGN, DMA cache maintenance on sub-CWG ranges is not safe,
> > leading to d
Hi Nipun,
On 04/27/2018 01:27 PM, Nipun Gupta wrote:
> Signed-off-by: Nipun Gupta
> ---
> drivers/bus/fsl-mc/fsl-mc-bus.c | 16
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
> index 5d8266c
Drivers/subsystems creating scatterlists for DMA should be taking care
to respect the scatter-gather limitations of the appropriate device, as
described by dma_parms. A DMA API implementation cannot feasibly split
a scatterlist into *more* entries than originally passed, so it is not
well defined w
When you add the changleog, please also fix the subject typo:
- bus: fsl-mc: supoprt dma configure for devices on fsl-mc bus
^^^
+ bus: fsl-mc: support dma configure for devices on fsl-mc bus
On Mon, Apr 30, 2018 at 11:57:20AM +0530, Nipun Gupta wrote:
> Signed-off-by: Nipun Gu
On Mon, Apr 30, 2018 at 11:57:20AM +0530, Nipun Gupta wrote:
> Signed-off-by: Nipun Gupta
> ---
I can't take patches without any changelog text at all, sorry. Please
fix up and resend.
greg k-h
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h
On Sat, May 12, 2018 at 06:25:13PM +0530, valmiki wrote:
> Hi All,
>
> What is the difference between IOVA address and bus address
> when SMMU is enabled ?
>
> Is IOVA address term used only when hypervisor is present ?
IOVA = IO virtual address. IOVA is the term normally used to describe
the a
Hi Valmiki,
On 12/05/18 13:55, valmiki wrote:
> Hi All,
>
> What is the difference between IOVA address and bus address
> when SMMU is enabled ?
They are the same. You'll use one term or the other depending on what
system component you're talking about. "IOVA" only means something when
talking a
Hi,
On 05/12/2018 04:54 AM, Jacob Pan wrote:
> Currently, dmar fault IRQ handler does nothing more than rate
> limited printk, no critical hardware handling need to be done
> in IRQ context.
Not exactly. dmar_fault() needs to clear all the faults so that
the subsequent faults could be logged.
>
Hi,
On 05/12/2018 04:54 AM, Jacob Pan wrote:
> When IO page faults are reported outside IOMMU subsystem, the page
> request handler may fail for various reasons. E.g. a guest received
> page requests but did not have a chance to run for a long time. The
> irresponsive behavior could hold off limit
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