On 20. 09. 19 1:17, Michael Ellerman wrote:
>
>
> On 20 September 2019 6:33:50 am AEST, Linus Torvalds
> wrote:
>> On Wed, Sep 18, 2019 at 8:27 AM Christoph Hellwig
>> wrote:
>>>
>>> please pull the dma-mapping updates for 5.4.
>>
>> Pulled.
>>
>>> In addition to the usual Kconfig conflics
In case of 4k video buffer, the allocation from a reserved memory is
taking a long time, ~500ms. This is root caused to the memset()
operations on the allocated memory which is consuming more cpu cycles.
Due to this delay, we see that initial frames are being dropped.
To fix this, we have wrapped
On Thu, 2019-09-19 at 09:04 -0700, Andrew Waterman wrote:
> This needs to be discussed and debated at length; proposing edits to
> the spec at this stage is putting the cart before the horse!
>
> We shouldn’t change the definition of the existing SFENCE.VMA
> instruction to accomplish this. It’s
Hi,
On Fri, Sep 20, 2019 at 12:10 AM Andrew Waterman wrote:
>
> This needs to be discussed and debated at length; proposing edits to the spec
> at this stage is putting the cart before the horse!
Agree :)
>
> We shouldn’t change the definition of the existing SFENCE.VMA instruction to
>
On Thu, Sep 19, 2019 at 11:18 PM Jean-Philippe Brucker
wrote:
>
> The SMMU does support PCI Virtual Function - an hypervisor can assign a
> VF to a guest, and let that guest partition the VF into smaller contexts
> by using PASID. What it can't support is assigning partitions of a PCI
>
On 20 September 2019 6:33:50 am AEST, Linus Torvalds
wrote:
>On Wed, Sep 18, 2019 at 8:27 AM Christoph Hellwig
>wrote:
>>
>> please pull the dma-mapping updates for 5.4.
>
>Pulled.
>
>> In addition to the usual Kconfig conflics where you just want to keep
>> both edits there are a few more
On Fri, 6 Sep 2019 20:13:51 -0400
Matthew Rosato wrote:
> From: Pierre Morel
>
> We define a new configuration entry for VFIO/PCI, VFIO_PCI_ZDEV
>
> When the VFIO_PCI_ZDEV feature is configured we initialize
> a new device region, VFIO_REGION_SUBTYPE_ZDEV_CLP, to hold
> the information from
On Thu, 19 Sep 2019 16:27:08 -0600
Alex Williamson wrote:
> On Thu, 19 Sep 2019 16:55:57 -0400
> Matthew Rosato wrote:
>
> > On 9/19/19 11:20 AM, Cornelia Huck wrote:
> > > On Fri, 6 Sep 2019 20:13:50 -0400
> > > Matthew Rosato wrote:
> > >
> > >> From: Pierre Morel
> > >>
> > >> We
On Thu, 19 Sep 2019 16:55:57 -0400
Matthew Rosato wrote:
> On 9/19/19 11:20 AM, Cornelia Huck wrote:
> > On Fri, 6 Sep 2019 20:13:50 -0400
> > Matthew Rosato wrote:
> >
> >> From: Pierre Morel
> >>
> >> We define a new device region in vfio.h to be able to
> >> get the ZPCI CLP information
The pull request you sent on Wed, 18 Sep 2019 08:27:48 -0700:
> git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.4
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/671df189537883f36cf9c7d4f9495bfac0f86627
Thank you!
--
Deet-doot-dot, I am a bot.
On 9/19/19 11:25 AM, Cornelia Huck wrote:
> On Fri, 6 Sep 2019 20:13:51 -0400
> Matthew Rosato wrote:
>
>> From: Pierre Morel
>>
>> We define a new configuration entry for VFIO/PCI, VFIO_PCI_ZDEV
>>
>> When the VFIO_PCI_ZDEV feature is configured we initialize
>> a new device region,
On 9/19/19 11:20 AM, Cornelia Huck wrote:
> On Fri, 6 Sep 2019 20:13:50 -0400
> Matthew Rosato wrote:
>
>> From: Pierre Morel
>>
>> We define a new device region in vfio.h to be able to
>> get the ZPCI CLP information by reading this region from
>> userland.
>>
>> We create a new file,
On Wed, Sep 18, 2019 at 8:27 AM Christoph Hellwig wrote:
>
> please pull the dma-mapping updates for 5.4.
Pulled.
> In addition to the usual Kconfig conflics where you just want to keep
> both edits there are a few more interesting merge issues this time:
>
> - most importanly powerpc and
Quoting Sai Prakash Ranjan (2019-09-19 11:54:27)
> On 2019-09-19 08:48, Sai Prakash Ranjan wrote:
> > On 2019-09-19 05:55, Bjorn Andersson wrote:
> >> In the transition to this new design we lost the ability to
> >> enable/disable the safe toggle per board, which according to Vivek
> >> would
On 2019-09-19 08:48, Sai Prakash Ranjan wrote:
On 2019-09-19 05:55, Bjorn Andersson wrote:
In the transition to this new design we lost the ability to
enable/disable the safe toggle per board, which according to Vivek
would result in some issue with Cheza.
Can you confirm that this is okay?
This needs to be discussed and debated at length; proposing edits to the
spec at this stage is putting the cart before the horse!
We shouldn’t change the definition of the existing SFENCE.VMA instruction
to accomplish this. It’s also not abundantly clear to me that this should
be an instruction:
On Fri, 6 Sep 2019 20:13:51 -0400
Matthew Rosato wrote:
> From: Pierre Morel
>
> We define a new configuration entry for VFIO/PCI, VFIO_PCI_ZDEV
>
> When the VFIO_PCI_ZDEV feature is configured we initialize
> a new device region, VFIO_REGION_SUBTYPE_ZDEV_CLP, to hold
> the information from
On Fri, 6 Sep 2019 20:13:50 -0400
Matthew Rosato wrote:
> From: Pierre Morel
>
> We define a new device region in vfio.h to be able to
> get the ZPCI CLP information by reading this region from
> userland.
>
> We create a new file, vfio_zdev.h to define the structure
> of the new region we
On Thu, Sep 19, 2019 at 09:07:15PM +0800, Guo Ren wrote:
> > The solution I had to this problem is pinning the ASID [1] used by the
> > IOMMU, to prevent the CPU from recycling the ASID on rollover. This way
> > the CPU doesn't have to wait for IOMMU invalidations to complete, when
> > scheduling
On Mon, Jul 08, 2019 at 09:58:16AM +0200, Auger Eric wrote:
> > + ret = pci_enable_pasid(pdev, features);
> > + if (!ret)
> > + master->ssid_bits = min_t(u8, ilog2(num_pasids),
> > + master->smmu->ssid_bits);
> I don't really get why this setting
On Wed, Jun 26, 2019 at 06:59:59PM +0100, Will Deacon wrote:
> > @@ -666,8 +668,14 @@ struct arm_smmu_domain {
> >
> > struct iommu_domain domain;
> >
> > + /* Unused in aux domains */
> > struct list_headdevices;
> > spinlock_t
On Mon, Jul 08, 2019 at 05:13:05PM +0200, Auger Eric wrote:
> > #define STRTAB_STE_0_S1FMT GENMASK_ULL(5, 4)
> > #define STRTAB_STE_0_S1FMT_LINEAR 0
> > +#define STRTAB_STE_0_S1FMT_4K_L2 1
> As you only use 64kB L2, I guess you can remove the 4K define?
I prefer defining all values,
On Mon, Jul 08, 2019 at 05:31:53PM +0200, Auger Eric wrote:
> Hi Jean,
>
> On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> > /*
> > -* We don't need to issue any invalidation here, as we'll invalidate
> > -* the STE when installing the new entry anyway.
> > +* This function
On Wed, Jun 26, 2019 at 07:00:26PM +0100, Will Deacon wrote:
> On Mon, Jun 10, 2019 at 07:47:10PM +0100, Jean-Philippe Brucker wrote:
> > In all stream table entries, we set S1DSS=SSID0 mode, making translations
> > without an SSID use context descriptor 0. Although it would be possible by
> >
Hi Eric,
Sorry for the delay. I'll see if I can resend this for v5.5, although I
can't do much testing at the moment.
On Mon, Jul 08, 2019 at 09:58:22AM +0200, Auger Eric wrote:
> Hi Jean,
>
> On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> > For platform devices that support SubstreamID
On 19/09/2019 14:25, Robin Murphy wrote:
When the port eventually probes it gets a new, separate group.
This all seems to be as the built-in module init ordering is as
follows: pcieport drv, smmu drv, mlx5 drv
I notice that if I build the mlx5 drv as a ko and insert after boot,
all functions +
Hi,
On Tue, Sep 17, 2019 at 11:42 AM Anup Patel wrote:
> >
> > With a reply stating that the patch "absolutely does not work" ;)
>
> This patch was tested on existing HW (which does not have ASID implementation)
> and tested on QEMU (which has very simplistic Implementation of ASID).
>
> When I
Hi John,
On 19/09/2019 09:43, John Garry wrote:
Hi all,
We have noticed a special behaviour on our arm64 D05 board when the SMMU
is enabled with regards PCI device iommu groups.
This platform does not support ACS, yet we find that all functions for a
PCI device are not grouped together:
Hi,
On Mon, Sep 16, 2019 at 8:57 PM Jean-Philippe Brucker
wrote:
> On 13/09/2019 09:13, Guo Ren wrote:
> > Another idea is seperate remote TLB invalidate into two instructions:
> >
> > - sfence.vma.b.asyc
> > - sfence.vma.b.barrier // wait all async TLB invalidate operations
> > finished for
From: Guo Ren
The patch is for https://github.com/riscv/riscv-isa-manual
The proposal has been talked in LPC-2019 RISC-V MC ref [1]. Here is the
formal patch.
Introduction
Using the Hardware TLB broadcast invalidation instruction to maintain the
system TLB is a good choice and
On Thu, Sep 19, 2019 at 6:41 PM Frederic Chen
wrote:
>
> Dear Tomasz,
>
>
> On Thu, 2019-09-12 at 14:58 +0900, Tomasz Figa wrote:
> > On Thu, Sep 12, 2019 at 2:41 AM Frederic Chen
> > wrote:
> > >
> > > Hi Tomasz,
> > >
> > > I appreciate your helpful comments.
> > >
> > >
> > > On Tue,
Dear Tomasz,
On Thu, 2019-09-12 at 14:58 +0900, Tomasz Figa wrote:
> On Thu, Sep 12, 2019 at 2:41 AM Frederic Chen
> wrote:
> >
> > Hi Tomasz,
> >
> > I appreciate your helpful comments.
> >
> >
> > On Tue, 2019-09-10 at 13:04 +0900, Tomasz Figa wrote:
> > > Hi Frederic,
> > >
> > > On Tue, Sep
Hi all,
We have noticed a special behaviour on our arm64 D05 board when the SMMU
is enabled with regards PCI device iommu groups.
This platform does not support ACS, yet we find that all functions for a
PCI device are not grouped together:
root@ubuntu:/sys# dmesg | grep "Adding to iommu
On Wed, Sep 11, 2019 at 06:19:40PM +0100, Robin Murphy wrote:
> On 2019-09-11 5:20 pm, Will Deacon wrote:
> > On Wed, Sep 11, 2019 at 06:19:04PM +0200, Neil Armstrong wrote:
> > > On 11/09/2019 16:42, Robin Murphy wrote:
> > > > Here's the eagerly-awaited fix to unblock T720/T820, plus a couple of
/iommu-Introduce-cache_invalidate-API/20190919-072517
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 7.4.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
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