Fenghua Yu writes:
> A #GP fault is generated when ENQCMD instruction is executed without
> a valid PASID value programmed in.
Programmed in what?
> The #GP fault handler will initialize the current thread's PASID MSR.
>
> The following heuristic is used to avoid decoding the user instructions
Fenghua Yu writes:
> PASID is shared by all threads in a process. So the logical place to keep
> track of it is in the "mm". Add the field to the architecture specific
> mm_context_t structure.
>
> A PASID is allocated for an "mm" the first time any thread attaches
> to an SVM capable device.
Fenghua Yu writes:
> The IA32_PASID MSR (0xd93) contains the Process Address Space Identifier
> (PASID), a 20-bit value. Bit 31 must be set to indicate the value
> programmed in the MSR is valid. Hardware uses PASID to identify which
> process submits the work and direct responses to the right
Fenghua Yu writes:
> From: Yu-cheng Yu
>
> The IA32_PASID MSR is used when a task submits work via the ENQCMD
> instruction.
Is used?
> The per task MSR is stored in the task's supervisor FPU
per task MSR? Lot's of MSRs
> PASID state and is context switched by XSAVES/XRSTORS.
>
Fenghua Yu writes:
> A user space application can execute ENQCMD instruction to submit work
> to device. The kernel executes ENQCMDS instruction to submit work to
> device.
So a user space application _can_ execute ENQCMD and the kernel
executes ENQCMDS. And both submit work to device.
> There
Fenghua Yu writes:
s/Add a documentation/Add documentation/
> From: Ashok Raj
>
> ENQCMD and Data Streaming Accelerator (DSA) and all of their associated
> features are a complicated stack with lots of interconnected pieces.
> This documentation provides a big picture overview for all of the
>
