Re: [PATCH v4 4/4] PCI/ACS: Enable PCI_ACS_TB for untrusted/external-facing devices

On Sat, Jul 11, 2020 at 05:08:51PM -0700, Rajat Jain wrote: > On Sat, Jul 11, 2020 at 12:53 PM Bjorn Helgaas wrote: > > On Fri, Jul 10, 2020 at 03:53:59PM -0700, Rajat Jain wrote: > > > On Fri, Jul 10, 2020 at 2:29 PM Raj, Ashok wrote: > > > > On Fri, Jul 10, 2020 at 03:29:22PM -0500, Bjorn

Re: [PATCH v4 4/4] PCI/ACS: Enable PCI_ACS_TB for untrusted/external-facing devices

On Sat, Jul 11, 2020 at 12:53 PM Bjorn Helgaas wrote: > > On Fri, Jul 10, 2020 at 03:53:59PM -0700, Rajat Jain wrote: > > On Fri, Jul 10, 2020 at 2:29 PM Raj, Ashok wrote: > > > On Fri, Jul 10, 2020 at 03:29:22PM -0500, Bjorn Helgaas wrote: > > > > On Tue, Jul 07, 2020 at 03:46:04PM -0700, Rajat

Re: [PATCH v4 4/4] PCI/ACS: Enable PCI_ACS_TB for untrusted/external-facing devices

On Fri, Jul 10, 2020 at 03:53:59PM -0700, Rajat Jain wrote: > On Fri, Jul 10, 2020 at 2:29 PM Raj, Ashok wrote: > > On Fri, Jul 10, 2020 at 03:29:22PM -0500, Bjorn Helgaas wrote: > > > On Tue, Jul 07, 2020 at 03:46:04PM -0700, Rajat Jain wrote: > > > > When enabling ACS, enable translation

Re: [PATCH] xen: introduce xen_vring_use_dma

On Fri, Jul 10, 2020 at 10:23:22AM -0700, Stefano Stabellini wrote: > Sorry for the late reply -- a couple of conferences kept me busy. > > > On Wed, 1 Jul 2020, Michael S. Tsirkin wrote: > > On Wed, Jul 01, 2020 at 10:34:53AM -0700, Stefano Stabellini wrote: > > > Would you be in favor of a

Re: [PATCH v6 00/10] MT6779 IOMMU SUPPORT

On Fri, 2020-07-10 at 16:13 +0200, Joerg Roedel wrote: > On Fri, Jul 03, 2020 at 12:41:17PM +0800, Chao Hao wrote: > > Chao Hao (10): > > dt-bindings: mediatek: Add bindings for MT6779 > > iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to MISC_CTRL > > iommu/mediatek: Use a u32

[PATCH 21/21] memory: mtk-smi: Add mt8192 support

Add mt8192 smi support. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index f2f6100c74ef..5d0268630e70 100644 --- a/drivers/memory/mtk-smi.c +++

[PATCH 17/21] iommu/mediatek: Support report iova 34bit translation fault in ISR

If the iova is over 32bit, the fault status register bit is a little different. Add a flag for the special register bits. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c

[PATCH 20/21] iommu/mediatek: Add mt8192 support

Add mt8192 iommu support. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 20 drivers/iommu/mtk_iommu.h | 1 + 2 files changed, 21 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index a4ac41e60c4f..da7d055af919 100644 ---

[PATCH 19/21] iommu/mediatek: Adjust the structure

Add "struct mtk_iommu_data *" in the "struct mtk_iommu_domain", reduce the call mtk_iommu_get_m4u_data(). No functional change. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c

[PATCH 18/21] iommu/mediatek: Add support for multi domain

Some HW IP(ex: CCU) require the special iova range. That means the iova got from dma_alloc_attrs for that devices must locate in his special range. In this patch, we allocate a special iova_range for each a special requirement and create each a iommu domain for each a iova_range. meanwhile we

[PATCH 15/21] iommu/mediatek: Support master use iova over 32bit

After extending v7s, our pagetable already support iova reach 16GB(34bit). the master got the iova via dma_alloc_attrs may reach 34bits, but its HW register still is 32bit. then how to set the bit32/bit33 iova? this depend on a SMI larb setting(bank_sel). we separate whole 16GB iova to four

[PATCH 14/21] iommu/mediatek: Add single domain

Defaultly the iova range is 0-4G. here we add a single-domain(0-4G) for the previous SoC. this also is a preparing patch for supporting multi-domains. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c

[PATCH 13/21] iommu/mediatek: Make MTK_IOMMU depend on ARM64

Originally MTK_IOMMU could depend on ARM || ARM64. Both build ok. actually the source code don't support ARM. this patch changes it only depend on ARM64. This is a preparing patch for support multi-domain. otherwise it will build warning in ARM case. This is the build warning log:

[PATCH 16/21] iommu/mediatek: Support up to 34bit iova in tlb invalid

If the iova is 34bit, the iova[32][33] is the bit0/1 in the tlb flush register. Add a new macro for this. there is a minor change unrelated with this patch. it also use the new macro. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 10 ++ 1 file changed, 6 insertions(+), 4

[PATCH 11/21] iommu/mediatek: Add power-domain operation

In the previous SoC, the M4U HW is in the EMI power domain which is always on. the latest M4U is in the display power domain which may be turned on/off, thus we have to add pm_runtime interface for it. we should enable its power before M4U hw initial. and disable it after HW initialize. When the

[PATCH 12/21] iommu/mediatek: Add iova reserved function

For multiple iommu_domains, we need to reserve some iova regions, so we will add mtk_iommu_iova_region structure. It includes the base address and size of the range. This is a preparing patch for supporting multi-domain. Signed-off-by: Anan sun Signed-off-by: Hao Chao Signed-off-by: Yong Wu ---

[PATCH 08/21] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros

Add "cfg" as a parameter for some macros. This is a preparing patch for mediatek extend the lvl1 pgtable. No functional change. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 34 +++--- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git

[PATCH 10/21] iommu/mediatek: Add device link for smi-common and m4u

In the lastest SoC, M4U has its special power domain. thus, If the engine begin to work, it should help enable the power for M4U firstly. Currently if the engine work, it always enable the power/clocks for smi-larbs/smi-common. This patch adds device_link for smi-common and M4U. then, if

[PATCH 05/21] iommu/mediatek: Use the common mtk-smi-larb-port.h

Use the common larb-port header in the source code. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 7 --- drivers/iommu/mtk_iommu.h | 1 + drivers/memory/mtk-smi.c | 1 + include/soc/mediatek/smi.h | 2 -- 4 files changed, 2 insertions(+), 9 deletions(-) diff --git

[PATCH 09/21] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek

The standard input iova bits is 32. MediaTek quad the lvl1 pagetable(4*lvl1). No change for lvl2 pagetable. Then the iova bits can reach 34bit. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 10 +++--- drivers/iommu/mtk_iommu.c | 2 +- 2 files changed, 8

[PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI

This patch adds decriptions for mt8192 IOMMU and SMI. mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The M4U-SMI HW diagram is as below: EMI | M4U |

[PATCH 03/21] dt-binding: memory: mediatek: Add domain definition

In the latest SoC, there are several HW IP require a sepecial iova range, mainly CCU and VPU has this requirement. Take CCU as a example, CCU require its iova locate in the range(0x4000_ ~ 0x43ff_). In this patch we add a domain definition for the special port. This is a preparing patch

[PATCH 02/21] dt-binding: memory: mediatek: Extend LARB_NR_MAX to 32

Extend the max larb number definition as mt8192 has larb_nr over 16. Signed-off-by: Yong Wu --- include/dt-bindings/memory/mtk-smi-larb-port.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h

[PATCH 06/21] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap

As title. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index 4272fe4e17f4..01f2a8876808 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c

[PATCH 07/21] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek

MediaTek extend the bit5 in lvl1 and lvl2 descriptor as PA34. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 9 +++-- drivers/iommu/mtk_iommu.c | 2 +- include/linux/io-pgtable.h | 4 ++-- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git

[PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file

Put all the macros about smi larb/port togethers, this is a preparing patch for extending LARB_NR and adding new dom-id support. Signed-off-by: Yong Wu --- include/dt-bindings/memory/mt2712-larb-port.h | 2 +- include/dt-bindings/memory/mt6779-larb-port.h | 2 +-

[PATCH 00/21] MT8192 IOMMU support

This patch mainly adds support for mt8192 IOMMU and SMI. mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The M4U-SMI HW diagram is as below: EMI | M4U