Hi Eric,
在 2021/2/24 4:56, Eric Auger 写道:
Implement domain-selective, pasid selective and page-selective
IOTLB invalidations.
Signed-off-by: Eric Auger
---
v13 -> v14:
- Add domain invalidation
- do global inval when asid is not provided with addr
granularity
v7 -> v8:
- ASID based
Hi Jason,
> From: Jason Gunthorpe
> Sent: Thursday, March 4, 2021 3:45 AM
>
> On Wed, Mar 03, 2021 at 11:42:12AM -0800, Jacob Pan wrote:
> > Hi Jason,
> >
> > On Tue, 2 Mar 2021 13:15:51 -0400, Jason Gunthorpe
> wrote:
> >
> > > On Tue, Mar 02, 2021 at 09:13:19AM -0800, Jacob Pan wrote:
> > >
Hi Jacob, Kevin,
On 3/4/21 11:28 AM, Tian, Kevin wrote:
From: Jacob Pan
Sent: Thursday, March 4, 2021 2:29 AM
Hi Vivek,
On Fri, 15 Jan 2021 17:43:39 +0530, Vivek Gautam
wrote:
From: Jean-Philippe Brucker
Add support for tlb invalidation ops that can send invalidation
requests to
> From: Jacob Pan
> Sent: Thursday, March 4, 2021 2:29 AM
>
> Hi Vivek,
>
> On Fri, 15 Jan 2021 17:43:39 +0530, Vivek Gautam
> wrote:
>
> > From: Jean-Philippe Brucker
> >
> > Add support for tlb invalidation ops that can send invalidation
> > requests to back-end virtio-iommu when stage-1
03.03.2021 02:08, Nicolin Chen пишет:
> On Sat, Feb 27, 2021 at 12:59:17PM +0300, Dmitry Osipenko wrote:
>> 25.02.2021 09:27, Nicolin Chen пишет:
>> ...
The partially revert should be okay, but it's not clear to me what makes
difference for T124 since I don't see that problem on T30,
On Thu, Feb 18, 2021 at 02:07:02PM -0800, Nicolin Chen wrote:
> Commit 25938c73cd79 ("iommu/tegra-smmu: Rework tegra_smmu_probe_device()")
> removed certain hack in the tegra_smmu_probe() by relying on IOMMU core to
> of_xlate SMMU's SID per device, so as to get rid of tegra_smmu_find() and
>
On Wed, Mar 03, 2021 at 04:02:05PM -0800, Jacob Pan wrote:
> > The interface definitely can be reused. But IOASID has a different
> > behavior in terms of migration and ownership checking. I guess SEV key
> > IDs are not tied to a process whereas IOASIDs are. Perhaps this can be
> > solved by
Hi Jacob,
On Wed, 3 Mar 2021 13:17:26 -0800, Jacob Pan
wrote:
> Hi Tejun,
>
> On Wed, 3 Mar 2021 10:44:28 -0500, Tejun Heo wrote:
>
> > On Sat, Feb 27, 2021 at 02:01:23PM -0800, Jacob Pan wrote:
> > > IOASIDs are used to associate DMA requests with virtual address
> > > spaces. They are a
On Sat, Feb 27, 2021 at 12:59:17PM +0300, Dmitry Osipenko wrote:
> 25.02.2021 09:27, Nicolin Chen пишет:
> ...
> >> The partially revert should be okay, but it's not clear to me what makes
> >> difference for T124 since I don't see that problem on T30, which also
> >> has active display at a boot
On Sat, Feb 27, 2021 at 02:01:23PM -0800, Jacob Pan wrote:
> IOASIDs are used to associate DMA requests with virtual address spaces.
> They are a system-wide limited resource made available to the userspace
> applications. Let it be VMs or user-space device drivers.
>
> This RFC patch introduces
Hi Tejun,
On Wed, 3 Mar 2021 10:44:28 -0500, Tejun Heo wrote:
> On Sat, Feb 27, 2021 at 02:01:23PM -0800, Jacob Pan wrote:
> > IOASIDs are used to associate DMA requests with virtual address spaces.
> > They are a system-wide limited resource made available to the userspace
> > applications.
On Fri, Jan 15, 2021 at 05:43:40PM +0530, Vivek Gautam wrote:
[...]
> +static int viommu_setup_pgtable(struct viommu_endpoint *vdev,
> + struct viommu_domain *vdomain)
> +{
> + int ret, id;
> + u32 asid;
> + enum io_pgtable_fmt fmt;
> + struct
On 3/3/2021 4:57 PM, Sascha Hauer wrote:
> On Wed, Mar 03, 2021 at 12:26:32PM +0200, Horia Geantă wrote:
>> Adding some people in the loop, maybe they could help in understanding
>> why lack of "dma-coherent" property for a HW-coherent device could lead to
>> unexpected / strange side effects.
>>
On Fri, Jan 15, 2021 at 05:43:35PM +0530, Vivek Gautam wrote:
> aisd_bits data is required to prepare stage-1 tables for arm-smmu-v3.
>
> Signed-off-by: Vivek Gautam
> Cc: Joerg Roedel
> Cc: Will Deacon
> Cc: Robin Murphy
> Cc: Jean-Philippe Brucker
> Cc: Eric Auger
> Cc: Alex Williamson
>
On Wed, Mar 03, 2021 at 11:42:12AM -0800, Jacob Pan wrote:
> Hi Jason,
>
> On Tue, 2 Mar 2021 13:15:51 -0400, Jason Gunthorpe wrote:
>
> > On Tue, Mar 02, 2021 at 09:13:19AM -0800, Jacob Pan wrote:
> > > Hi Jason,
> > >
> > > On Tue, 2 Mar 2021 08:56:28 -0400, Jason Gunthorpe
> > > wrote:
>
Hi Jason,
On Tue, 2 Mar 2021 13:15:51 -0400, Jason Gunthorpe wrote:
> On Tue, Mar 02, 2021 at 09:13:19AM -0800, Jacob Pan wrote:
> > Hi Jason,
> >
> > On Tue, 2 Mar 2021 08:56:28 -0400, Jason Gunthorpe
> > wrote:
> > > On Wed, Mar 03, 2021 at 04:35:39AM +0800, Liu Yi L wrote:
> > > >
> >
Hi Vivek,
Thanks again for working on this. I have a few comments but it looks
sensible overall.
Regarding the overall design, I was initially assigning page directories
instead of whole PASID tables, which would simplify the driver and host
implementation. A major complication, however, is
Hi Eric,
On 2/12/21 11:43 PM, Auger Eric wrote:
Hi Vivek,
On 2/12/21 11:58 AM, Vivek Gautam wrote:
Update nested domain information required for stage1 page table.
s/reuqired/required in the commit title
My bad! Will correct it.
Signed-off-by: Vivek Gautam
---
Hi Vivek,
On Fri, 15 Jan 2021 17:43:39 +0530, Vivek Gautam
wrote:
> From: Jean-Philippe Brucker
>
> Add support for tlb invalidation ops that can send invalidation
> requests to back-end virtio-iommu when stage-1 page tables are
> supported.
>
Just curious if it possible to reuse the iommu
On Fri, Jan 15, 2021 at 05:43:42PM +0530, Vivek Gautam wrote:
> Fault type information can tell about a page request fault or
> an unreceoverable fault, and further additions to fault reasons
> and the related PASID information can help in handling faults
> efficiently.
>
> Signed-off-by: Vivek
On Fri, Jan 15, 2021 at 05:43:32PM +0530, Vivek Gautam wrote:
> Te change allows different consumers of arm-smmu-v3-cd-lib to set
> their respective sync op for pasid entries.
>
> Signed-off-by: Vivek Gautam
> Cc: Joerg Roedel
> Cc: Will Deacon
> Cc: Robin Murphy
> Cc: Jean-Philippe Brucker
The device iommu probe/attach might have failed leaving dev->iommu
to NULL and device drivers may still invoke these functions resulting
in a crash in iommu vendor driver code.
Hence make sure we check that.
Fixes: a3a195929d40 ("iommu: Add APIs for multiple domains per device")
Signed-off-by:
On Fri, Jan 15, 2021 at 05:43:33PM +0530, Vivek Gautam wrote:
> From: Jean-Philippe Brucker
>
> Add required UAPI defines for probing table format for underlying
> iommu hardware. The device may provide information about hardware
> tables and additional capabilities for each device.
> This
On Fri, Jan 15, 2021 at 05:43:31PM +0530, Vivek Gautam wrote:
> Update base address information in vendor pasid table info to pass that
> to user-space for stage1 table management.
>
> Signed-off-by: Vivek Gautam
> Cc: Joerg Roedel
> Cc: Will Deacon
> Cc: Robin Murphy
> Cc: Jean-Philippe
On Fri, Jan 15, 2021 at 05:43:36PM +0530, Vivek Gautam wrote:
> Add info about asid_bits and additional flags to table format
> probing header.
>
> Signed-off-by: Vivek Gautam
> Cc: Joerg Roedel
> Cc: Will Deacon
> Cc: Michael S. Tsirkin
> Cc: Robin Murphy
> Cc: Jean-Philippe Brucker
> Cc:
On 3/3/2021 2:07 PM, Robin Murphy wrote:
> On 2021-03-03 10:26, Horia Geantă wrote:
>> Adding some people in the loop, maybe they could help in understanding
>> why lack of "dma-coherent" property for a HW-coherent device could lead to
>> unexpected / strange side effects.
>>
>> On 3/1/2021 5:22
On Wed, Mar 03, 2021 at 12:26:32PM +0200, Horia Geantă wrote:
> Adding some people in the loop, maybe they could help in understanding
> why lack of "dma-coherent" property for a HW-coherent device could lead to
> unexpected / strange side effects.
>
> On 3/1/2021 5:22 PM, Sascha Hauer wrote:
> >
On Wed, 3 Mar 2021, Suravee Suthikulpanit wrote:
> > Additionally, alternative proposed solutions [1] were not considered or
> > discussed.
> >
> > [1]:https://lore.kernel.org/linux-iommu/alpine.lnx.2.20.13.2006030935570.3...@monopod.intra.ispras.ru/
>
> This check has been introduced early on
Adding some people in the loop, maybe they could help in understanding
why lack of "dma-coherent" property for a HW-coherent device could lead to
unexpected / strange side effects.
On 3/1/2021 5:22 PM, Sascha Hauer wrote:
> Hi All,
>
> I am on a Layerscape LS1046a using Linux-5.11. The CAAM
Paul,
On 3/3/21 7:11 PM, Paul Menzel wrote:
This reverts commit 6778ff5b21bd8e78c8bd547fd66437cf2657fd9b.
The commit adds up to 100 ms to the boot process, which is not mentioned
in the commit message, and is making up more than 20 % on current
systems, where the Linux kernel takes 500 ms.
This reverts commit 6778ff5b21bd8e78c8bd547fd66437cf2657fd9b.
The commit adds up to 100 ms to the boot process, which is not mentioned
in the commit message, and is making up more than 20 % on current
systems, where the Linux kernel takes 500 ms.
[0.00] Linux version
On 2021-03-03 10:26, Horia Geantă wrote:
Adding some people in the loop, maybe they could help in understanding
why lack of "dma-coherent" property for a HW-coherent device could lead to
unexpected / strange side effects.
On 3/1/2021 5:22 PM, Sascha Hauer wrote:
Hi All,
I am on a Layerscape
Hi Eric,
On 2/12/21 11:43 PM, Auger Eric wrote:
Hi Vivek,
On 2/12/21 11:58 AM, Vivek Gautam wrote:
Add a vendor specific structure for domain nesting info for
arm smmu-v3, and necessary info fields required to populate
stage1 page tables.
Signed-off-by: Vivek Gautam
---
Hi Jason,
> From: Jason Gunthorpe
> Sent: Tuesday, March 2, 2021 8:52 PM
>
> On Wed, Mar 03, 2021 at 04:35:38AM +0800, Liu Yi L wrote:
> > diff --git a/drivers/vfio/vfio_iommu_type1.c
> b/drivers/vfio/vfio_iommu_type1.c
> > index 4bb162c1d649..3a5c84d4f19b 100644
> > +++
Hi Eric,
> From: Auger Eric
> Sent: Friday, February 12, 2021 5:58 PM
>
> Hi Vivek, Yi,
>
> On 2/12/21 8:14 AM, Vivek Gautam wrote:
> > Hi Yi,
> >
> >
> > On Sat, Jan 23, 2021 at 2:29 PM Liu, Yi L wrote:
> >>
> >> Hi Eric,
> >>
> >>> From: Auger Eric
> >>> Sent: Tuesday, January 19, 2021
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