ain iova_domain to manage iova allocation within the
window provided by the userspace
- vfio alloc_map/unmap_free take a vfio_group handle
- vfio_group handle is cached in vfio_pci_device
- add ref counting to bindings
- user modality enabled at the end of the series
Eric Auger (5):
vfio: introdu
address yet. The host kernel will use those iova when needed, typically
when the VFIO-PCI device allocates its MSIs.
This patch also handles the destruction of the reserved binding RB-tree and
domain's iova_domains.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
---
v3 -> v
after "vfio/type1: also check IRQ
remapping capability at msi domain" else the legacy interrupt
assignment gets broken with arm-smmu.
Signed-off-by: Eric Auger
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/dri
-space must use this information to allocate an
IOVA contiguous region of size msi_iova_pages * ffs(iova_pgsizes) and pass
it with VFIO_IOMMU_MAP_DMA iotcl (VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA set).
Signed-off-by: Eric Auger
---
Currently it is assumed a single doorbell page is used per MSI
d-off-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 75b24e9..c9ddbde 100644
--- a/drivers/vfio/vfio_iommu_type1.c
+++ b/drivers
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- remove static implementation in case CONFIG_PCI_MSI_IRQ_DOMAIN is not set
---
kernel/irq/msi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/irq/msi.c b/ke
case the mapping fails we just WARN_ON.
Signed-off-by: Eric Auger
---
v6:
- check the domain type to detect bypass situation (rebase on
new default domain modality)
- fix the msi_domain_set_affinity sequence:
unmap the address once the PCI device has been given the new address
- use new proto
userspace
- vfio alloc_map/unmap_free take a vfio_group handle
- vfio_group handle is cached in vfio_pci_device
- add ref counting to bindings
- user modality enabled at the end of the series
Eric Auger (4):
msi: Add a new MSI_FLAG_IRQ_REMAPPING flag
irqchip/gic-v3-its: ITS advertises M
The ITS is the first ARM MSI controller advertising the new
MSI_FLAG_IRQ_REMAPPING flag. It does so because it supports
interrupt translation service. This HW support offers isolation
of MSIs, feature used when using KVM device passthrough.
Signed-off-by: Eric Auger
---
v5: new
---
drivers
This flag will be used to know whether the MSI passthrough is
safe.
Signed-off-by: Eric Auger
---
v4 -> v5:
- seperate flag introduction from first user addition (ITS)
---
include/linux/msi.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/msi.h b/include/linux/msi.h
index
Introduce a new function whose role is to unmap all allocated
reserved IOVAs and free the reserved iova domain
Signed-off-by: Eric Auger
---
v5 -> v6:
- use spin_lock instead of mutex
v3 -> v4:
- previously "iommu/arm-smmu: relinquish reserved resources on
domain deletion"
--
single page mapping one MSI frame (GICv2m
frame or ITS GITS_TRANSLATER frame).
Signed-off-by: Eric Auger
---
v5 -> v6:
- add comment about @d->reserved_lock to be held
v3 -> v4:
- that code was formerly in "iommu/arm-smmu: add a reserved binding RB tree"
---
drivers/iommu/d
indow which directly targets the APIC configuration space and
hence bypass the sMMU. On ARM and PowerPC however MSI transactions are
conveyed through the IOMMU.
Signed-off-by: Bharat Bhushan
Signed-off-by: Eric Auger
---
v4 -> v5:
- introduce the user in the next patch
RFC v1 -> v1:
- the
is directly returned.
Each time an iova is successfully returned a binding ref count is
incremented.
iommu_put_single_reserved decrements the ref count and when this latter
is null, the mapping is destroyed and the iova is released.
Signed-off-by: Eric Auger
Signed-off-by: Ankit Jindal
Signed
frame binding. Allocation function
within the reserved iova domain will be introduced in subsequent patches.
Those functions are implemented and exposed if CONFIG_IOMMU_DMA_RESERVED
is seta.
Signed-off-by: Eric Auger
---
v5 -> v6:
- use spin lock instead of mutex
v3 -> v4:
- formerly in
le is cached in vfio_pci_device
- add ref counting to bindings
- user modality enabled at the end of the series
Eric Auger (7):
iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute
iommu/arm-smmu: advertise DOMAIN_ATTR_MSI_MAPPING attribute
iommu: introduce a reserved iova cookie
dma-reserv
to the iova_domain
and RB tree.
Signed-off-by: Eric Auger
---
v5 -> v6:
- initialize reserved_binding_list
- use a spinlock instead of a mutex
---
drivers/iommu/iommu.c | 2 ++
include/linux/iommu.h | 6 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/iommu/iommu.c b/driv
On ARM, MSI write transactions from device upstream to the smmu
are conveyed through the iommu. Therefore target physical addresses
must be mapped and DOMAIN_ATTR_MSI_MAPPING is set to advertise
this requirement on arm-smmu and arm-smmu-v3.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
Hi Julien,
On 03/03/2016 05:26 PM, Julien Grall wrote:
> Hi Eric,
>
> On 01/03/16 18:27, Eric Auger wrote:
>> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
>> index 0e3b009..7b2bb94 100644
>> --- a/drivers/iommu/iommu.c
>> +++ b/drivers/iommu/iommu.
Hi Jean-Philippe,
On 03/10/2016 12:52 PM, Jean-Philippe Brucker wrote:
> Hi Eric,
>
> On Tue, Mar 01, 2016 at 06:27:46PM +0000, Eric Auger wrote:
>> [...]
>> +
>> +int iommu_get_single_reserved(struct iommu_domain *domain,
>> +
Hi Manish,
On 03/02/2016 09:11 AM, Jaggi, Manish wrote:
>
>
>>> From: Eric Auger
>>> Sent: Tuesday, March 1, 2016 11:57 PM
>>> To: eric.au...@st.com; eric.au...@linaro.org; robin.mur...@arm.com;
>>> alex.william...@redhat.com; will.dea...@arm.com; j...
pports IRQ remapping.
Then we check at group level if all devices have safe interrupts: if not,
we only allow the group to be attached if allow_unsafe_interrupts is set.
At this point ARM sMMU still advertises IOMMU_CAP_INTR_REMAP. This is
changed in next patch.
Signed-off-by: Eric Auger
--
d-off-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 6f1ea3d..692e9a2 100644
--- a/drivers/vfio/vfio_iommu_type1.c
+++ b/drivers
after "vfio/type1: also check IRQ
remapping capability at msi domain" else the legacy interrupt
assignment gets broken with arm-smmu.
Signed-off-by: Eric Auger
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/dri
This flag will be used to know whether the MSI passthrough is
safe.
Signed-off-by: Eric Auger
---
v4 -> v5:
- seperate flag introduction from first user addition (ITS)
---
include/linux/msi.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/msi.h b/include/linux/msi.h
index
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- remove static implementation in case CONFIG_PCI_MSI_IRQ_DOMAIN is not set
---
kernel/irq/msi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/irq/msi.c b/ke
Introduce a new function whose role is to unmap all allocated
reserved IOVAs and free the reserved iova domain
Signed-off-by: Eric Auger
---
v3 -> v4:
- previously "iommu/arm-smmu: relinquish reserved resources on
domain deletion"
---
drivers/iommu/dma-reserved
address yet. The host kernel will use those iova when needed, typically
when the VFIO-PCI device allocates its MSIs.
This patch also handles the destruction of the reserved binding RB-tree and
domain's iova_domains.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
---
v3 -> v
-space must use this information to allocate an
IOVA contiguous region of size msi_iova_pages * ffs(iova_pgsizes) and pass
it with VFIO_IOMMU_MAP_DMA iotcl (VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA set).
Signed-off-by: Eric Auger
---
Currently it is assumed a single doorbell page is used per MSI
is directly returned.
Each time an iova is successfully returned a binding ref count is
incremented.
iommu_put_single_reserved decrements the ref count and when this latter
is null, the mapping is destroyed and the iova is released.
Signed-off-by: Eric Auger
Signed-off-by: Ankit Jindal
Signed
change and MSI message erasure we decrement the reference
counter to the IOMMU binding.
In case the mapping fails we just WARN_ON.
Signed-off-by: Eric Auger
---
v5:
- use macros to increase the readability
- add comments
- fix a typo that caused a compilation error if CONFIG_IOMMU_API
is not set
The ITS is the first ARM MSI controller advertising the new
MSI_FLAG_IRQ_REMAPPING flag. It does so because it supports
interrupt translation service. This HW support offers isolation
of MSIs, feature used when using KVM device passthrough.
Signed-off-by: Eric Auger
---
v5: new
---
drivers
to the iova_domain
and RB tree.
Signed-off-by: Eric Auger
---
drivers/iommu/iommu.c | 1 +
include/linux/iommu.h | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 0e3b009..7b2bb94 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu
indow which directly targets the APIC configuration space and
hence bypass the sMMU. On ARM and PowerPC however MSI transactions are
conveyed through the IOMMU.
Signed-off-by: Bharat Bhushan
Signed-off-by: Eric Auger
---
v4 -> v5:
- introduce the user in the next patch
RFC v1 -> v1:
- the
vfio alloc_map/unmap_free take a vfio_group handle
- vfio_group handle is cached in vfio_pci_device
- add ref counting to bindings
- user modality enabled at the end of the series
Eric Auger (17):
iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute
iommu/arm-smmu: advertise DOMAIN_ATTR_MSI_MAPPING attribu
propose to introduce a common wrapper for actual composition and
erasure, msi_compose.
Signed-off-by: Eric Auger
---
v4 -> v5:
- just introduce the msi-compose wrapper without adding new
functionalities
v3 -> v4:
- that code was formely in irq-gic-common.c
"irqchip/gicv2m/v3-
single page mapping one MSI frame (GICv2m
frame or ITS GITS_TRANSLATER frame).
Signed-off-by: Eric Auger
---
v3 -> v4:
- that code was formerly in "iommu/arm-smmu: add a reserved binding RB tree"
---
drivers/iommu/dma-reserved-iommu.c | 60 ++
1
frame binding. Allocation function
within the reserved iova domain will be introduced in subsequent patches.
Those functions are implemented and exposed if CONFIG_IOMMU_DMA_RESERVED
is seta.
Signed-off-by: Eric Auger
---
v3 -> v4:
- formerly in "iommu/arm-smmu: impleme
On ARM, MSI write transactions from device upstream to the smmu
are conveyed through the iommu. Therefore target physical addresses
must be mapped and DOMAIN_ATTR_MSI_MAPPING is set to advertise
this requirement on arm-smmu and arm-smmu-v3.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
Hi Thomas,
On 02/26/2016 07:19 PM, Thomas Gleixner wrote:
> On Fri, 26 Feb 2016, Eric Auger wrote:
>> +static int msi_map_doorbell(struct iommu_domain *d, struct msi_msg *msg)
>> +{
>> +#ifdef CONFIG_IOMMU_DMA_RESERVED
>> +dma_addr_t iova;
>> +
Hi Thomas,
On 02/26/2016 07:06 PM, Thomas Gleixner wrote:
> On Fri, 26 Feb 2016, Eric Auger wrote:
>
>> Let's introduce a new msi_domain_info flag value, MSI_FLAG_IRQ_REMAPPING
>> meant to tell the domain supports IRQ REMAPPING, also known as Interrupt
>> Translat
-space must use this information to allocate an
IOVA contiguous region of size msi_iova_pages * ffs(iova_pgsizes) and pass
it with VFIO_IOMMU_MAP_DMA iotcl (VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA set).
Signed-off-by: Eric Auger
---
Currently it is assumed a single doorbell page is used per MSI
d-off-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 6f1ea3d..692e9a2 100644
--- a/drivers/vfio/vfio_iommu_type1.c
+++ b/drivers
address yet. The host kernel will use those iova when needed, typically
when the VFIO-PCI device allocates its MSIs.
This patch also handles the destruction of the reserved binding RB-tree and
domain's iova_domains.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
---
v3 -> v
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- remove static implementation in case CONFIG_PCI_MSI_IRQ_DOMAIN is not set
---
kernel/irq/msi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/irq/msi.c b/ke
track when the doorbell address changes. On domain deactivate,
we now also call the composition function with a new erase parameter.
In case the mapping fails we just WARN_ON.
Signed-off-by: Eric Auger
---
v3 -> v4:
- that code was formely in irq-gic-common.c
"irqchip/gicv2m/v3-its
after "vfio/type1: also check IRQ
remapping capability at msi domain" else the legacy interrupt
assignment gets broken with arm-smmu.
Signed-off-by: Eric Auger
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/dri
pports IRQ remapping.
Then we check at group level if all devices have safe interrupts: if not,
we only allow the group to be attached if allow_unsafe_interrupts is set.
At this point ARM sMMU still advertises IOMMU_CAP_INTR_REMAP. This is
changed in next patch.
Signed-off-by: Eric Auger
--
is directly returned.
Each time an iova is successfully returned a binding ref count is
incremented.
iommu_put_single_reserved decrements the ref count and when this latter
is null, the mapping is destroyed and the iova is released.
Signed-off-by: Eric Auger
Signed-off-by: Ankit Jindal
Signed
s the first HW advertising that feature.
Signed-off-by: Eric Auger
---
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 3 ++-
include/linux/msi.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c
b/drivers/irqchip/irq-g
frame binding. Allocation function
within the reserved iova domain will be introduced in subsequent patches.
Those functions are implemented and exposed if CONFIG_IOMMU_DMA_RESERVED
is seta.
Signed-off-by: Eric Auger
---
v3 -> v4:
- formerly in "iommu/arm-smmu: impleme
Introduce a new function whose role is to unmap all allocated
reserved IOVAs and free the reserved iova domain
Signed-off-by: Eric Auger
---
v3 -> v4:
- previously "iommu/arm-smmu: relinquish reserved resources on
domain deletion"
---
drivers/iommu/dma-reserved
erved slots
- use of a vfio_domain iova_domain to manage iova allocation within the
window provided by the userspace
- vfio alloc_map/unmap_free take a vfio_group handle
- vfio_group handle is cached in vfio_pci_device
- add ref counting to bindings
- user modality enabled at the end of the series
Eric Au
to the iova_domain
and RB tree.
Signed-off-by: Eric Auger
---
drivers/iommu/iommu.c | 1 +
include/linux/iommu.h | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 0e3b009..7b2bb94 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu
s are within the 1MB PA region [FEE0_h -
FEF0_000h] window which directly targets the APIC configuration space and
hence bypass the sMMU.
Signed-off-by: Bharat Bhushan
Signed-off-by: Eric Auger
---
RFC v1 -> v1:
- the data field is not used
- for this attribute domain_get_attr simply returns
single page mapping one MSI frame (GICv2m
frame or ITS GITS_TRANSLATER frame).
Signed-off-by: Eric Auger
---
v3 -> v4:
- that code was formerly in "iommu/arm-smmu: add a reserved binding RB tree"
---
drivers/iommu/dma-reserved-iommu.c | 60 ++
1
Hi Marc,
On 02/18/2016 05:51 PM, Marc Zyngier wrote:
> On 18/02/16 16:42, Eric Auger wrote:
>> Hello,
>> On 02/18/2016 12:06 PM, Marc Zyngier wrote:
>>> On Fri, 12 Feb 2016 08:13:09 +
>>> Eric Auger wrote:
>>>
>>>&g
Hi Marc,
On 02/18/2016 04:47 PM, Marc Zyngier wrote:
> On 18/02/16 15:33, Eric Auger wrote:
>> Hi Marc,
>> On 02/18/2016 12:33 PM, Marc Zyngier wrote:
>>> On Fri, 12 Feb 2016 08:13:17 +
>>> Eric Auger wrote:
>>>
>>>> In case the msi_des
Hello,
On 02/18/2016 12:06 PM, Marc Zyngier wrote:
> On Fri, 12 Feb 2016 08:13:09 +
> Eric Auger wrote:
>
>> This patch introduces iommu_get/put_single_reserved.
>>
>> iommu_get_single_reserved allows to allocate a new reserved iova page
>> and map it onto
Hi Marc,
On 02/18/2016 12:33 PM, Marc Zyngier wrote:
> On Fri, 12 Feb 2016 08:13:17 +
> Eric Auger wrote:
>
>> In case the msi_desc references a device attached to an iommu
>> domain, the msi address needs to be mapped in the IOMMU. Else any
>> MSI write tra
Hi Marc,
On 02/18/2016 10:34 AM, Marc Zyngier wrote:
> On Fri, 12 Feb 2016 08:13:04 +
> Eric Auger wrote:
>
>> This patch allows the user-space to retrieve whether msi write
>> transaction addresses must be mapped. This is returned through the
>> VFIO_IOMMU_GE
Hi Robin,
On 02/18/2016 12:09 PM, Robin Murphy wrote:
> Hi Eric,
>
> On 12/02/16 08:13, Eric Auger wrote:
>> Implement alloc/free_reserved_iova_domain for arm-smmu. we use
>> the iova allocator (iova.c). The iova_domain is attached to the
>> arm_smmu_domain struc
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- remove static implementation in case CONFIG_PCI_MSI_IRQ_DOMAIN is not set
---
kernel/irq/msi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/irq/msi.c b/ke
controller
supports IRQ remapping.
Then we check at group level if all devices have safe interrupts: if not
only allow the group to be attached if allow_unsafe_interrupts is set.
At this point ARM sMMU still advertises IOMMU_CAP_INTR_REMAP. This is
changed in next patch.
Signed-off-by: Eric Auger
Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu. Indeed the
irq_remapping capability is abstracted on irqchip side for ARM as
opposed to Intel IOMMU featuring IRQ remapping HW.
So to check IRQ remmapping capability, the msi domain needs to be
checked instead.
Signed-off-by: Eric Auger
zeroes all
the fields.
Signed-off-by: Eric Auger
---
v2 -> v3:
- protect iova/addr manipulation with CONFIG_ARCH_DMA_ADDR_T_64BIT and
CONFIG_PHYS_ADDR_T_64BIT
- only expose gic_pci_msi_domain_write_msg in case CONFIG_IOMMU_API &
CONFIG_PCI_MSI_IRQ_DOMAIN are set.
- gic_set/unset_msi_ad
s are within the 1MB PA region [FEE0_h -
FEF0_000h] window which directly targets the APIC configuration space and
hence bypass the sMMU.
Signed-off-by: Bharat Bhushan
Signed-off-by: Eric Auger
---
RFC v1 -> v1:
- the data field is not used
- for this attribute domain_get_attr simply returns
is null, the mapping is destroyed and the iova is released.
Signed-off-by: Eric Auger
Signed-off-by: Ankit Jindal
Signed-off-by: Pranavkumar Sawargaonkar
Signed-off-by: Bharat Bhushan
---
v2 -> v3:
- remove static implementation of iommu_get_single_reserved &
iommu_put_single_reserv
s the first HW advertising that feature.
Signed-off-by: Eric Auger
---
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 3 ++-
include/linux/msi.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c
b/drivers/irqchip/irq-g
single page mapping one MSI frame (GICv2m
frame or ITS GITS_TRANSLATER frame).
Signed-off-by: Eric Auger
---
---
drivers/iommu/arm-smmu.c | 65 +++-
1 file changed, 64 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu
This patch allows the user-space to retrieve whether msi write
transaction addresses must be mapped. This is returned through the
VFIO_IOMMU_GET_INFO API and its new flag: VFIO_IOMMU_INFO_REQUIRE_MSI_MAP.
Signed-off-by: Bharat Bhushan
Signed-off-by: Eric Auger
---
RFC v1 -> v1:
- derived f
d-off-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index c5b57e1..b9326c9 100644
--- a/drivers/vfio/vfio_iommu_type1.c
+++ b/drivers
Implement alloc/free_reserved_iova_domain for arm-smmu. we use
the iova allocator (iova.c). The iova_domain is attached to the
arm_smmu_domain struct. A mutex is introduced to protect it.
Signed-off-by: Eric Auger
---
v2 -> v3:
- select IOMMU_IOVA when ARM_SMMU or ARM_SMMU_V3 is set
v1 -&
yet. The host kernel will use those iova when needed, typically
when the VFIO-PCI device allocates its MSI's.
This patch also handles the destruction of the reserved binding RB-tree and
domain's iova_domains.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
---
v1 -> v2:
-
arm_smmu_unmap_reserved releases all reserved binding resources:
destroy all bindings, free iova, free iova_domain. This happens
on domain deletion.
Signed-off-by: Eric Auger
---
drivers/iommu/arm-smmu.c | 34 +-
1 file changed, 29 insertions(+), 5 deletions
window provided by the userspace
- vfio alloc_map/unmap_free take a vfio_group handle
- vfio_group handle is cached in vfio_pci_device
- add ref counting to bindings
- user modality enabled at the end of the series
Eric Auger (15):
iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute
vfio: expose MS
Implement the iommu_get/put_single_reserved API in arm-smmu.
In order to track which physical address is already mapped we
use the RB tree indexed by PA.
Signed-off-by: Eric Auger
---
v1 -> v2:
- previously in vfio_iommu_type1.c
---
drivers/iommu/arm-smmu.c |
frame binding. Allocation function
within the reserved iova domain will be introduced in subsequent patches.
This is the responsability of the API user to make sure any IOVA
belonging to that domain are allocated with those allocation functions.
Signed-off-by: Eric Auger
---
v2 -> v3:
- rem
Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu. Indeed the
irq_remapping capability is abstracted on irqchip side for ARM as
opposed to Intel IOMMU featuring IRQ remapping HW.
So to check IRQ remmapping capability, the msi domain needs to be
checked instead.
Signed-off-by: Eric Auger
zeroes all
the fields.
Signed-off-by: Eric Auger
---
drivers/irqchip/irq-gic-common.c | 60
drivers/irqchip/irq-gic-common.h | 5 +++
drivers/irqchip/irq-gic-v2m.c| 3 +-
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 3 +-
4 files changed
controller
supports IRQ remapping.
Then we check at group level if all devices have safe interrupts: if not
only allow the group to be attached if allow_unsafe_interrupts is set.
At this point ARM sMMU still advertises IOMMU_CAP_INTR_REMAP. This is
changed in next patch.
Signed-off-by:
Implement the iommu_get/put_single_reserved API in arm-smmu.
In order to track which physical address is already mapped we
use the RB tree indexed by PA.
Signed-off-by: Eric Auger
---
v1 -> v2:
- previously in vfio_iommu_type1.c
---
drivers/iommu/arm-smmu.c |
We plan to use msi_get_domain_info in VFIO module so let's export it.
Signed-off-by: Eric Auger
---
include/linux/msi.h | 4
kernel/irq/msi.c| 1 +
2 files changed, 5 insertions(+)
diff --git a/include/linux/msi.h b/include/linux/msi.h
index 03eda72..df19315 100644
--- a/include/
yet. The host kernel will use those iova when needed, typically
when the VFIO-PCI device allocates its MSI's.
This patch also handles the destruction of the reserved binding RB-tree and
domain's iova_domains.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
---
v1 -> v2:
-
arm_smmu_unmap_reserved releases all reserved binding resources:
destroy all bindings, free iova, free iova_domain. This happens
on domain deletion.
Signed-off-by: Eric Auger
---
drivers/iommu/arm-smmu.c | 34 +-
1 file changed, 29 insertions(+), 5 deletions
s the first HW advertising that feature.
Signed-off-by: Eric Auger
---
drivers/irqchip/irq-gic-v3-its.c | 1 +
include/linux/msi.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 3447549..a5e0d8b 100644
This patch allows the user-space to retrieve whether msi write
transaction addresses must be mapped. This is returned through the
VFIO_IOMMU_GET_INFO API and its new flag: VFIO_IOMMU_INFO_REQUIRE_MSI_MAP.
Signed-off-by: Bharat Bhushan
Signed-off-by: Eric Auger
---
RFC v1 -> v1:
- derived f
frame binding. Allocation function
within the reserved iova domain will be introduced in subsequent patches.
This is the responsability of the API user to make sure any IOVA
belonging to that domain are allocated with those allocation functions.
Signed-off-by: Eric Auger
---
v1 -> v2:
- mo
d-off-by: Eric Auger
---
drivers/vfio/vfio_iommu_type1.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index c5b57e1..b9326c9 100644
--- a/drivers/vfio/vfio_iommu_type1.c
+++ b/drivers
single page mapping one MSI frame (GICv2m
frame or ITS GITS_TRANSLATER frame).
Signed-off-by: Eric Auger
---
drivers/iommu/arm-smmu.c | 65 +++-
1 file changed, 64 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm
take a vfio_group handle
- vfio_group handle is cached in vfio_pci_device
- add ref counting to bindings
- user modality enabled at the end of the series
Eric Auger (15):
iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute
vfio: expose MSI mapping requirement through VFIO_IOMMU_GET_INFO
vfio: int
is null, the mapping is destroyed and the iova is released.
Signed-off-by: Eric Auger
Signed-off-by: Ankit Jindal
Signed-off-by: Pranavkumar Sawargaonkar
Signed-off-by: Bharat Bhushan
---
Currently the ref counting is does not really used. All bindings will be
destroyed when the domain is
s are within the 1MB PA region [FEE0_h -
FEF0_000h] window which directly targets the APIC configuration space and
hence bypass the sMMU.
Signed-off-by: Bharat Bhushan
Signed-off-by: Eric Auger
---
RFC v1 -> v1:
- the data field is not used
- for this attribute domain_get_attr simply returns
Implement alloc/free_reserved_iova_domain for arm-smmu. we use
the iova allocator (iova.c). The iova_domain is attached to the
arm_smmu_domain struct. A mutex is introduced to protect it.
Signed-off-by: Eric Auger
---
v1 -> v2:
- formerly implemented in vfio_iommu_type1
---
drivers/iommu/
Hi Alex, Christoffer,
On 02/08/2016 10:48 AM, Christoffer Dall wrote:
> On Fri, Feb 05, 2016 at 11:17:00AM -0700, Alex Williamson wrote:
>> On Fri, 5 Feb 2016 18:32:07 +0100
>> Eric Auger wrote:
>>
>>> Hi Alex,
>>>
>>> I tried to sketch a proposal f
Hi Alex,
I tried to sketch a proposal for guaranteeing the IRQ integrity when
doing ARM PCI/MSI passthrough with ARM GICv2M msi-controller. This is
based on extended VFIO group viability control, as detailed below.
As opposed to ARM GICv3 ITS, this MSI controller does *not* support IRQ
remapping.
Hi Alex,
On 01/29/2016 08:33 PM, Alex Williamson wrote:
> On Fri, 2016-01-29 at 15:35 +0100, Eric Auger wrote:
>> Hi Alex,
>> On 01/28/2016 10:51 PM, Alex Williamson wrote:
>>> On Tue, 2016-01-26 at 13:12 +, Eric Auger wrote:
>>>> This series addresses KVM
Hi Alex,
On 01/28/2016 10:51 PM, Alex Williamson wrote:
> On Tue, 2016-01-26 at 13:12 +0000, Eric Auger wrote:
>> This series addresses KVM PCIe passthrough with MSI enabled on ARM/ARM64.
>> It pursues the efforts done on [1], [2], [3]. It also aims at covering the
>> same
Hi Pavel,
On 01/28/2016 08:13 AM, Pavel Fedin wrote:
> Hello!
>
>> x86 isn't problem-free in this space. An x86 VM is going to know that
>> the 0xfee0 address range is special, it won't be backed by RAM and
>> won't be a DMA target, thus we'll never attempt to map it for an iova
>> address.
Hi Pavel,
On 01/26/2016 06:25 PM, Pavel Fedin wrote:
> Hello!
> I'd like just to clarify some things for myself and better wrap my head
> around it...
>
>> On x86 all accesses to the 1MB PA region [FEE0_h - FEF0_000h] are
>> directed
>> as interrupt messages: accesses to this special PA wi
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