From: Samuel Holland Sent: Friday, July 1, 2022 1:01 PM
>
> Now that the irq_data_update_affinity helper exists, enforce its use
> by returning a a const cpumask from irq_data_get_affinity_mask.
Nit: duplicate word "a"
>
> Since the previous commit already updated places that needed to call
>
From: h...@lst.de Sent: Tuesday, May 31, 2022 12:17 AM
>
> On Mon, May 30, 2022 at 01:52:37AM +, Michael Kelley (LINUX) wrote:
> > B) The contents of the memory buffer must transition between
> > encrypted and not encrypted. The hardware doesn't provide
> > any mechanism to do such a
From: Christoph Hellwig Sent: Monday, May 16, 2022 12:35 AM
>
> I don't really understand how 'childs' fit in here. The code also
> doesn't seem to be usable without patch 2 and a caller of the
> new functions added in patch 2, so it is rather impossible to review.
>
> Also:
>
> 1) why is
From: Robin Murphy Sent: Tuesday, May 10, 2022 9:34 AM
>
> On 2022-05-10 15:21, Tianyu Lan wrote:
> > From: Tianyu Lan
> >
> > swiotlb_find_slots() skips slots according to io tlb aligned mask
> > calculated from min aligned mask and original physical address
> > offset. This affects max
From: Christoph Hellwig Sent: Sunday, April 3, 2022 10:06 PM
>
> Pass a bool to pass if swiotlb needs to be enabled based on the
Wording problems. I'm not sure what you meant to say.
> addressing needs and replace the verbose argument with a set of
> flags, including one to force enable
From: Robin Murphy Sent: Thursday, March 24, 2022 4:59 AM
>
> On 2022-03-23 20:31, Michael Kelley wrote:
> > VMbus synthetic devices are not represented in the ACPI DSDT -- only
> > the top level VMbus device is represented. As a result, on ARM64
> > coherence information in the _CCA method is
From: Robin Murphy Sent: Friday, March 18, 2022 4:08 AM
>
> On 2022-03-17 19:13, Michael Kelley (LINUX) wrote:
> > From: Robin Murphy Sent: Thursday, March 17, 2022
> 10:20 AM
> >>
> >> On 2022-03-17 16:25, Michael Kelley via iommu wrote:
> >>> Add a wrapper function to set dma_coherent,
From: Robin Murphy Sent: Friday, March 18, 2022 3:58 AM
>
> On 2022-03-18 05:12, Michael Kelley (LINUX) wrote:
> > From: Robin Murphy Sent: Thursday, March 17, 2022
> 10:15 AM
> >>
> >> On 2022-03-17 16:25, Michael Kelley via iommu wrote:
> >>> PCI pass-thru devices in a Hyper-V VM are
From: Robin Murphy Sent: Thursday, March 17, 2022 10:15
AM
>
> On 2022-03-17 16:25, Michael Kelley via iommu wrote:
> > PCI pass-thru devices in a Hyper-V VM are represented as a VMBus
> > device and as a PCI device. The coherence of the VMbus device is
> > set based on the VMbus node in ACPI,
From: Robin Murphy Sent: Thursday, March 17, 2022 10:20
AM
>
> On 2022-03-17 16:25, Michael Kelley via iommu wrote:
> > Add a wrapper function to set dma_coherent, avoiding the need for
> > complex #ifdef's when setting it in architecture independent code.
>
> No. It might happen to work out
From: Robin Murphy Sent: Thursday, March 17, 2022 9:31 AM
>
> On 2022-03-17 16:25, Michael Kelley wrote:
> > Export acpi_get_dma_attr() so that it can be used by the Hyper-V
> > VMbus driver, which may be built as a module. The related function
> > acpi_dma_configure_id() is already exported.
>
From: Dongli Zhang Sent: Friday, March 4, 2022 10:28
AM
>
> Hi Michael,
>
> On 3/4/22 10:12 AM, Michael Kelley (LINUX) wrote:
> > From: Christoph Hellwig Sent: Tuesday, March 1, 2022 2:53 AM
> >>
> >> Power SVM wants to allocate a swiotlb buffer that is not restricted to low
> >> memory for
From: Christoph Hellwig Sent: Tuesday, March 1, 2022 2:53 AM
>
> Power SVM wants to allocate a swiotlb buffer that is not restricted to low
> memory for
> the trusted hypervisor scheme. Consolidate the support for this into the
> swiotlb_init
> interface by adding a new flag.
Hyper-V
From: Christoph Hellwig Sent: Monday, February 28, 2022 3:31 AM
>
> On Mon, Feb 28, 2022 at 02:53:39AM +, Michael Kelley (LINUX) wrote:
> > From: Christoph Hellwig Sent: Sunday, February 27, 2022 6:31
> > AM
> > >
> > > Pass a bool to pass if swiotlb needs to be enabled based on the
> > >
From: Christoph Hellwig Sent: Sunday, February 27, 2022 6:31 AM
>
> Pass a bool to pass if swiotlb needs to be enabled based on the
> addressing needs and replace the verbose argument with a set of
> flags, including one to force enable bounce buffering.
>
> Note that this patch removes the
From: Tianyu Lan Sent: Tuesday, February 1, 2022 8:32 AM
>
> netvsc_device_remove() calls vunmap() inside which should not be
> called in the interrupt context. Current code calls hv_unmap_memory()
> in the free_netvsc_device() which is rcu callback and maybe called
> in the interrupt context.
From: Tianyu Lan Sent: Wednesday, January 26, 2022 8:11 AM
>
> In Hyper-V Isolation VM, swiotlb bnounce buffer size maybe 1G at most
> and there maybe no enough memory from 0 to 4G according to memory layout.
> Devices in Isolation VM can use memory above 4G as DMA memory. Set swiotlb_
>
From: Tianyu Lan Sent: Wednesday, January 26, 2022 8:11 AM
>
> Hyper-V Isolation VM and AMD SEV VM uses swiotlb bounce buffer to
> share memory with hypervisor. Current swiotlb bounce buffer is only
> allocated from 0 to ARCH_LOW_ADDRESS_LIMIT which is default to
> 0xUL. Isolation VM and
From: Thomas Gleixner Sent: Wednesday, December 15, 2021
8:36 AM
>
> On Wed, Dec 15 2021 at 17:18, Thomas Gleixner wrote:
>
> > On Tue, Dec 14 2021 at 22:19, Thomas Gleixner wrote:
> >> On Tue, Dec 14 2021 at 14:56, Nishanth Menon wrote:
> >>
> >> thanks for trying. I'll have a look again with
From: Tianyu Lan Sent: Sunday, December 12, 2021 11:14 PM
>
> Hyper-V provides two kinds of Isolation VMs. VBS(Virtualization-based
> security) and AMD SEV-SNP unenlightened Isolation VMs. This patchset
> is to add support for these Isolation VM support in Linux.
>
> The memory of these vms are
From: Tianyu Lan Sent: Monday, December 6, 2021 11:56 PM
>
> Hyper-V provides Isolation VM which has memory encrypt support. Add
> hyperv_cc_platform_has() and return true for check of GUEST_MEM_ENCRYPT
> attribute.
>
> Signed-off-by: Tianyu Lan
> ---
> Change since v3:
> * Change code
From: Tianyu Lan Sent: Monday, December 6, 2021 11:56 PM
>
> hyperv Isolation VM requires bounce buffer support to copy
> data from/to encrypted memory and so enable swiotlb force
> mode to use swiotlb bounce buffer for DMA transaction.
>
> In Isolation VM with AMD SEV, the bounce buffer needs
From: Haiyang Zhang Sent: Wednesday, December 8, 2021
12:14 PM
> > From: Tianyu Lan
> > Sent: Tuesday, December 7, 2021 2:56 AM
[snip]
> > static inline int netvsc_send_pkt(
> > struct hv_device *device,
> > struct hv_netvsc_packet *packet,
> > @@ -986,14 +1105,24 @@ static inline
From: Tianyu Lan Sent: Wednesday, December 1, 2021 8:03 AM
>
> hyperv Isolation VM requires bounce buffer support to copy
> data from/to encrypted memory and so enable swiotlb force
> mode to use swiotlb bounce buffer for DMA transaction.
>
> In Isolation VM with AMD SEV, the bounce buffer
From: Tianyu Lan Sent: Wednesday, December 1, 2021 8:03 AM
>
> In Isolation VM, all shared memory with host needs to mark visible
> to host via hvcall. vmbus_establish_gpadl() has already done it for
> netvsc rx/tx ring buffer. The page buffer used by vmbus_sendpacket_
> pagebuffer() stills need
From: Tianyu Lan Sent: Tuesday, November 23, 2021 6:31 AM
>
> In Isolation VM, all shared memory with host needs to mark visible
> to host via hvcall. vmbus_establish_gpadl() has already done it for
> netvsc rx/tx ring buffer. The page buffer used by vmbus_sendpacket_
> pagebuffer() stills need
From: Tianyu Lan Sent: Tuesday, November 23, 2021 6:31 AM
>
> In Isolation VM, all shared memory with host needs to mark visible
> to host via hvcall. vmbus_establish_gpadl() has already done it for
> netvsc rx/tx ring buffer. The page buffer used by vmbus_sendpacket_
> pagebuffer() stills need
From: Tianyu Lan Sent: Tuesday, November 23, 2021 6:31 AM
>
> hyperv Isolation VM requires bounce buffer support to copy
> data from/to encrypted memory and so enable swiotlb force
> mode to use swiotlb bounce buffer for DMA transaction.
>
> In Isolation VM with AMD SEV, the bounce buffer needs
From: Tianyu Lan Sent: Tuesday, November 23, 2021 6:31 AM
>
> In Isolation VM with AMD SEV, bounce buffer needs to be accessed via
> extra address space which is above shared_gpa_boundary (E.G 39 bit
> address line) reported by Hyper-V CPUID ISOLATION_CONFIG. The access
> physical address will
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