Hi Robin,
My apology for noise.
I have taken care of your comments.
but these whole patch-set, (specially PCI patch-set) inbound memory
addition depends on Lorenzo's patch-set
.
So I will be posting version 8 patches for IOVA reservation soon after
Lorenzo's patches are made in.
Regards,
Oza.
On Fri, May 5, 2017 at 9:21 PM, Robin Murphy wrote:
> On 04/05/17 19:52, Oza Oza wrote:
>> On Thu, May 4, 2017 at 11:50 PM, Robin Murphy wrote:
>>> On 03/05/17 05:46, Oza Pawandeep wrote:
this patch reserves the iova for PCI masters.
ARM64
On Thu, May 18, 2017 at 12:43 AM, Arnd Bergmann wrote:
> On Tue, May 16, 2017 at 7:22 AM, Oza Pawandeep wrote:
>> current device framework and OF framework integration assumes
>> dma-ranges in a way where memory-mapped devices define their
>> dma-ranges.
On Thu, May 18, 2017 at 12:43 AM, Arnd Bergmann wrote:
> On Tue, May 16, 2017 at 7:22 AM, Oza Pawandeep wrote:
>> current device framework and OF framework integration assumes
>> dma-ranges in a way where memory-mapped devices define their
>> dma-ranges.
On Wed, May 17, 2017 at 10:40 PM, Bjorn Helgaas wrote:
> On Tue, May 16, 2017 at 10:52:05AM +0530, Oza Pawandeep wrote:
>> current device framework and OF framework integration assumes
>
> s/current/The current/
>
>> dma-ranges in a way where memory-mapped devices define their
On Wed, May 17, 2017 at 10:41 PM, Bjorn Helgaas wrote:
> On Tue, May 16, 2017 at 10:52:06AM +0530, Oza Pawandeep wrote:
>> this patch reserves the IOVA for PCI masters.
>> ARM64 based SOCs may have scattered memory banks.
>> such as iproc based SOC has
>>
>> <0x
On Sat, May 6, 2017 at 11:00 AM, Oza Oza wrote:
> On Fri, May 5, 2017 at 8:55 PM, Robin Murphy wrote:
>> On 04/05/17 19:41, Oza Oza wrote:
>> [...]
> 5) leaves scope of adding PCI flag handling for inbound memory
> by the new function.
On Fri, May 5, 2017 at 9:21 PM, Robin Murphy wrote:
> On 04/05/17 19:52, Oza Oza wrote:
>> On Thu, May 4, 2017 at 11:50 PM, Robin Murphy wrote:
>>> On 03/05/17 05:46, Oza Pawandeep wrote:
this patch reserves the iova for PCI masters.
ARM64
On Fri, May 5, 2017 at 8:55 PM, Robin Murphy wrote:
> On 04/05/17 19:41, Oza Oza wrote:
> [...]
5) leaves scope of adding PCI flag handling for inbound memory
by the new function.
>>>
>>> Which flags would ever actually matter? DMA windows aren't going to be
>>> to
On Thu, May 4, 2017 at 11:50 PM, Robin Murphy wrote:
> On 03/05/17 05:46, Oza Pawandeep wrote:
>> this patch reserves the iova for PCI masters.
>> ARM64 based SOCs may have scattered memory banks.
>> such as iproc based SOC has
>>
>> <0x 0x8000 0x0 0x8000>,
On Thu, May 4, 2017 at 11:32 PM, Robin Murphy wrote:
> [apologies for the silence - I've been on holiday]
>
> On 03/05/17 05:46, Oza Pawandeep wrote:
>> current device framework and of framework integration assumes
>> dma-ranges in a way where memory-mapped devices define
On Thu, May 4, 2017 at 11:50 PM, Robin Murphy wrote:
> On 03/05/17 05:46, Oza Pawandeep wrote:
>> this patch reserves the iova for PCI masters.
>> ARM64 based SOCs may have scattered memory banks.
>> such as iproc based SOC has
>>
>> <0x 0x8000 0x0 0x8000>,
On Thu, May 4, 2017 at 11:32 PM, Robin Murphy wrote:
> [apologies for the silence - I've been on holiday]
>
> On 03/05/17 05:46, Oza Pawandeep wrote:
>> current device framework and of framework integration assumes
>> dma-ranges in a way where memory-mapped devices define
I will send v2 after removing GERRIT details from
commit message. My apologies for the noise.
Regards,
Oza
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I will send v2 after removing GERRIT details from
commit message. My apologies for the noise.
Regards,
Oza
___
iommu mailing list
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I will send v2 after removing GERRIT details from
commit message. My apologies for the noise.
Regards,
Oza
___
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On Mon, Apr 24, 2017 at 7:50 PM, Rob Herring wrote:
> On Sat, Apr 22, 2017 at 3:08 AM, Oza Pawandeep wrote:
>> current device frmework and of framework integration assumes dma-ranges
>> in a way where memory-mapped devices define their dma-ranges.
>>
On Wed, Mar 29, 2017 at 11:12 PM, Robin Murphy wrote:
> On 29/03/17 06:46, Oza Oza wrote:
>> On Wed, Mar 29, 2017 at 10:23 AM, Oza Oza wrote:
>>> On Wed, Mar 29, 2017 at 12:27 AM, Robin Murphy wrote:
For PCI masters not
On Tue, Mar 28, 2017 at 7:43 PM, Rob Herring wrote:
> On Tue, Mar 28, 2017 at 12:27 AM, Oza Oza wrote:
>> On Mon, Mar 27, 2017 at 8:16 PM, Rob Herring wrote:
>>> On Sat, Mar 25, 2017 at 12:31 AM, Oza Pawandeep
>>>
On Thu, Mar 30, 2017 at 8:51 AM, Oza Oza wrote:
> On Wed, Mar 29, 2017 at 11:12 PM, Robin Murphy wrote:
>> On 29/03/17 06:46, Oza Oza wrote:
>>> On Wed, Mar 29, 2017 at 10:23 AM, Oza Oza wrote:
On Wed, Mar 29, 2017 at 12:27
On Wed, Mar 29, 2017 at 10:13 AM, Oza Oza wrote:
> On Tue, Mar 28, 2017 at 7:59 PM, Robin Murphy wrote:
>> On 28/03/17 06:27, Oza Oza wrote:
>>> On Mon, Mar 27, 2017 at 8:16 PM, Rob Herring wrote:
On Sat, Mar 25, 2017 at 12:31
On Wed, Mar 29, 2017 at 11:12 PM, Robin Murphy wrote:
> On 29/03/17 06:46, Oza Oza wrote:
>> On Wed, Mar 29, 2017 at 10:23 AM, Oza Oza wrote:
>>> On Wed, Mar 29, 2017 at 12:27 AM, Robin Murphy wrote:
For PCI masters not
On Wed, Mar 29, 2017 at 10:23 AM, Oza Oza wrote:
> On Wed, Mar 29, 2017 at 12:27 AM, Robin Murphy wrote:
>> For PCI masters not represented in DT, we pass the OF node of their
>> associated host bridge to of_dma_configure(), such that they can inherit
On Wed, Mar 29, 2017 at 12:27 AM, Robin Murphy wrote:
> For PCI masters not represented in DT, we pass the OF node of their
> associated host bridge to of_dma_configure(), such that they can inherit
> the appropriate DMA configuration from whatever is described there.
>
On Tue, Mar 28, 2017 at 7:59 PM, Robin Murphy wrote:
> On 28/03/17 06:27, Oza Oza wrote:
>> On Mon, Mar 27, 2017 at 8:16 PM, Rob Herring wrote:
>>> On Sat, Mar 25, 2017 at 12:31 AM, Oza Pawandeep
>>> wrote:
it is possible that
On Mon, Mar 27, 2017 at 8:16 PM, Rob Herring wrote:
> On Sat, Mar 25, 2017 at 12:31 AM, Oza Pawandeep wrote:
>> it is possible that PCI device supports 64-bit DMA addressing,
>> and thus it's driver sets device's dma_mask to DMA_BIT_MASK(64),
>> however PCI
Hi Robin,
I have made 3 separate patches now, which gives clear idea about the
changes.
we can have discussion there.
Regards,
Oza.
-Original Message-
From: Robin Murphy [mailto:robin.mur...@arm.com]
Sent: Monday, March 20, 2017 9:14 PM
To: Oza Oza
Cc: Joerg Roedel;
+ linux-pci
Regards,
Oza.
-Original Message-
From: Oza Pawandeep [mailto:oza@broadcom.com]
Sent: Friday, March 17, 2017 11:41 AM
To: Joerg Roedel; Robin Murphy
Cc: iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org;
linux-arm-ker...@lists.infradead.org;
Hi Robin,
Currently this patch involves multiple framework.
I have coalesced the patch into one to present it as a whole as one RFC.
it involves
1) pcie of framework changes
2) iommu ops
3) pci dma-ranges discussion.
4) also it talks about the bug in device tree framework (dma-ranges) (just
in
Hi,
There are certain areas which requires contemplation.
And this problem requires more attention from Pci of framework and iommu,
and integration of both.
Regards,
Oza.
-Original Message-
From: Oza Pawandeep [mailto:oza@broadcom.com]
Sent: Friday, March 17, 2017 11:41 AM
To: Joerg
Hi Robin,
I tried applying
[1]:http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1306545.ht
ml
[3]:http://www.spinics.net/lists/arm-kernel/msg566947.html
Because of 3 its crashing on our platform. (with SDHCI running with iommu
both enabled and disabled)
[ 19.925018] PC is at
My responses inline:
-Original Message-
From: Robin Murphy [mailto:robin.mur...@arm.com]
Sent: Tuesday, March 14, 2017 4:27 PM
To: Oza Pawandeep; Joerg Roedel
Cc: iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org;
linux-arm-ker...@lists.infradead.org;
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