Hi Russell,
On 18/02/2020 20:41, Christoph Hellwig wrote:
Hi Russell,
this series fixes the arm dma coherent allocator to take the bus dma
mask into account, similar to what other architectures do. Without
this devices that support 64-bit mask, but are limited by the
interconnect won't work
Hi Christoph / Hans,
SATA has been broken on TI platforms with LPAE, on systems with RAM addresses >
32-bits,
(e.g. DRA7 rev.H+) since v4.18.
The commit at which it breaks is
21e07dba9fb1179148089d611fc9e6e70d1887c3 ("scsi: reduce use of block bounce
buffers").
The effect is that the SATA
