Re: [PATCH 00/20] iommu/amd: Use generic IOVA allocator

On 2016年07月12日 18:55, Joerg Roedel wrote: Hey Vincent, On Tue, Jul 12, 2016 at 05:03:08PM +0800, Wan Zongshun wrote: Currently, those patches can not work at my eCarrizo board. When I merged your patches, boot failed, and no any info print to me. I set iommu=pt, it also does not work; set

Re: [PATCH] iommu/amd: Fix unity mapping initialization race

linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu -- --- Vincent Wan(Zongshun) www.mcuos.com ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu

Re: [PATCH] iommu/amd: Fix unity mapping initialization race

On 2016年07月11日 15:19, Joerg Roedel wrote: On Sun, Jul 10, 2016 at 07:40:53PM +0800, Wan Zongshun wrote: Do you mean we need enable the V and TV bits to DTE entry after all DTEs tables were initialized completely? Yes, this is what my patch does and what fixes the bug that was reported

Re: [PATCH] iommu/amd: Fix unity mapping initialization race

On 2016年07月07日 00:00, Joerg Roedel wrote: From: Joerg Roedel There is a race condition in the AMD IOMMU init code that causes requested unity mappings to be blocked by the IOMMU for a short period of time. This results on boot failures and IO_PAGE_FAULTs on some machines.

Re: [Regression] Amd-Vi + ivrs_ioapic cause kernel oops (4.4, 4.7 fail 3.9 works)

On 2016年07月05日 09:56, sunnydrake wrote: On 04.07.16 16:51, Wan Zongshun wrote: 在 7/4/2016 4:48 AM, sunnydrake 写道: Thanks for reply. On 03.07.16 17:26, Wan Zongshun wrote: 在 7/3/2016 8:59 AM, sunnydrake 写道: [description] working in kernel 3.9 Oops in current 4.4.0-28,4.7.0-040700rc5

Re: [Regression] Amd-Vi + ivrs_ioapic cause kernel oops (4.4, 4.7 fail 3.9 works)

在 7/4/2016 4:48 AM, sunnydrake 写道: Thanks for reply. On 03.07.16 17:26, Wan Zongshun wrote: 在 7/3/2016 8:59 AM, sunnydrake 写道: [description] working in kernel 3.9 Oops in current 4.4.0-28,4.7.0-040700rc5 kernel options ivrs_ioapic[7]=00:14.0 ivrs_ioapic[8]=00:00.1 workaround to fix ivrs

Re: [Regression] Amd-Vi + ivrs_ioapic cause kernel oops (4.4, 4.7 fail 3.9 works)

在 7/3/2016 8:59 AM, sunnydrake 写道: [description] working in kernel 3.9 Oops in current 4.4.0-28,4.7.0-040700rc5 kernel options ivrs_ioapic[7]=00:14.0 ivrs_ioapic[8]=00:00.1 workaround to fix ivrs table cause kernel Oops on boot Do you mean "ivrs_ioapic[7]=00:14.0 ivrs_ioapic[8]=00:00.1" are

Re: [PATCH 1/1] iommu/amd: initialize devid variable before using it

SLOT(devid), > PCI_FUNC(devid)); > > - devid = e->devid; > flags = e->flags; > Sure, thanks for your patch. This is my fault. > ret = add_acpi_hid_device(hid, uid, ,

[PATCH v2] iommu/amd: Add proper error check in two functions

From: Wan Zongshun <vincent@amd.com> This patch is to do the following: 1. Add error check for caller of iommu_device_create. 2. Add error check for caller of iommu_device_link and move 'iommu = amd_iommu_rlookup_table[dev_data->devid]' out of iommuv2 capability condition

Re: [PATCH v2] iommu/amd: Set AMD iommu callbacks for platform bus driver

2016-05-10 21:21 GMT+08:00 Wan Zongshun <vincent@amd.com>: > From: Wan Zongshun <vincent@amd.com> > > AMD has more drivers will use ACPI to platform bus driver later, > all those devices need iommu support, for example: eMMC driver. > > For latest AMD eMMC con

Re: [E1000-devel] AMD-Vi: Event logged IO_PAGE_FAULT - ixgbe Detected Tx Unit Hang - Reset adapter - master disable timed out

2016-06-14 1:40 GMT+08:00 Lutz Vieweg <l...@5t9.de>: > On 06/13/2016 04:46 AM, Wan ZongShun wrote: >>> >>> With "iommu=pt": >>>> >>>> >>>> [4.832580] iommu: Adding device :04:00.0 to group 1

Re: [E1000-devel] AMD-Vi: Event logged IO_PAGE_FAULT - ixgbe Detected Tx Unit Hang - Reset adapter - master disable timed out

0] AGP: This costs you 64MB of RAM >> [0.00] AGP: Mapping aperture over RAM [mem 0xcc00-0xcfff] >> (65536KB) > > I checked and the IOMMU-option is definitely enabled in the BIOS setup. > So I assume right that these message are irrelevant (since AGP as a whole > is irrelevant on

Re: [Patch v4 9/9] iommu/amd: Check the validation of irq table and domain id

Original Message From: Baoquan HE If not valid just skip reserving the old domain id. Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu.c | 4 drivers/iommu/amd_iommu_init.c | 5 +++--

Re: [Patch v4 7/9] iommu/amd: copy old trans table from old kernel

Original Message From: Baoquan HE Here several things need be done: 1) Initialize amd_iommu_dev_table because it was set several times since kdump kernel reboot. We don't need the set because we will copy the content from old kernel.

Re: [Patch v4 6/9] iommu/amd: Add function copy_dev_tables

Original Message Add function copy_dev_tables to copy old DTE of the 1st kernel to the new DTE table. Since all iommu share the same DTE table the copy only need be done once as long as the physical address of old DTE table is retrieved from iommu reg. Besides the old domain

Re: [Patch v4 3/9] iommu/amd: Detect pre enabled translation

Original Message Add functions to check whether translation is already enabled in IOMMU. Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu_init.c | 25 + drivers/iommu/amd_iommu_types.h | 4 2 files changed, 29

[PATCH] iommu/amd: Add proper error check in two functions

From: Wan Zongshun <vincent@amd.com> This patch is to do the following: 1. Add error check for caller of iommu_device_create. 2. Add error check for caller of iommu_device_link and move 'iommu = amd_iommu_rlookup_table[dev_data->devid]' out of iommuv2 capability condition

[PATCH v2] iommu/amd: Set AMD iommu callbacks for platform bus driver

From: Wan Zongshun <vincent@amd.com> AMD has more drivers will use ACPI to platform bus driver later, all those devices need iommu support, for example: eMMC driver. For latest AMD eMMC controller, it will utilize sdhci-acpi.c driver, which will rely on platform bus to match

[PATCH] iommu/amd: Set AMD iommu callbacks for platform bus driver

From: Wan Zongshun <vincent@amd.com> AMD has more drivers will use ACPI to platform bus driver later, all those devices need iommu support, such as eMMC acpi driver. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 4 1 file changed,

[PATCH V3 9/9] iommu/amd: Set AMD iommu callbacks for amba bus

From: Wan Zongshun <vincent@amd.com> AMD Uart DMA belongs to ACPI HID type device, and its driver is basing on AMBA Bus, need also IOMMU support. This patch is just to set the AMD iommu callbacks for amba bus. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu

[PATCH V3 8/9] iommu/amd: Manage iommu_group for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> This patch creates a new function for finding or creating an IOMMU group for acpihid(ACPI Hardware ID) device. The acpihid devices with the same devid will be put into same group and there will have the same domain id and share the same page

[PATCH V3 7/9] iommu/amd: Add iommu support for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> Current IOMMU driver make assumption that the downstream devices are PCI. With the newly added ACPI-HID IVHD device entry support, this is no longer true. This patch is to add dev type check and to distinguish the pci and acpihid device code path.

[PATCH V3 6/9] iommu/amd: Make call-sites of get_device_id aware of its return value

From: Wan Zongshun <vincent@amd.com> This patch is to make the call-sites of get_device_id aware of its return value. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 51 +-- 1 file changed, 41 inser

[PATCH V3 0/9] iommu/amd: enable ACPI hardware ID device support

From: Wan Zongshun <vincent@amd.com> There are some devices indentified using ACPI HID format in AMD chip. This patch series enable iommu support for those ACPI HID device, since the existing AMD iommu only supports PCI bus based device. The latest public version of AMD IOMMU specifi

[PATCH V3 2/9] iommu/amd: Modify ivhd_header structure to support type 11h and 40h

From: Suravee Suthikulpanit This patch modifies the existing struct ivhd_header, which currently only support IVHD type 0x10, to add new fields from IVHD type 11h and 40h. It also modifies the pointer calculation to allow support for IVHD type 11h and 40h

[PATCH V3 3/9] iommu/amd: Use the most comprehensive IVHD type that the driver can support

d_type()) before parsing the contents. [Vincent: fix the build error of IVHD_DEV_ACPI_HID flag not found] Signed-off-by: Wan Zongshun <vincent@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- drivers/iommu/amd_iommu_init.c | 107 ++

[PATCH V3 5/9] iommu/amd: Introduces ivrs_acpihid kernel parameter

From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> This patch introduces a new kernel parameter, ivrs_acpihid. This is used to override existing ACPI-HID IVHD device entry, or add an entry in case it is missing in the IVHD. Signed-off-by: Wan Zongshun <vincent@amd.com>

[PATCH V3 1/9] iommu/amd: Adding Extended Feature Register check for PC support

From: Suravee Suthikulpanit The IVHD header type 11h and 40h introduce the PCSup bit in the EFR Register Image bit fileds. This should be used to determine the IOMMU performance support instead of relying on the PNCounters and PNBanks. Note also that the PNCouters

[PATCH V3 4/9] iommu/amd: Add new map for storing IVHD dev entry type HID

From: Wan Zongshun <vincent@amd.com> This patch introduces acpihid_map, which is used to store the new IVHD device entry extracted from BIOS IVRS table. It also provides a utility function add_acpi_hid_device(), to add this types of devices to the map. Signed-off-by: Wan Zongshun &l

Re: [Patch v3 11/12] iommu/amd: No need to wait iommu completion if no dte irq entry change

Original Message On 01/27/16 at 07:03pm, Wan Zongshun wrote: Original Message alias = amd_iommu_alias_table[devid]; table = irq_lookup_table[alias]; @@ -3688,7 +3688,7 @@ static struct irq_remap_table *get_irq_table(u16 devid, bool

Re: [Patch v3 05/12] iommu/amd: change IOMMU_PTE_P to IOMMU_PTE_V

Original Message On 01/27/16 at 06:18pm, Wan Zongshun wrote: Original Message In amd-vi spec the name of bit0 in DTE is V. But in code it's defined as IOMMU_PTE_P. Here change it to IOMMU_PTE_V to make it be consistent with spec. Hi, Baoquan

Re: [Patch v3 04/12] iommu/amd: add copy_irq_table function

Original Message If irq table exists in old kernel create a new one and copy the content of old irq table to the newly created. Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu.c | 2 +- drivers/iommu/amd_iommu_init.c | 43

Re: [Patch v3 05/12] iommu/amd: change IOMMU_PTE_P to IOMMU_PTE_V

Original Message In amd-vi spec the name of bit0 in DTE is V. But in code it's defined as IOMMU_PTE_P. Here change it to IOMMU_PTE_V to make it be consistent with spec. Hi, Baoquan This should be PR bit which means present, So maybe you got confusion between DTE and PTE

Re: [Patch v3 06/12] iommu/amd: Clean up the useless IOMMU_PTE_U/IOMMU_PTE_FC

Original Message In amd-vi spec bit[60:58] are only used to store the bit[14:12] of GCR3. No any other useage is found in several versions of amd-vi spec. So remove them in this patch. Also,this patch also made me confusion, please keep FC bit here, bit[60] should be PTE's

Re: [Patch v3 03/12] iommu/amd: move dte irq macro defitions to amd_iommu_types.h

Original Message These macro definitions are also needed by irq table copy function later, so move them to amd_iommu_types.h. Typo for your subject (defitions?). Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu.c | 4

Re: [Patch v3 11/12] iommu/amd: No need to wait iommu completion if no dte irq entry change

Original Message This is a clean up. In get_irq_table() only if DTE entry is changed iommu_completion_wait() need be called. Otherwise no need to do it. Signed-off-by: Baoquan He --- drivers/iommu/amd_iommu.c | 6 +++--- 1 file changed, 3 insertions(+),

[PATCH V2 0/8] iommu/amd: enable ACPI hardware ID device support

From: Wan Zongshun <vincent@amd.com> There are some devices indentified using ACPI HID format in AMD chip. This patch series enable iommu support for those ACPI HID device, since the existing AMD iommu only supports PCI bus based device. The latest public version of AMD IOMMU specifi

[PATCH V2 1/8] iommu/amd: Modify ivhd_header structure to support type 11h and 40h

From: Suravee Suthikulpanit This patch modifies the existing struct ivhd_header, which currently only support IVHD type 0x10, to add new fields from IVHD type 11h and 40h. It also modifies the pointer calculation to allow support for IVHD type 11h and 40h

[PATCH V2 4/8] iommu/amd: Introduces ivrs_acpihid kernel parameter

From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> This patch introduces a new kernel parameter, ivrs_acpihid. This is used to override existing ACPI-HID IVHD device entry, or add an entry in case it is missing in the IVHD. Signed-off-by: Wan Zongshun <vincent@amd.com>

[PATCH V2 3/8] iommu/amd: Add new map for storing IVHD dev entry type HID

From: Wan Zongshun <vincent@amd.com> This patch introduces acpihid_map, which is used to store the new IVHD device entry extracted from BIOS IVRS table. It also provides a utility function add_acpi_hid_device(), to add this types of devices to the map. Signed-off-by: Wan Zongshun &l

[PATCH V2 2/8] iommu/amd: Use the most comprehensive IVHD type that the driver can support

d_type()) before parsing the contents. [Vincent: fix the build error of IVHD_DEV_ACPI_HID flag not found] Signed-off-by: Wan Zongshun <vincent@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- drivers/iommu/amd_iommu_init.c | 107 ++

[PATCH V2 6/8] iommu/amd: Add iommu support for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> Current IOMMU driver make assumption that the downstream devices are PCI. With the newly added ACPI-HID IVHD device entry support, this is no longer true. This patch is to add dev type check and to distinguish the pci and acpihid device code path.

[PATCH V2 7/8] iommu/amd: Manage iommu_group for ACPI HID devices

From: Wan Zongshun <vincent@amd.com> This patch creates a new function for finding or creating an IOMMU group for acpihid(ACPI Hardware ID) device. The acpihid devices with the same devid will be put into same group and there will have the same domain id and share the same page

[PATCH V2 5/8] iommu/amd: Make call-sites of get_device_id aware of its return value

From: Wan Zongshun <vincent@amd.com> This patch is to make the call-sites of get_device_id aware of its return value. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 51 +-- 1 file changed, 41 inser

[PATCH V2 8/8] iommu/amd: Set AMD iommu callbacks for amba bus

From: Wan Zongshun <vincent@amd.com> AMD Uart DMA belongs to ACPI HID type device, and its driver is basing on AMBA Bus, need also IOMMU support. This patch is just to set the AMD iommu callbacks for amba bus. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu

Re: [PATCH] iommu/amd: set AMD iommu-callbacks for the amba bus

2015-12-30 0:54 GMT+08:00 Wan Zongshun <vincent@amd.com>: > From: Wan Zongshun <vincent@amd.com> > > Since uart dma is using AMD iommu, and it bases on amba bus. > So we need set callbacks for amba bus type firstly. > > Signed-off-by: Wan Zongshun <vince

Re: [PATCH 5/6] iommu/amd: Add support for non-pci devices

static bool check_device(struct device *dev) { u16 devid; .. /* No PCI device */ if (!dev_is_pci(dev) && (get_acpihid_device_id(dev, NULL) < 0)) return false; devid = get_device_id(dev); That is true for this case, but the other

Re: [PATCH 5/6] iommu/amd: Add support for non-pci devices

2016-01-07 20:04 GMT+08:00 Joerg Roedel <j...@8bytes.org>: > On Tue, Jan 05, 2016 at 05:07:23AM -0500, Wan Zongshun wrote: >> -static inline u16 get_device_id(struct device *dev) >> +static inline int match_hid_uid(struct device *dev, >> +

Re: [PATCH 6/6] iommu/amd: Manage iommu_group for non-pci devices

2016-01-07 20:06 GMT+08:00 Joerg Roedel <j...@8bytes.org>: > On Tue, Jan 05, 2016 at 05:07:24AM -0500, Wan Zongshun wrote: >> +static struct iommu_group *amd_iommu_device_group(struct device *dev) >> +{ >> + if (dev_is_pci(dev)) >> +

[PATCH 1/6] iommu/amd: Modify ivhd_header structure to support type 11h and 40h

From: Suravee Suthikulpanit This patch modifies the existing struct ivhd_header, which currently only support IVHD type 0x10, to add new fields from IVHD type 11h and 40h. It also modifies the pointer calculation to allow support for IVHD type 11h and 40h

[PATCH 2/6] iommu/amd: Use the most comprehensive IVHD type that the driver can support

d_type()) before parsing the contents. [Vincent: fix the build error of IVHD_DEV_ACPI_HID flag not found] Signed-off-by: Wan Zongshun <vincent@amd.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- drivers/iommu/amd_iommu_init.c | 107 ++

[PATCH 6/6] iommu/amd: Manage iommu_group for non-pci devices

From: Wan Zongshun <vincent@amd.com> This patch creates a new function for finding or creating an IOMMU group for acpihid(ACPI Hardware ID) device. The acpihid devices with the same devid will be put into same group and there will have the same domain id and share the same page

[PATCH 3/6] iommu/amd: Add new map for storing IVHD dev entry type HID

From: Wan Zongshun <vincent@amd.com> This patch introduces acpihid_map, which is used to store the new IVHD device entry extracted from BIOS IVRS table. It also provides a utility function add_acpi_hid_device(), to add this types of devices to the map. Signed-off-by: Wan Zongshun &l

[PATCH 0/6] iommu/amd: enable ACPI hardware ID device support

From: Wan Zongshun <vincent@amd.com> This patch series enable ACPI hardware ID device support, There are some devices indentified using ACPI HID format in AMD chip. This patch series enable iommu support for those ACPI HID device, since the existing AMD iommu only supports PCI bus

[PATCH 4/6] iommu/amd: Introduces ivrs_acpihid kernel parameter

From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> This patch introduces a new kernel parameter, ivrs_acpihid. This is used to override existing ACPI-HID IVHD device entry, or add an entry in case it is missing in the IVHD. Signed-off-by: Wan Zongshun <vincent@amd.com>

[PATCH 5/6] iommu/amd: Add support for non-pci devices

From: Wan Zongshun <vincent@amd.com> Current IOMMU driver make assumption that the downstream devices are PCI. With the newly added ACPI-HID IVHD device entry support, this is no longer true. This patch is to add dev type check and to distinguish the pci and acpihid device code path.

[PATCH] iommu/amd: set AMD iommu-callbacks for the amba bus

From: Wan Zongshun <vincent@amd.com> Since uart dma is using AMD iommu, and it bases on amba bus. So we need set callbacks for amba bus type firstly. Signed-off-by: Wan Zongshun <vincent@amd.com> --- drivers/iommu/amd_iommu.c | 13 - 1 file changed, 12 inse

Re: [PATCH] iommu:Check that iommu_device_create has completed successfully in alloc_iommu

->iommu_dev' break your iommu work? It seems not necessary. > > return 0; > - > err_unmap: > unmap_iommu(iommu); > error_free_seq_id: > -- > 2.5.0 > > ___ > iommu mailing list >