On Mon, Sep 30, 2013 at 02:30:06PM -0400, Will Deacon wrote:
> On Mon, Sep 30, 2013 at 06:17:16PM +0100, Andreas Herrmann wrote:
> > On Mon, Sep 30, 2013 at 12:06:15PM -0400, Will Deacon wrote:
> > > On Mon, Sep 30, 2013 at 02:56:21PM +0100, Andreas Herrmann wrote:
> > > >
> > > > After reset thes
On Mon, Sep 30, 2013 at 06:17:16PM +0100, Andreas Herrmann wrote:
> On Mon, Sep 30, 2013 at 12:06:15PM -0400, Will Deacon wrote:
> > On Mon, Sep 30, 2013 at 02:56:21PM +0100, Andreas Herrmann wrote:
> > >
> > > After reset these registers have unknown values.
> > > This might cause problems when e
On Mon, Sep 30, 2013 at 12:06:15PM -0400, Will Deacon wrote:
> On Mon, Sep 30, 2013 at 02:56:21PM +0100, Andreas Herrmann wrote:
> >
> > After reset these registers have unknown values.
> > This might cause problems when evaluating SMMU_GFSR and/or SMMU_CB_FSR
> > in handlers for combined interrup
On Mon, Sep 30, 2013 at 02:56:21PM +0100, Andreas Herrmann wrote:
>
> After reset these registers have unknown values.
> This might cause problems when evaluating SMMU_GFSR and/or SMMU_CB_FSR
> in handlers for combined interrupts.
>
> Signed-off-by: Andreas Herrmann
> ---
> drivers/iommu/arm-sm
After reset these registers have unknown values.
This might cause problems when evaluating SMMU_GFSR and/or SMMU_CB_FSR
in handlers for combined interrupts.
Signed-off-by: Andreas Herrmann
---
drivers/iommu/arm-smmu.c | 27 ---
1 file changed, 20 insertions(+), 7 delet
