On Fri, Jun 24, 2022 at 02:12:28PM +0800, Baolu Lu wrote:
> It makes sense as far as I am aware. By putting IOMMUs in pass-through
> mode, there will be no run-time costs and things could be simplified a
> lot.
>
> Besides the refactoring efforts, we still need this quick fix so that
> the fix cou
Hi Joerg,
On 2022/6/24 13:45, Joerg Roedel wrote:
Hi Baolu,
On Wed, May 25, 2022 at 09:40:26AM +0800, Baolu Lu wrote:
How do you like it? If you agree, I can queue it in my next pull request
for fixes.
Would it help to tie DMAR and IOMMU components together, so that
selecting DMAR for IRQ re
Hi Baolu,
On Wed, May 25, 2022 at 09:40:26AM +0800, Baolu Lu wrote:
> How do you like it? If you agree, I can queue it in my next pull request
> for fixes.
Would it help to tie DMAR and IOMMU components together, so that
selecting DMAR for IRQ remapping also selects IOMMU? The IOMMU can be in
PT
Hi Joerg,
On 2022/5/21 08:21, Yian Chen wrote:
Notifier calling chain uses priority to determine the execution
order of the notifiers or listeners registered to the chain.
PCI bus device hot add utilizes the notification mechanism.
The current code sets low priority (INT_MIN) to Intel
dmar_pci_
Notifier calling chain uses priority to determine the execution
order of the notifiers or listeners registered to the chain.
PCI bus device hot add utilizes the notification mechanism.
The current code sets low priority (INT_MIN) to Intel
dmar_pci_bus_notifier and postpones DMAR decoding after add
Hi Lu,
On Fri, 14 Jan 2022 11:12:45 +0800, Lu Baolu
wrote:
> On 1/14/22 11:11 AM, Jacob Pan wrote:
> > On Fri, 14 Jan 2022 08:58:53 +0800, Lu Baolu
> > wrote:
> >
> >> Hi Jacob,
> >>
> >> On 1/13/22 9:23 PM, Jacob Pan wrote:
> >>> During PCI bus rescan, adding new devices involve two notifi
On 1/14/22 11:11 AM, Jacob Pan wrote:
On Fri, 14 Jan 2022 08:58:53 +0800, Lu Baolu
wrote:
Hi Jacob,
On 1/13/22 9:23 PM, Jacob Pan wrote:
During PCI bus rescan, adding new devices involve two notifiers.
1. dmar_pci_bus_notifier()
2. iommu_bus_notifier()
The current code sets #1 as low priority
Hi BaoLu,
On Fri, 14 Jan 2022 08:58:53 +0800, Lu Baolu
wrote:
> Hi Jacob,
>
> On 1/13/22 9:23 PM, Jacob Pan wrote:
> > During PCI bus rescan, adding new devices involve two notifiers.
> > 1. dmar_pci_bus_notifier()
> > 2. iommu_bus_notifier()
> > The current code sets #1 as low priority (INT_MI
Hi Jacob,
On 1/13/22 9:23 PM, Jacob Pan wrote:
During PCI bus rescan, adding new devices involve two notifiers.
1. dmar_pci_bus_notifier()
2. iommu_bus_notifier()
The current code sets #1 as low priority (INT_MIN) which resulted in #2
being invoked first. The result is that struct device pointer
During PCI bus rescan, adding new devices involve two notifiers.
1. dmar_pci_bus_notifier()
2. iommu_bus_notifier()
The current code sets #1 as low priority (INT_MIN) which resulted in #2
being invoked first. The result is that struct device pointer cannot be
found in DRHD search for the new device
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