On Wed, Jun 26, 2019 at 06:59:59PM +0100, Will Deacon wrote:
> > @@ -666,8 +668,14 @@ struct arm_smmu_domain {
> >
> > struct iommu_domain domain;
> >
> > + /* Unused in aux domains */
> > struct list_headdevices;
> > spinlock_t
On 26/06/2019 18:59, Will Deacon wrote:
>> +static void arm_smmu_aux_detach_dev(struct iommu_domain *domain, struct
>> device *dev)
>> +{
>> +struct iommu_domain *parent_domain;
>> +struct arm_smmu_domain *parent_smmu_domain;
>> +struct arm_smmu_master *master = dev_to_master(dev);
>>
Hi Jean-Philippe,
On Mon, Jun 10, 2019 at 07:47:12PM +0100, Jean-Philippe Brucker wrote:
> In commit a3a195929d40 ("iommu: Add APIs for multiple domains per
> device"), the IOMMU API gained the concept of auxiliary domains (AUXD),
> which allows to control the PASID-tagged address spaces of a
In commit a3a195929d40 ("iommu: Add APIs for multiple domains per
device"), the IOMMU API gained the concept of auxiliary domains (AUXD),
which allows to control the PASID-tagged address spaces of a device. With
AUXD the PASID address space are not shared with the CPU, but are instead
modified
