Hi David,
On 2022/3/22 14:35, David Stevens wrote:
From: David Stevens
Calculate the appropriate mask for non-size-aligned page selective
invalidation. Since psi uses the mask value to mask out the lower order
bits of the target address, properly flushing the iotlb requires using a
mask value
iday, March 25, 2022 2:14 PM
> > > To: David Stevens ; Lu Baolu
> > >
> > > Cc: iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org
> > > Subject: RE: [PATCH v2] iommu/vt-d: calculate mask for non-aligned
> flushes
> > >
> > > > From:
ation.org; linux-ker...@vger.kernel.org
> > Subject: RE: [PATCH v2] iommu/vt-d: calculate mask for non-aligned flushes
> >
> > > From: David Stevens
> > > Sent: Tuesday, March 22, 2022 2:36 PM
> > >
> > > From: David Stevens
> > >
> >
> -Original Message-
> From: iommu On Behalf Of
> Tian, Kevin
> Sent: Friday, March 25, 2022 2:14 PM
> To: David Stevens ; Lu Baolu
>
> Cc: iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org
> Subject: RE: [PATCH v2] iommu/vt-d: calculate mask
> From: David Stevens
> Sent: Tuesday, March 22, 2022 2:36 PM
>
> From: David Stevens
>
> Calculate the appropriate mask for non-size-aligned page selective
> invalidation. Since psi uses the mask value to mask out the lower order
> bits of the target address, properly flushing the iotlb
From: David Stevens
Calculate the appropriate mask for non-size-aligned page selective
invalidation. Since psi uses the mask value to mask out the lower order
bits of the target address, properly flushing the iotlb requires using a
mask value such that [pfn, pfn+pages) all lie within the flushed
