On Tue, Jul 27, 2021 at 5:53 AM Atish Patra wrote:
>
> On Sun, Jul 25, 2021 at 11:57 PM Christoph Hellwig wrote:
> >
> > > +#ifdef CONFIG_RISCV_DMA_NONCOHERENT
> > > +struct riscv_dma_cache_sync {
> > > + void (*cache_invalidate)(phys_addr_t paddr, size_t size);
> > > + void
On Tue, Aug 17, 2021 at 11:24 AM Atish Patra wrote:
>
> On Mon, Aug 16, 2021 at 6:48 PM Guo Ren wrote:
> >
> > On Sat, Jul 24, 2021 at 5:40 AM Atish Patra wrote:
> > >
> > > To facilitate streaming DMA APIs, this patch introduces a set of generic
> > > cache operations related dma sync. Any
On Mon, Aug 16, 2021 at 6:48 PM Guo Ren wrote:
>
> On Sat, Jul 24, 2021 at 5:40 AM Atish Patra wrote:
> >
> > To facilitate streaming DMA APIs, this patch introduces a set of generic
> > cache operations related dma sync. Any platform can use the generic ops
> > to provide platform specific
On Sat, Jul 24, 2021 at 5:40 AM Atish Patra wrote:
>
> To facilitate streaming DMA APIs, this patch introduces a set of generic
> cache operations related dma sync. Any platform can use the generic ops
> to provide platform specific cache management operations. Once the
> standard RISC-V CMO
On Sun, Jul 25, 2021 at 11:57 PM Christoph Hellwig wrote:
>
> > +#ifdef CONFIG_RISCV_DMA_NONCOHERENT
> > +struct riscv_dma_cache_sync {
> > + void (*cache_invalidate)(phys_addr_t paddr, size_t size);
> > + void (*cache_clean)(phys_addr_t paddr, size_t size);
> > + void
> +#ifdef CONFIG_RISCV_DMA_NONCOHERENT
> +struct riscv_dma_cache_sync {
> + void (*cache_invalidate)(phys_addr_t paddr, size_t size);
> + void (*cache_clean)(phys_addr_t paddr, size_t size);
> + void (*cache_flush)(phys_addr_t paddr, size_t size);
> +};
> +
> +void
To facilitate streaming DMA APIs, this patch introduces a set of generic
cache operations related dma sync. Any platform can use the generic ops
to provide platform specific cache management operations. Once the
standard RISC-V CMO extension is available, it can be built on top of it.