.com;
> jean-phili...@linaro.org; eric.au...@redhat.com; zhangfei@linaro.org;
> Jonathan Cameron ; Zengtao (B)
> ; linux...@openeuler.org; Will Deacon
>
> Subject: Re: [RFC PATCH 3/5] KVM: ARM64: Add support for pinned VMIDs
>
> Hi Shameer,
>
> [+Will]
>
> On
Hi Shameer,
[+Will]
On Mon, 22 Feb 2021 15:53:36 +,
Shameer Kolothum wrote:
>
> On an ARM64 system with a SMMUv3 implementation that fully supports
> Broadcast TLB Maintenance(BTM) feature, the CPU TLB invalidate
> instructions are received by SMMU. This is very useful when the
> SMMU
On an ARM64 system with a SMMUv3 implementation that fully supports
Broadcast TLB Maintenance(BTM) feature, the CPU TLB invalidate
instructions are received by SMMU. This is very useful when the
SMMU shares the page tables with the CPU(eg: Guest SVA use case).
For this to work, the SMMU must use
