From: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
This patch set add detail event log information for AMD IOMMU in dmesg when
booting with
amd-iommu=verbose.
Suravee Suthikulpanit (2):
iommu/amd: Adding new command line option amd-iommu=verbose
iommu/amd: Add logic to decode AMD
From: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
Adding new command line option amd-iommu=verbose to allow verbose print out
in dmesg.
Signed-off-by: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
---
drivers/iommu/amd_iommu_init.c |4
drivers/iommu/amd_iommu_types.h |
On Tue, Apr 9, 2013 at 2:13 PM, Joerg Roedel j...@8bytes.org wrote:
When the IVRS entries for IOAPIC and HPET are overridden on
the kernel command line, a problem detected in the check
function might not be a firmware bug anymore. So disable
the firmware bug reporting if the user provided
On Tue, Apr 9, 2013 at 2:12 PM, Joerg Roedel j...@8bytes.org wrote:
This function was intended as a fall-back if the map_sg
function is called for a device not mapped by the IOMMU.
Since the AMD IOMMU driver uses per-device dma_ops this can
never happen. So this function isn't needed anymore.
On Tue, Apr 9, 2013 at 2:12 PM, Joerg Roedel j...@8bytes.org wrote:
For compatibility reasons the irq remapping code for the AMD
IOMMU used the same per-irq data structure as the Intel
implementation. Now that support for the AMD specific data
structure is upstream we can use this one instead.
On Tue, Apr 9, 2013 at 2:12 PM, Joerg Roedel j...@8bytes.org wrote:
Hi,
this patch-set contains some cleanups and patches for the
AMD IOMM driver. The most important part is a workaround
that can be used to get interrupt remapping working even the
the IVRS table provided by the BIOS is
On Wed, Apr 10, 2013 at 9:57 AM, suravee.suthikulpa...@amd.com wrote:
From: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
Add logic to decode AMD IOMMU event flag based on information from AMD IOMMU
specification.
This should simplify debugging IOMMU errors. Also, dump DTE
On 4/10/2013 11:21 AM, Shuah Khan wrote:
Good feature. Do you also plan to add decode logic for these flags.
For example, RZ is only meaningful when PR=1, RW is only meaningful
when
PR=1, TR=0, and I=0, and so on? This additional logic will be useful.
Reviewed-by: Shuah Khanshuahk...@gmail.com
On Wed, Apr 10, 2013 at 10:27 AM, Suravee Suthikulanit
suravee.suthikulpa...@amd.com wrote:
On 4/10/2013 11:21 AM, Shuah Khan wrote:
Good feature. Do you also plan to add decode logic for these flags.
For example, RZ is only meaningful when PR=1, RW is only meaningful
when
PR=1, TR=0, and
On Mon, Apr 08, 2013 at 06:03:54PM +0100, Olav Haugan wrote:
Hi Will,
Hello,
Generally, the StreamIDs are fixed in hardware (as a function of various AXI
bits -- see the SMMU integration guide) and cannot be set by software.
Furthermore, when the StreamIDs have an implicit effect on IOMMU
On Wed, 2013-04-10 at 16:36 -0600, Bjorn Helgaas wrote:
On Wed, Feb 06, 2013 at 08:58:41AM -0700, Alex Williamson wrote:
On Wed, 2013-02-06 at 07:49 -0800, Stephen Hemminger wrote:
On Mon, 04 Feb 2013 15:41:24 -0700
Alex Williamson alex.william...@redhat.com wrote:
On Mon,
Fix printk formats for dma_addr_t:
drivers/iommu/tegra-smmu.c: In function 'smmu_iommu_iova_to_phys':
drivers/iommu/tegra-smmu.c:774:2: warning: format '%lx' expects argument of
type 'long unsigned int', but argument 4 has type 'dma_addr_t' [-Wformat]
--
drivers/iommu/tegra-gart.c: In
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