Currently the driver emits a log line every time a device attaches or
detaches - which happens at every unblank/blank of the drm for example.
The message itself also has no real value to the average user and is
merely useful when debugging a problem, so make it a dev_dbg instead.
Signed-off-by:
Hi Baoquan,
During driver being loaded and initialized, when there is a new dma
request, the function
__get_valid_domain_for_dev
is called, and then new page is mapped.
Please check this:
struct dma_map_ops intel_dma_ops = {
.alloc = intel_alloc_coherent,
.free =
On Thu, 2015-05-21 at 09:30 +0200, Matthias Brugger wrote:
2015-05-21 8:16 GMT+02:00 Yong Wu yong...@mediatek.com:
Hi Matthias,
Thanks very much for your suggestion.
Abort the smi clock name, Could you help check below.
The others I will improve in next time.
On Tue,
-Original Message-
From: Thomas Gleixner [mailto:t...@linutronix.de]
Sent: Wednesday, May 20, 2015 7:46 PM
To: Wu, Feng
Cc: j...@8bytes.org; dw...@infradead.org; jiang@linux.intel.com;
iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org
Subject: Re: [v5 3/9] iommu,
VT-d Posted-Interrupts is an enhancement to CPU side Posted-Interrupt.
With VT-d Posted-Interrupts enabled, external interrupts from
direct-assigned devices can be delivered to guests without VMM
intervention when guest is running in non-root mode.
You can find the VT-d Posted-Interrtups Spec. in
Set Posted-Interrupts capability for Intel iommu when IR is enabled,
clear it when IR is disabled.
Signed-off-by: Feng Wu feng...@intel.com
---
drivers/iommu/intel_irq_remapping.c | 34 ++
drivers/iommu/irq_remapping.c | 2 ++
drivers/iommu/irq_remapping.h
Return error when inserting a new IOMMU which doesn't support PI
if PI is currently in use.
Signed-off-by: Feng Wu feng...@intel.com
---
drivers/iommu/intel_irq_remapping.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/intel_irq_remapping.c
This patch adds a new interface irq_remapping_cap() to detect
whether irq remapping supports new features, such as VT-d
Posted-Interrupts. We export this function out, so that KVM
code can check this and use this mechanism properly.
Signed-off-by: Feng Wu feng...@intel.com
Reviewed-by: Jiang Liu
On 05/21/15 at 09:27am, Li, ZhenHua wrote:
Hi Baoquan,
In the early version of this patchset, old page tables are used by new
kernel. But as discussed, we need to make kernel use new pages when
there is a new dma request , so we need to unmap the pages which were
mapped in old kernel, and
Hi Matthias,
Thanks very much for your suggestion.
Abort the smi clock name, Could you help check below.
The others I will improve in next time.
On Tue, 2015-05-19 at 13:14 +0200, Matthias Brugger wrote:
2015-05-15 11:43 GMT+02:00 Yong Wu yong...@mediatek.com:
This patch add
This patch adds a new member capability to struct irq_remap_ops,
this new function ops can be used to check whether some
features are supported, such as VT-d Posted-Interrupts.
Signed-off-by: Feng Wu feng...@intel.com
Reviewed-by: Jiang Liu jiang@linux.intel.com
---
We don't need to migrate the irqs for VT-d Posted-Interrupts here.
When 'pst' is set in IRTE, the associated irq will be posted to
guests instead of interrupt remapping. The destination of the
interrupt is set in Posted-Interrupts Descriptor, and the migration
happens during vCPU scheduling.
Add helper function to detect VT-d Posted-Interrupts capability.
Signed-off-by: Feng Wu feng...@intel.com
Reviewed-by: Jiang Liu jiang@linux.intel.com
Acked-by: David Woodhouse david.woodho...@intel.com
---
include/linux/intel-iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Thomas Gleixner t...@linutronix.de
The IRTE (Interrupt Remapping Table Entry) is either an entry for
remapped or for posted interrupts. The hardware distiguishes between
remapped and posted entries by bit 15 in the low 64 bit of the
IRTE. If cleared the entry is remapped, if set it's
Implement irq_set_vcpu_affinity for intel_ir_chip.
Signed-off-by: Feng Wu feng...@intel.com
Reviewed-by: Jiang Liu jiang@linux.intel.com
Acked-by: David Woodhouse david.woodho...@intel.com
---
arch/x86/include/asm/irq_remapping.h | 5 +
drivers/iommu/intel_irq_remapping.c | 35
2015-05-21 8:16 GMT+02:00 Yong Wu yong...@mediatek.com:
Hi Matthias,
Thanks very much for your suggestion.
Abort the smi clock name, Could you help check below.
The others I will improve in next time.
On Tue, 2015-05-19 at 13:14 +0200, Matthias Brugger wrote:
2015-05-15 11:43
Hi,
While trying to get a sense for performance of i40e and i40evf, I
figured I'd try and create a VF device on the host and activate it.
However, as soon as I brought the VF up, my host became unreachable. The
kernel is current 4.1-rc4.
Main network is connected through ixgbe (eth1), i40e is on
On 05/21/15 at 04:40pm, Li, ZhenHua wrote:
Hi Baoquan,
During driver being loaded and initialized, when there is a new dma
request, the function
__get_valid_domain_for_dev
is called, and then new page is mapped.
Please check this:
struct dma_map_ops intel_dma_ops = {
Hi again,
Sorry for the delay in replying, I've been tied up with other stuff.
On Wed, May 13, 2015 at 09:33:19AM +0100, leizhen wrote:
On 2015/5/13 0:55, Will Deacon wrote:
The purpose of the two level approach isn't to save memory; it's to remove
the need for a single (large) contiguous
Ping.
(Cc Alex.)
Sakari Ailus wrote:
Marvell 9120 SATA controller has the same issue as a number of others, use
the same quirk for this one. The other quirks were added by patch
PCI: Add function 1 DMA alias quirk for Marvell devices
(commit id cc346a4714a59d08c118e8f33fd86692d3563133).
On Thu, 21 May 2015, Feng Wu wrote:
+static int intel_ir_set_vcpu_affinity(struct irq_data *data, void *vcpu_info)
+{
+ struct intel_ir_data *ir_data = data-chip_data;
+ struct irte *irte_pi = ir_data-irte_pi_entry;
+ struct vcpu_data *vcpu_pi_info;
+
+ /* stop posting
On Thu, 21 May 2015, Feng Wu wrote:
@@ -647,6 +647,20 @@ static int __init intel_enable_irq_remapping(void)
+ /*
+ * Set Posted-Interrupts capability.
+ */
+ if (!disable_irq_post) {
+ intel_irq_remap_ops.capability |= 1 IRQ_POSTING_CAP;
+
+
2015-05-21 16:49 GMT+02:00 Yong Wu yong...@mediatek.com:
On Thu, 2015-05-21 at 22:33 +0800, Daniel Kurtz wrote:
On Thu, May 21, 2015 at 3:30 PM, Matthias Brugger
matthias@gmail.com wrote:
2015-05-21 8:16 GMT+02:00 Yong Wu yong...@mediatek.com:
Hi Matthias,
Thanks very much for
On Thu, 2015-05-21 at 22:33 +0800, Daniel Kurtz wrote:
On Thu, May 21, 2015 at 3:30 PM, Matthias Brugger
matthias@gmail.com wrote:
2015-05-21 8:16 GMT+02:00 Yong Wu yong...@mediatek.com:
Hi Matthias,
Thanks very much for your suggestion.
Abort the smi clock name, Could you
Hi Alex,
Alex Williamson wrote:
On Thu, 2015-05-21 at 12:54 +0300, Sakari Ailus wrote:
Ping.
(Cc Alex.)
You can add my ack, but the linux-pci list is the proper list to get
this upstream. I suggest resending it there. Thanks,
Thank you for your reply and ack; I'll resend it there.
--
On Thu, 2015-05-21 at 12:54 +0300, Sakari Ailus wrote:
Ping.
(Cc Alex.)
You can add my ack, but the linux-pci list is the proper list to get
this upstream. I suggest resending it there. Thanks,
Ale
Sakari Ailus wrote:
Marvell 9120 SATA controller has the same issue as a number of
-Original Message-
From: Thomas Gleixner [mailto:t...@linutronix.de]
Sent: Thursday, May 21, 2015 6:48 PM
To: Wu, Feng
Cc: j...@8bytes.org; dw...@infradead.org; jiang@linux.intel.com;
iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org
Subject: Re: [v6 3/8] iommu,
-Original Message-
From: Thomas Gleixner [mailto:t...@linutronix.de]
Sent: Thursday, May 21, 2015 6:51 PM
To: Wu, Feng
Cc: j...@8bytes.org; dw...@infradead.org; jiang@linux.intel.com;
iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org
Subject: Re: [v6 6/8] iommu,
Hi Robin,
Thanks very much for so detail suggestion.
please also help check my comment, the others i will change in next
time.
On Fri, 2015-05-15 at 16:30 +0100, Robin Murphy wrote:
Oops, seems I'm rather behind on things - I started this review on the
RFC, but I'll finish it here...
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