On Thu, May 21, 2015 at 09:57:29AM +0200, Heiko Stuebner wrote:
Currently the driver emits a log line every time a device attaches or
detaches - which happens at every unblank/blank of the drm for example.
The message itself also has no real value to the average user and is
merely useful when
Hi Robin,
More info, hope this make it clearer. We are calling dma_map_sg_attrs
with the following 2 sg. With IOMMU, we are expecting it got merged into
1 contiguous va range, but instead we get 2 va range.
sg0 dma_address 0xfeeddc00 size 0x400, offset 0xc00
sg1 dma_address 0xfeede000 size
On Sat, May 23, 2015 at 07:23:34PM +0300, Laurent Pinchart wrote:
On Tuesday 19 May 2015 15:20:23 Marek Szyprowski wrote:
-arch_initcall(iommu_init);
+core_initcall(iommu_init);
I'll let Joerg comment on this, but this initcall ordering dance always makes
me feel that something isn't
On Mon, May 18, 2015 at 01:24:59PM -0500, wda...@nvidia.com wrote:
+static inline dma_addr_t dma_map_resource_attrs(struct device *dev,
+ struct resource *res,
+ size_t offset, size_t size,
+
Hi Robin,
Thanks for your work. We are really moving forward to a common DMA-API
implementation for all iommu drivers.
On Wed, May 27, 2015 at 03:09:14PM +0100, Robin Murphy wrote:
In the meantime, Laurent's proposal for probe deferral[2] offers hope
that the bus notifier dance may only need
Hi Will,
On Wed, May 20, 2015 at 06:09:26PM +0100, Will Deacon wrote:
On Tue, May 19, 2015 at 04:24:35PM +0100, Joerg Roedel wrote:
+ /* Page sizes */
+ if (reg IDR5_GRAN64K)
+ pgsize_bitmap |= SZ_64K | SZ_512M;
+ if (reg IDR5_GRAN16K)
+ pgsize_bitmap |= SZ_16K |
Hi Joerg,
On 29/05/15 07:43, Joerg Roedel wrote:
Hi Will,
On Wed, May 20, 2015 at 06:09:26PM +0100, Will Deacon wrote:
On Tue, May 19, 2015 at 04:24:35PM +0100, Joerg Roedel wrote:
+ /* Page sizes */
+ if (reg IDR5_GRAN64K)
+ pgsize_bitmap |= SZ_64K | SZ_512M;
+
On Wed, May 27, 2015 at 05:25:57PM +0100, Will Deacon wrote:
Will Deacon (3):
Documentation: dt-bindings: Add device-tree binding for ARM SMMUv3
IOMMU
iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices
drivers/vfio: Allow type-1 IOMMU instantiation on top of an ARM
On Wed, May 27, 2015 at 05:09:35PM +0100, Will Deacon wrote:
Changing force_stage dynamically isn't supported by the driver and it
also doesn't make a whole lot of sense to change it once the SMMU is up
and running.
This patch makes the sysfs entry for the parameter read-only.
On Thu, May 14, 2015 at 6:00 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
As part of moving DMA initializing to probe time the
of_dma_deconfigure() function will need to be called from different
source files. Make it public and move it to drivers/of/device.c where
the
From: Will Davis wda...@nvidia.com
Add debug callbacks for the new dma_map_resource and dma_unmap_resource
functions.
Signed-off-by: Will Davis wda...@nvidia.com
Reviewed-by: Terence Ripperda trippe...@nvidia.com
Reviewed-by: John Hubbard jhubb...@nvidia.com
---
include/linux/dma-debug.h | 20
From: Will Davis wda...@nvidia.com
Implement 'map_resource' for the Intel IOMMU driver. Simply translate the
resource to a physical address and route it to the same handlers used by
the 'map_page' API.
This allows a device to map another's resource, to enable peer-to-peer
transactions.
From: Will Davis wda...@nvidia.com
Implement 'map_resource' for the AMD IOMMU driver. Generalize the existing
map_page implementation to operate on a physical address, and make both
map_page and map_resource wrappers around that helper (and similiarly, for
unmap_page and unmap_resource).
This
From: Will Davis wda...@nvidia.com
Add functions to DMA-map and -unmap a resource for a given device. This
will allow devices to DMA-map a peer device's resource (for example,
another device's BAR region on PCI) to enable peer-to-peer transactions.
Signed-off-by: Will Davis wda...@nvidia.com
---
From: Will Davis wda...@nvidia.com
Hi,
This is the third version of a patchset to add the DMA APIs necessary to
map and unmap a struct resource to and from a PCI device's IOVA domain.
This allows a PCI device to access a peer device's BAR resource when a
hardware IOMMU is enabled.
Thanks,
Will
On 29/05/15 06:26, Yong Wu wrote:
Hi Robin,
Thanks.
While we test venc in v4l2, we get a problem:
Thanks as always for testing!
When we enter the funtion[0], it will be break unexpectedly in the
funcion[1] while the offset of sg table is not zero. It is ok if the
offset is
tree: git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git x86/vt-d
head: 6c37b5ba0e4df96647677fac5d87d9fd561c3ef8
commit: ebe05c7397dc63d99fb3ec69a37b4440952089bc [4/10] iommu/vt-d: Functions
to copy data from old mem
reproduce:
# apt-get install sparse
git checkout
On May 27, 2015, at 10:39 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Tue, May 26, 2015 at 11:20:59PM +0100, Chalamarla, Tirumalesh wrote:
This is some thing we also like to see in ITS and SMMU drivers.
On Mar 24, 2015, at 8:50 AM, Mark Rutland mark.rutl...@arm.com wrote:
Hi all,
On Thu, May 14, 2015 at 6:00 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
The of_configure_dma() function configures both the DMA masks and ops.
Moving DMA ops configuration to probe time would thus also delay
configuration of the DMA masks, which might not be safe. To
19 matches
Mail list logo
