Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Casey Leedom
| From: Raj, Ashok | Sent: Monday, September 25, 2017 12:03 PM | | On Mon, Sep 25, 2017 at 01:11:04PM -0700, Dan Williams wrote: | > On Mon, Sep 25, 2017 at 1:05 PM, Casey Leedom wrote: | > > | From: Dan Williams | > > |

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Raj, Ashok
Hi On Mon, Sep 25, 2017 at 01:11:04PM -0700, Dan Williams wrote: > On Mon, Sep 25, 2017 at 1:05 PM, Casey Leedom wrote: > > | From: Dan Williams > > | Sent: Monday, September 25, 2017 12:31 PM > > | ... > > | IIUC it looks like this has been broken

Re: [PATCH] iommu/mediatek: Limit the physical address in 32bit for v7s

2017-09-25 Thread Will Deacon
On Mon, Sep 25, 2017 at 06:15:26PM +0800, Yong Wu wrote: > The ARM short descriptor has already limited the physical address > to 32bit after the commit <76557391433c> ("iommu/io-pgtable: Sanitise > map/unmap addresses"). But in MediaTek 4GB mode, the physical address > is from 0x1__ to

Re: [PATCH] iommu/arm-smmu-v3: Correct COHACC override message

2017-09-25 Thread Lorenzo Pieralisi
On Mon, Sep 25, 2017 at 02:55:40PM +0100, Robin Murphy wrote: > Slightly confusingly, when reporting a mismatch of the ID register > value, we still refer to the IORT COHACC override flag as the > "dma-coherent property" if we booted with ACPI. Update the message > to be firmware-agnostic in line

[PATCH] iommu/arm-smmu-v3: Correct COHACC override message

2017-09-25 Thread Robin Murphy
Slightly confusingly, when reporting a mismatch of the ID register value, we still refer to the IORT COHACC override flag as the "dma-coherent property" if we booted with ACPI. Update the message to be firmware-agnostic in line with SMMUv2. Reported-by: Will Deacon

Re: [virtio-dev] [RFC] virtio-iommu version 0.4

2017-09-25 Thread Jean-Philippe Brucker
On 21/09/17 07:41, Tian, Kevin wrote: >> From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com] >> Sent: Wednesday, September 6, 2017 7:49 PM >> >> >>> 2.6.8.2.1 >>> Multiple overlapping RESV_MEM properties are merged together. Device >>> requirement? if same types I assume? >> >>

Re: [virtio-dev] RE: [RFC] virtio-iommu version 0.4

2017-09-25 Thread Jean-Philippe Brucker
On 21/09/17 07:27, Tian, Kevin wrote: >> From: Jean-Philippe Brucker >> Sent: Wednesday, September 6, 2017 7:55 PM >> >> Hi Kevin, >> >> On 28/08/17 08:39, Tian, Kevin wrote: >>> Here comes some comments: >>> >>> 1.1 Motivation >>> >>> You describe I/O page faults handling as future work. Seems

Re: [PATCH] pci: Add dummy for pci_acs_enabled() if CONFIG_PCI=n to fix iommmu build

2017-09-25 Thread Bjorn Helgaas
On Fri, Sep 22, 2017 at 08:12:46PM +0200, Geert Uytterhoeven wrote: > Hi Björn, > > On Fri, Sep 22, 2017 at 5:56 PM, Bjorn Helgaas wrote: > > On Mon, Sep 11, 2017 at 02:29:15PM +0200, Geert Uytterhoeven wrote: > >> If CONFIG_PCI=n, and gcc (e.g. 4.1.2) decides not to inline >

Re: iommu/io-pgtable: depend on !GENERIC_ATOMIC64 when using COMPILE_TEST with LPAE

2017-09-25 Thread Will Deacon
Hi Geert, On Mon, Sep 25, 2017 at 09:16:22AM +0200, Geert Uytterhoeven wrote: > On Wed, Jul 12, 2017 at 7:16 PM, Linux Kernel Mailing List > wrote: > > Web: > > https://git.kernel.org/torvalds/c/c1004803b40596c1aabbbc78a6b1b33e4dfd96c6 > > Commit:

Re: iommu/io-pgtable: depend on !GENERIC_ATOMIC64 when using COMPILE_TEST with LPAE

2017-09-25 Thread Will Deacon
[+PeterZ because he enjoys things like this] On Mon, Sep 25, 2017 at 05:37:46PM +0200, Geert Uytterhoeven wrote: > On Mon, Sep 25, 2017 at 5:21 PM, Will Deacon wrote: > > On Mon, Sep 25, 2017 at 09:16:22AM +0200, Geert Uytterhoeven wrote: > >> On Wed, Jul 12, 2017 at 7:16

Re: iommu/io-pgtable: depend on !GENERIC_ATOMIC64 when using COMPILE_TEST with LPAE

2017-09-25 Thread Geert Uytterhoeven
Hi Will, On Mon, Sep 25, 2017 at 5:21 PM, Will Deacon wrote: > On Mon, Sep 25, 2017 at 09:16:22AM +0200, Geert Uytterhoeven wrote: >> On Wed, Jul 12, 2017 at 7:16 PM, Linux Kernel Mailing List >> wrote: >> > Web: >> >

Re: bind pasid table API

2017-09-25 Thread Raj, Ashok
On Mon, Sep 25, 2017 at 12:45:00PM +0100, Jean-Philippe Brucker wrote: [snip] > This format tells how the guest organizes its PASID tables. Depending on > 'format', the PASID table can be: > * A flat array of descriptors > * One array of 1st-level descriptors pointing to a 2nd level of >

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Casey Leedom
| From: Robin Murphy | Sent: Wednesday, September 20, 2017 3:12 AM | | On 20/09/17 09:01, Herbert Xu wrote: | > | > Harsh Jain wrote: | >> | >> While debugging DMA mapping error in chelsio crypto driver we | >> observed that when scatter/gather list

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Casey Leedom
| From: Raj, Ashok | Sent: Monday, September 25, 2017 8:54 AM | | Not sure how the page->offset would end up being greater than page-size? | | If you have additional traces, please send them by. | | Is this a new driver? wondering how we didn't run into this? According to

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread David Woodhouse
On Wed, 2017-09-20 at 16:01 +0800, Herbert Xu wrote: > Harsh Jain wrote: > >  > > While debugging DMA mapping error in chelsio crypto driver we > observed that when scatter/gather list received by driver has some > entry with page->offset > 4096 (PAGE_SIZE). It starts giving

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Raj, Ashok
Hi Casey Sorry, somehow didn't see this one come by. On Mon, Sep 25, 2017 at 05:46:40PM +, Casey Leedom wrote: > | From: Robin Murphy > | Sent: Wednesday, September 20, 2017 3:12 AM > | > | On 20/09/17 09:01, Herbert Xu wrote: > | > > | > Harsh Jain

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Harsh Jain
On 26-09-2017 00:16, Casey Leedom wrote: > | From: Raj, Ashok > | Sent: Monday, September 25, 2017 8:54 AM > | > | Not sure how the page->offset would end up being greater than page-size? Refer below > | > | If you have additional traces, please send them by. > | > | Is this

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Dan Williams
On Mon, Sep 25, 2017 at 10:46 AM, Casey Leedom wrote: > | From: Robin Murphy > | Sent: Wednesday, September 20, 2017 3:12 AM > | > | On 20/09/17 09:01, Herbert Xu wrote: > | > > | > Harsh Jain wrote: > | >> > | >> While debugging DMA

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Casey Leedom
| From: Dan Williams | Sent: Monday, September 25, 2017 12:31 PM | ... | IIUC it looks like this has been broken ever since commit e1605495c716 | "intel-iommu: Introduce domain_sg_mapping() to speed up | intel_map_sg()". I.e. it looks like the calculation for pte_val

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Dan Williams
On Mon, Sep 25, 2017 at 1:05 PM, Casey Leedom wrote: > | From: Dan Williams > | Sent: Monday, September 25, 2017 12:31 PM > | ... > | IIUC it looks like this has been broken ever since commit e1605495c716 > | "intel-iommu: Introduce

Re: DMA error when sg->offset value is greater than PAGE_SIZE in Intel IOMMU

2017-09-25 Thread Casey Leedom
| From: David Woodhouse | Sent: Monday, September 25, 2017 11:45 AM | | On Wed, 2017-09-20 at 16:01 +0800, Herbert Xu wrote: | > Harsh Jain wrote: | > > | > > While debugging DMA mapping error in chelsio crypto driver we | > observed that when

[PATCH] iommu/io-pgtable-arm-v7s: Need dma-sync while there is no QUIRK_NO_DMA

2017-09-25 Thread Yong Wu
Fix the commit 81b3c2521844 ("iommu/io-pgtable: Introduce explicit coherency"). If there is no IO_PGTABLE_QUIRK_NO_DMA, we should call dma_sync_single_for_device for cache synchronization. Signed-off-by: Yong Wu --- Rebased on v4.14-rc1. ---

Re: [PATCH] iommu/io-pgtable-arm-v7s: Need dma-sync while there is no QUIRK_NO_DMA

2017-09-25 Thread Robin Murphy
On 25/09/17 10:28, Yong Wu wrote: > Fix the commit 81b3c2521844 ("iommu/io-pgtable: Introduce explicit > coherency"). If there is no IO_PGTABLE_QUIRK_NO_DMA, we should call > dma_sync_single_for_device for cache synchronization. Oops! Reviewed-by: Robin Murphy Thanks,

[PATCH] iommu/mediatek: Limit the physical address in 32bit for v7s

2017-09-25 Thread Yong Wu
The ARM short descriptor has already limited the physical address to 32bit after the commit <76557391433c> ("iommu/io-pgtable: Sanitise map/unmap addresses"). But in MediaTek 4GB mode, the physical address is from 0x1__ to 0x1__. this will cause: WARNING: CPU: 4 PID: 3900 at

Re: iommu/io-pgtable: depend on !GENERIC_ATOMIC64 when using COMPILE_TEST with LPAE

2017-09-25 Thread Geert Uytterhoeven
Hi Will, On Wed, Jul 12, 2017 at 7:16 PM, Linux Kernel Mailing List wrote: > Web: > https://git.kernel.org/torvalds/c/c1004803b40596c1aabbbc78a6b1b33e4dfd96c6 > Commit: c1004803b40596c1aabbbc78a6b1b33e4dfd96c6 > Parent:

Re: bind pasid table API

2017-09-25 Thread Jean-Philippe Brucker
On 20/09/17 23:35, Jacob Pan wrote: > On Wed, 20 Sep 2017 13:09:47 +0100 > Jean-Philippe Brucker wrote: > >> Hi Jacob, >> >> [Adding Eric as he might need pasid_table_info for vSVM at some point] >> >> On 19/09/17 04:45, Jacob Pan wrote: >>> Hi Jean and All, >>>

Re: bind pasid table API

2017-09-25 Thread Jean-Philippe Brucker
On 21/09/17 04:00, Liu, Yi L wrote: > Hi Jean, > >> -Original Message- >> From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com] >> Sent: Wednesday, September 20, 2017 8:10 PM >> To: Pan, Jacob jun ; iommu@lists.linux- >> foundation.org >> Cc: Liu, Yi