Hi Joerg,
I love your patch! Perhaps something to improve:
[auto build test WARNING on iommu/next]
[also build test WARNING on linus/master next-20200609]
[cannot apply to v5.7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also
On Sat, May 30, 2020 at 04:10:02PM +0800, Yong Wu wrote:
> From: Maoguang Meng
>
> Update binding document since the avc and vp8 hardware encoder in
> mt8173 are now separated. Separate "mediatek,mt8173-vcodec-enc" to
> "mediatek,mt8173-vcodec-vp8-enc" and "mediatek,mt8173-vcodec-avc-enc".
The
Hi Jordan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on iommu/next]
[also build test ERROR on v5.7 next-20200609]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option
Hi Jordan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on iommu/next]
[also build test ERROR on v5.7 next-20200609]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option
+ Tiffany & Maoguang.
On Sat, 2020-05-30 at 16:10 +0800, Yong Wu wrote:
> From: Maoguang Meng
>
> MTK H264 Encoder(VENC_SYS) and VP8 Encoder(VENC_LT_SYS) are two
> independent hardware instance. They have their owner interrupt,
> register mapping, and special clocks.
>
> This patch seperates
Hi Joerg,
On 6/9/20 9:03 PM, Joerg Roedel wrote:
From: Joerg Roedel
Move all files related to the Intel IOMMU driver into its own
subdirectory.
Signed-off-by: Joerg Roedel
Reviewed-by: Jerry Snitselaar
Reviewed-by: Lu Baolu
Best regards,
baolu
---
MAINTAINERS
+ Tiffany & Maoguang.
On Sat, 2020-05-30 at 16:10 +0800, Yong Wu wrote:
> MediaTek IOMMU has already added the device_link between the consumer
> and smi-larb device. If the vcodec device call the pm_runtime_get_sync,
> the smi-larb's pm_runtime_get_sync also be called automatically.
>
> CC:
Add compatible strings for sm8150 and sm8250 iommus to documentation.
Signed-off-by: Jonathan Marek
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
Use the qcom implementation for IOMMU hardware on sm8150 and sm8250 SoCs.
Signed-off-by: Jonathan Marek
---
drivers/iommu/arm-smmu-impl.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c
index
Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
few changes. Notably, the HDK865 dts has regulator config changed a bit based
on downstream (I think sm8250-mtp.dts is wrong and copied too much from sm8150).
On Mon, Jun 08, 2020 at 11:48:51AM -0400, Jim Quinlan wrote:
> On Sun, Jun 7, 2020 at 12:500f9bfe0fb8840b268af1bbcc51f1cd440514e PM
> Andy Shevchenko wrote:
> > On Fri, Jun 05, 2020 at 05:26:48PM -0400, Jim Quinlan wrote:
...
> > > + *map_size = (num_ranges + 1) * sizeof(**map);
> > > +
Hi Andy,
On Tue, Jun 9, 2020 at 7:18 AM Andy Shevchenko
wrote:
>
> On Mon, Jun 08, 2020 at 11:48:51AM -0400, Jim Quinlan wrote:
> > On Sun, Jun 7, 2020 at 12:500f9bfe0fb8840b268af1bbcc51f1cd440514e PM
> > Andy Shevchenko wrote:
> > > On Fri, Jun 05, 2020 at 05:26:48PM -0400, Jim Quinlan wrote:
On Tue, Jun 09, 2020 at 07:17:20AM +0800, Lu Baolu wrote:
> PCI ACS is disabled if Intel IOMMU is off by default or intel_iommu=off
> is used in command line. Unfortunately, Intel IOMMU will be forced on if
> there're devices sitting on an external facing PCI port that is marked
> as untrusted
From: Joerg Roedel
Move all files related to the AMD IOMMU driver into its own
subdirectory.
Signed-off-by: Joerg Roedel
Reviewed-by: Jerry Snitselaar
---
MAINTAINERS | 2 +-
drivers/iommu/Makefile | 6 +++---
Hi,
here is the updated version of the changes to move the Intel and AMD
IOMMU drivers into their own subdirectories. This time with updated
MAINTAINERS file entries.
Regards,
Joerg
Joerg Roedel (2):
iommu/amd: Move AMD IOMMU driver into subdirectory
iommu/vt-d: Move Intel IOMMU
From: Joerg Roedel
Move all files related to the Intel IOMMU driver into its own
subdirectory.
Signed-off-by: Joerg Roedel
Reviewed-by: Jerry Snitselaar
---
MAINTAINERS | 3 +--
drivers/iommu/Makefile | 12 ++--
Thanks,
applied to the dma-mapping tree for 5.8.
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On 08/06/2020 02:50, Song Bao Hua (Barry Song) wrote:
>
>
>> -Original Message-
>> From: Matthias Brugger [mailto:matthias@gmail.com]
>> Sent: Monday, June 8, 2020 8:15 AM
>> To: Roman Gushchin ; Song Bao Hua (Barry Song)
>>
>> Cc: catalin.mari...@arm.com; John Garry ;
>>
On Tue, Jun 09, 2020 at 11:15:06AM +0200, Arnd Bergmann wrote:
> On Tue, Jun 9, 2020 at 6:02 AM Zhangfei Gao wrote:
> > On 2020/6/9 上午12:41, Bjorn Helgaas wrote:
> > > On Mon, Jun 08, 2020 at 10:54:15AM +0800, Zhangfei Gao wrote:
> > >> On 2020/6/6 上午7:19, Bjorn Helgaas wrote:
> > +++
Commit 0e764a01015d ("iommu/arm-smmu: Allow client devices to select
direct mapping") sets the initial domain type to SMMU_DOMAIN_IDENTITY
for devices that select direct mapping. This ends up setting the domain
as ARM_SMMU_DOMAIN_BYPASS which causes the stream ID mappings
for the device to be
On Tue, Jun 9, 2020 at 6:02 AM Zhangfei Gao wrote:
> On 2020/6/9 上午12:41, Bjorn Helgaas wrote:
> > On Mon, Jun 08, 2020 at 10:54:15AM +0800, Zhangfei Gao wrote:
> >> On 2020/6/6 上午7:19, Bjorn Helgaas wrote:
> +++ b/drivers/iommu/iommu.c
> @@ -2418,6 +2418,10 @@ int
The Scalable-mode Page-walk Coherency (SMPWC) field in the VT-d extended
capability register indicates the hardware coherency behavior on paging
structures accessed through the pasid table entry. This is ignored in
current code and using ECAP.C instead which is only valid in legacy mode.
Fix this
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