On 06/12/2021 12:52, Joerg Roedel wrote:
> On Fri, Nov 12, 2021 at 06:54:54PM +0800, Yong Wu wrote:
>> Yong Wu (14):
>> dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW
>> iommu/mediatek-v1: Free the existed fwspec if the master dev already
>> has
>> iommu/mediatek:
On 2021-12-06 12:40, Joerg Roedel wrote:
On Tue, Nov 23, 2021 at 02:10:39PM +, Robin Murphy wrote:
For reasons unclear, pagetable freeing is an effectively recursive
method implemented via an elaborate system of templated functions that
turns out to account for 25% of the object file size.
Please spell swiotlb with a lower case s. Otherwise this look good
Acked-by: Christoph Hellwig
Feel free to carry this in whatever tree is suitable for the rest of the
patches.
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On Sat, Nov 20, 2021 at 12:13:43PM +0900, Hector Martin wrote:
> drivers/iommu/io-pgtable-arm.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
Applied, thanks.
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Hi Sven,
On Wed, Nov 17, 2021 at 10:15:05PM +0100, Sven Peter wrote:
> Sven Peter (4):
> dt-bindings: iommu: dart: add t6000 compatible
> iommu/io-pgtable: Add DART subpage protection support
> iommu/io-pgtable: Add DART PTE support for t6000
> iommu: dart: Support t6000 variant
Looks
On Sun, Dec 05, 2021 at 03:18:10AM -0500, Tianyu Lan wrote:
> +static bool hyperv_cc_platform_has(enum cc_attr attr)
> +{
> +#ifdef CONFIG_HYPERV
> + return attr == CC_ATTR_GUEST_MEM_ENCRYPT;
> +#else
> + return false;
> +#endif
> +}
Can we even end up here without CONFIG_HYPERV?
On Wed, Oct 27, 2021 at 12:44:20PM +0200, Eric Auger wrote:
> Signed-off-by: Jean-Philippe Brucker
> Signed-off-by: Liu, Yi L
> Signed-off-by: Ashok Raj
> Signed-off-by: Jacob Pan
> Signed-off-by: Eric Auger
This Signed-of-by chain looks dubious, you are the author but the last
one in the
On Wed, Dec 01, 2021 at 05:33:20PM +, Jean-Philippe Brucker wrote:
> Jean-Philippe Brucker (5):
> iommu/virtio: Add definitions for VIRTIO_IOMMU_F_BYPASS_CONFIG
> iommu/virtio: Support bypass domains
> iommu/virtio: Sort reserved regions
> iommu/virtio: Pass end address to
On Tue, Nov 16, 2021 at 05:06:20PM +0800, Yicong Yang wrote:
> Export iommu_{get,put}_resv_regions() to the modules so that the driver
> can retrieve and use the reserved regions of the device.
Why should any driver bother? These functions are only used by the iommu
core to call into iommu
Hi Robin,
On Wed, Nov 24, 2021 at 02:05:15PM +, Robin Murphy wrote:
> Bah, seems like tegra-vic needs the same treatment too, but wasn't in my
> local config. Should I squash that into a respin of this patch on the
> grounds of being vaguely related, or would you prefer it separate?
In case
Hi Yong Wu,
On 12/11/2021 11:54, Yong Wu wrote:
> MediaTek IOMMU block diagram always like below:
>
> M4U
> |
> smi-common
> |
> -
> | | ...
> | |
> larb1 larb2
> | |
> vdec venc
>
> All the consumer connect
On Mon, Dec 06, 2021 at 09:59:03AM +0800, Lu Baolu wrote:
> @@ -941,48 +944,44 @@ int host1x_client_iommu_attach(struct host1x_client
> *client)
>* not the shared IOMMU domain, don't try to attach it to a different
>* domain. This allows using the IOMMU-backed DMA API.
>
On Tue, Nov 23, 2021 at 02:10:39PM +, Robin Murphy wrote:
> For reasons unclear, pagetable freeing is an effectively recursive
> method implemented via an elaborate system of templated functions that
> turns out to account for 25% of the object file size. Implementing it
> using regular
On Mon, Dec 06, 2021 at 09:58:46AM +0800, Lu Baolu wrote:
> >From the perspective of who is initiating the device to do DMA, device
> DMA could be divided into the following types:
>
> DMA_OWNER_DMA_API: Device DMAs are initiated by a kernel driver
> through the
On Tue, Nov 23, 2021 at 06:10:33PM +0200, Maxim Levitsky wrote:
> Best regards,
>Maxim Levitsky
>
> Maxim Levitsky (5):
> iommu/amd: restore GA log/tail pointer on host resume
> iommu/amd: x2apic mode: re-enable after resume
> iommu/amd: x2apic mode: setup the INTX registers on
Will, Joerg, Rob,
On 08/11/2021 10:36, Mikko Perttunen wrote:
On 9/16/21 5:32 PM, Mikko Perttunen wrote:
Hi all,
***
New in v2:
Added support for Tegra194
Use standard iommu-map property instead of custom mechanism
***
this series adds support for Host1x 'context isolation'. Since
when
On Thu, Nov 04, 2021 at 09:16:20AM +0200, Dafna Hirschfeld wrote:
> In case of an iommu page fault, the faulting iova is logged in
> trace_io_page_fault. It is therefore convenient to log the
> iova range in mapping/unmapping trace events so that it is
> easier to see if the faulting iova was
On Mon, Nov 08, 2021 at 02:13:49PM +0800, Lu Baolu wrote:
> Extend the scope of holding group->mutex so that it can cover the default
> domain check/attachment and direct mappings of reserved regions.
>
> Cc: Ashish Mhetre
> Fixes: 211ff31b3d33b ("iommu: Fix race condition during default domain
On 2021/12/6 19:56, Joerg Roedel wrote:
> On Tue, Nov 16, 2021 at 05:06:20PM +0800, Yicong Yang wrote:
>> Export iommu_{get,put}_resv_regions() to the modules so that the driver
>> can retrieve and use the reserved regions of the device.
>
> Why should any driver bother? These functions are only
On Mon, Dec 6, 2021 at 8:23 PM Hans Verkuil wrote:
>
> Hi Yong Wu,
>
> On 12/11/2021 11:54, Yong Wu wrote:
> > MediaTek IOMMU block diagram always like below:
> >
> > M4U
> > |
> > smi-common
> > |
> > -
> > | | ...
> > | |
> >
On Mon, Dec 06, 2021 at 01:33:36PM +0100, Hans Verkuil wrote:
> I think it might be easiest if it is all going through the media subsystem
> (except for the dts patches, we don't handle those unless specifically
> requested to do so). I need a resend for jpeg bindings txt to yaml
> conversion
On Fri, Nov 12, 2021 at 06:54:54PM +0800, Yong Wu wrote:
> Yong Wu (14):
> dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW
> iommu/mediatek-v1: Free the existed fwspec if the master dev already
> has
> iommu/mediatek: Return ENODEV if the device is NULL
>
From: Tianyu Lan
Hyper-V provides two kinds of Isolation VMs. VBS(Virtualization-based
security) and AMD SEV-SNP unenlightened Isolation VMs. This patchset
is to add support for these Isolation VM support in Linux.
The memory of these vms are encrypted and host can't access guest
memory
From: Tianyu Lan
hyperv Isolation VM requires bounce buffer support to copy
data from/to encrypted memory and so enable swiotlb force
mode to use swiotlb bounce buffer for DMA transaction.
In Isolation VM with AMD SEV, the bounce buffer needs to be
accessed via extra address space which is
From: Tianyu Lan
In Isolation VM with AMD SEV, bounce buffer needs to be accessed via
extra address space which is above shared_gpa_boundary (E.G 39 bit
address line) reported by Hyper-V CPUID ISOLATION_CONFIG. The access
physical address will be original physical address + shared_gpa_boundary.
On 12/6/2021 10:09 PM, Christoph Hellwig wrote:
Please spell swiotlb with a lower case s. Otherwise this look good
Acked-by: Christoph Hellwig
Feel free to carry this in whatever tree is suitable for the rest of the
patches.
Sure. Thanks for your ack and will update "swiotlb" in the next
On Mon, Dec 06, 2021 at 06:47:45AM -0800, Christoph Hellwig wrote:
> On Mon, Dec 06, 2021 at 10:45:35AM -0400, Jason Gunthorpe via iommu wrote:
> > IIRC the only thing this function does is touch ACPI and OF stuff?
> > Isn't that firmware?
> >
> > AFAICT amba uses this because AMBA devices might
On Mon, Dec 06, 2021 at 04:47:58PM +0100, Thomas Gleixner wrote:
> >>- The irqchip callbacks which can be implemented by these top
> >> level domains are going to be restricted.
> >
> > OK - I think it is great that the driver will see a special ops struct
> > that is 'ops for
The new helpers really could use a kerneldoc comment.
Also no need for the refcount_t with it's atomic operations for
attach_cnt either.
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On Sun, Dec 05, 2021 at 03:16:40PM +0100, Thomas Gleixner wrote:
> On Sat, Dec 04 2021 at 15:20, Thomas Gleixner wrote:
> > On Fri, Dec 03 2021 at 12:41, Jason Gunthorpe wrote:
> > So I need to break that up in a way which caters for both cases, but
> > does neither create a special case for PCI
On Mon, Dec 06, 2021 at 09:58:46AM +0800, Lu Baolu wrote:
> >From the perspective of who is initiating the device to do DMA, device
> DMA could be divided into the following types:
>
> DMA_OWNER_DMA_API: Device DMAs are initiated by a kernel driver
> through the
On Mon, Dec 06, 2021 at 06:13:01AM -0800, Christoph Hellwig wrote:
> On Mon, Dec 06, 2021 at 08:53:07AM +0100, Greg Kroah-Hartman wrote:
> > On Mon, Dec 06, 2021 at 09:58:48AM +0800, Lu Baolu wrote:
> > > The platform_dma_configure() is shared between platform and amba bus
> > > drivers. Rename
From: Tianyu Lan
Hyper-V provides Isolation VM which has memory encrypt support. Add
hyperv_cc_platform_has() and return true for check of GUEST_MEM_ENCRYPT
attribute.
Signed-off-by: Tianyu Lan
---
Change since v3:
* Change code style of checking GUEST_MEM attribute in the
From: Tianyu Lan
In Isolation VM, all shared memory with host needs to mark visible
to host via hvcall. vmbus_establish_gpadl() has already done it for
storvsc rx/tx ring buffer. The page buffer used by vmbus_sendpacket_
mpb_desc() still needs to be handled. Use DMA API(scsi_dma_map/unmap)
to
From: Tianyu Lan
In Isolation VM, all shared memory with host needs to mark visible
to host via hvcall. vmbus_establish_gpadl() has already done it for
netvsc rx/tx ring buffer. The page buffer used by vmbus_sendpacket_
pagebuffer() stills need to be handled. Use DMA API to map/umap
these memory
I really hate the amount of boilerplate code that having this in each
bus type causes.
Between that and the suggestion from Joerg I wonder if we could do the
following again:
- add new no_kernel_dma flag to struct device_driver
- set this flag for the various vfio drivers
- skip claiming the
On Mon, Dec 06, 2021 at 06:36:27AM -0800, Christoph Hellwig wrote:
> I really hate the amount of boilerplate code that having this in each
> bus type causes.
+1
I liked the first version of this series better with the code near
really_probe().
Can we go back to that with some
Jason,
On Mon, Dec 06 2021 at 10:19, Jason Gunthorpe wrote:
> On Sat, Dec 04, 2021 at 03:20:36PM +0100, Thomas Gleixner wrote:
>> even try to make the irqchip/domain code mangled into the other device
>> code. It should create the irqdomain with the associated chip and that
>> creation process
Hi Christoph:
Thanks for your review.
On 12/6/2021 10:06 PM, Christoph Hellwig wrote:
On Sun, Dec 05, 2021 at 03:18:10AM -0500, Tianyu Lan wrote:
+static bool hyperv_cc_platform_has(enum cc_attr attr)
+{
+#ifdef CONFIG_HYPERV
+ return attr == CC_ATTR_GUEST_MEM_ENCRYPT;
+#else
+
Il 03/12/21 07:40, Yong Wu ha scritto:
Add mt8186 SMI support.
Signed-off-by: Yong Wu
Acked-by: AngeloGioacchino Del Regno
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On 2021-11-11 06:50, Christoph Hellwig wrote:
Add two local variables to track if we want to remap the returned
address using vmap or call dma_set_uncached and use that to simplify
the code flow.
I still wonder about the asymmetry between the remap and set_uncached
cases WRT the memset(),
On 2021-11-11 06:50, Christoph Hellwig wrote:
Add a big central !dev_is_dma_coherent(dev) block to deal with as much
as of the uncached allocation schemes and document the schemes a bit
better.
With a clear mind and a side-by-side diff viewer, indeed the end result
is much more readable than
On 2021-11-11 06:50, Christoph Hellwig wrote:
We must never unencryped memory go back into the general page pool.
So if we fail to set it back to encrypted when freeing DMA memory, leak
the memory insted and warn the user.
Nit: typos of "unencrypted" and "instead". Plus presumably the first
[ +Barry ]
On 2021-11-30 07:45, Jay Chen wrote:
In the actual production environment, when we open
cma and per numa cma, if we do not increase the per
numa size configuration in cmdline, we find that our
performance has dropped by 20%.
Through analysis, we found that the default size of
On Sat, Dec 04, 2021 at 03:20:36PM +0100, Thomas Gleixner wrote:
> Jason,
>
> On Fri, Dec 03 2021 at 12:41, Jason Gunthorpe wrote:
> > On Fri, Dec 03, 2021 at 04:07:58PM +0100, Thomas Gleixner wrote:
> > Lets do a thought experiment, lets say we forget about the current PCI
> > MSI API.
I've
On 12/5/2021 6:31 PM, Juergen Gross wrote:
On 05.12.21 09:48, Tianyu Lan wrote:
On 12/5/2021 4:34 PM, Juergen Gross wrote:
On 05.12.21 09:18, Tianyu Lan wrote:
From: Tianyu Lan
hyperv Isolation VM requires bounce buffer support to copy
data from/to encrypted memory and so enable
On Mon, Dec 06, 2021 at 02:35:55PM +0100, Joerg Roedel wrote:
> > enum iommu_dma_owner type, void *owner_cookie);
> > void iommu_device_release_dma_owner(struct device *dev,
> > enum iommu_dma_owner type);
>
> It the owner is a group-wide setting, it should
On Mon, Dec 06, 2021 at 06:13:01AM -0800, Christoph Hellwig wrote:
> On Mon, Dec 06, 2021 at 08:53:07AM +0100, Greg Kroah-Hartman wrote:
> > On Mon, Dec 06, 2021 at 09:58:48AM +0800, Lu Baolu wrote:
> > > The platform_dma_configure() is shared between platform and amba bus
> > > drivers. Rename
On Mon, Dec 06, 2021 at 02:35:55PM +0100, Joerg Roedel wrote:
> On Mon, Dec 06, 2021 at 09:58:46AM +0800, Lu Baolu wrote:
> > >From the perspective of who is initiating the device to do DMA, device
> > DMA could be divided into the following types:
> >
> > DMA_OWNER_DMA_API: Device DMAs
Il 03/12/21 07:40, Yong Wu ha scritto:
sleep control means that when the larb go to sleep, we should wait a bit
until all the current commands are finished. thus, when the larb runtime
suspend, we need enable this function to wait until all the existed
command are finished. when the larb resume,
Jason,
On Mon, Dec 06 2021 at 10:43, Jason Gunthorpe wrote:
> On Sun, Dec 05, 2021 at 03:16:40PM +0100, Thomas Gleixner wrote:
>> > That's not really a good idea because dev->irqdomain is a generic
>> > mechanism and not restricted to the PCI use case. Special casing it for
>> > PCI is just
On Mon, Dec 06, 2021 at 08:53:07AM +0100, Greg Kroah-Hartman wrote:
> On Mon, Dec 06, 2021 at 09:58:48AM +0800, Lu Baolu wrote:
> > The platform_dma_configure() is shared between platform and amba bus
> > drivers. Rename the common helper to firmware_dma_configure() so that
> > both platform and
On 2021-11-30 08:14, Jay Chen wrote:
Currently, when iommu.passthrough=1 is set,
all arm smmu peripherals are bypassed. This
patch allows specific peripherals to use smmu translate.
The existing solution for this is the sysfs interface, where the usage
model is to start up with translation as
On Mon, Dec 06, 2021 at 10:45:35AM -0400, Jason Gunthorpe via iommu wrote:
> IIRC the only thing this function does is touch ACPI and OF stuff?
> Isn't that firmware?
>
> AFAICT amba uses this because AMBA devices might be linked to DT
> descriptions?
But DT descriptions aren't firmware. They
On 2021-11-11 06:50, Christoph Hellwig wrote:
If the architecture can't remap or set an address uncached there is no way
to fullfill a request for a coherent allocation. Return NULL in that case.
Note that this case currently does not happen, so this is a theoretical
fixup and/or a preparation
On Wed, Dec 1, 2021 at 9:57 AM Jon Hunter wrote:
>
> The dt_binding_check currently issues the following warnings for the
dtbs_check
> Tegra186 and Tegra194 SMMUs ...
>
> arch/arm64/boot/dts/nvidia/tegra186-p2771-.dt.yaml: iommu@1200:
> 'nvidia,memory-controller' does not match any
On Thu, Dec 2, 2021 at 11:11 AM Daniel P. Smith
wrote:
> Hi Paul!
/me waves
> On 11/30/21 8:06 PM, Paul Moore wrote:
> > On Fri, Aug 27, 2021 at 9:20 AM Ross Philipson
> > wrote:
> >>
> >> The larger focus of the Trechboot project (https://github.com/TrenchBoot)
> >> is to
> >> enhance the
No more users. Refactor the core code accordingly and move the global
interface under CONFIG_PCI_MSI_ARCH_FALLBACKS.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
include/linux/msi.h | 29 +++-
kernel/irq/msi.c|
It's hard to distinguish what platform_msi_domain_alloc() and
platform_msi_domain_alloc_irqs() are about. Make the distinction more
explicit and add comments which explain the use cases properly.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
Storing the platform private data in a MSI descriptor is sloppy at
best. The data belongs to the device and not to the descriptor.
Add a pointer to struct msi_device_data and store the pointer there.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
All non PCI/MSI usage variants have data structures in struct msi_desc with
only one member: xxx_index. PCI/MSI has a entry_nr member.
Add a common msi_index member to struct msi_desc so all implementations can
share it which allows further consolidation.
Signed-off-by: Thomas Gleixner
Allocate the MSI device data on first invocation of the allocation function.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
Cc: Stuart Yoder
Cc: Laurentiu Tudor
---
drivers/bus/fsl-mc/fsl-mc-msi.c | 14 --
1 file changed, 8
Allocate MSI device data on first use, i.e. when a PCI driver invokes one
of the PCI/MSI enablement functions.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/pci/msi/msi.c | 20 +++-
1 file changed, 15 insertions(+), 5
Create struct msi_device_data and add a pointer of that type to struct
dev_msi_info, which is part of struct device. Provide an allocator function
which can be invoked from the MSI interrupt allocation code pathes.
Add a properties field to the data structure as a first member so the
allocation
Add new allocation functions which can be activated by domain info
flags. They store the groups pointer in struct msi_device_data.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
include/linux/msi.h |4
kernel/irq/msi.c| 42
Allocate the MSI device data on first invocation of the allocation function.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
Cc: Nishanth Menon
Cc: Tero Kristo
Cc: Santosh Shilimkar
Cc: linux-arm-ker...@lists.infradead.org
---
Set the domain info flag and remove the local sysfs code.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/base/platform-msi.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
--- a/drivers/base/platform-msi.c
+++
Allocate the MSI device data on first invocation of the allocation function
for platform MSI private data.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/base/platform-msi.c |8 +++-
1 file changed, 7 insertions(+), 1
Set the domain info flag which makes the core code handle sysfs groups and
put an explicit invocation into the legacy code.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/pci/msi/irqdomain.c |2 +-
drivers/pci/msi/legacy.c|6
Use the common msi_index member and get rid of the pointless wrapper struct.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/bus/fsl-mc/fsl-mc-allocator.c |2 +-
drivers/bus/fsl-mc/fsl-mc-msi.c |6 +++---
The usage of msi_desc::pci::entry_nr is confusing at best. It's the index
into the MSI[X] descriptor table.
Use msi_desc::msi_index which is shared between all MSI incarnations
instead of having a PCI specific storage for no value.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
This is the second part of [PCI]MSI refactoring which aims to provide the
ability of expanding MSI-X vectors after enabling MSI-X.
The first part of this work can be found here:
https://lore.kernel.org/r/20211206210147.872865...@linutronix.de
This second part has the following important
The only unconditional part of MSI data in struct device is the irqdomain
pointer. Everything else can be allocated on demand. Create a data
structure and move the irqdomain pointer into it. The other MSI specific
parts are going to be removed from struct device in later steps.
Signed-off-by:
Add a properties field which allows core code to store information for easy
retrieval in order to replace MSI descriptor fiddling.
Signed-off-by: Thomas Gleixner
---
V2: Add a setter function to prepare for future changes
---
include/linux/msi.h | 17 +
kernel/irq/msi.c|
Use the common msi_index member and get rid of the pointless wrapper struct.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/irqchip/irq-ti-sci-inta.c |2 +-
drivers/soc/ti/ti_sci_inta_msi.c |6 +++---
include/linux/msi.h
Store the properties which are interesting for various places so the MSI
descriptor fiddling can be removed.
Signed-off-by: Thomas Gleixner
---
V2: Use the setter function
---
drivers/pci/msi/msi.c |8
1 file changed, 8 insertions(+)
--- a/drivers/pci/msi/msi.c
+++
instead of fiddling with MSI descriptors.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
arch/x86/pci/xen.c |6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -399,9 +399,7 @@
instead of fiddling with MSI descriptors.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
arch/x86/kernel/apic/msi.c |5 +
1 file changed, 1 insertion(+), 4 deletions(-)
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
Use the common msi_index member and get rid of the pointless wrapper struct.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
Cc: linux-arm-ker...@lists.infradead.org
Cc: iommu@lists.linux-foundation.org
Cc: dmaeng...@vger.kernel.org
---
Jason,
On Mon, Dec 06 2021 at 13:00, Jason Gunthorpe wrote:
> On Mon, Dec 06, 2021 at 04:47:58PM +0100, Thomas Gleixner wrote:
>> It will need some more than that, e.g. mask/unmask and as we discussed
>> quite some time ago something like the irq_buslock/unlock pair, so you
>> can handle updates
Storing a pointer to the MSI descriptor just to track the Linux interrupt
number is daft. Just store the interrupt number and be done with it.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
Cc: Stuart Yoder
---
drivers/bus/fsl-mc/dprc-driver.c
There is no reason to walk the MSI descriptors to retrieve the interrupt
number for a device. Use msi_get_virq() instead.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
Acked-by: Sinan Kaya
Cc: dmaeng...@vger.kernel.org
---
Storing a pointer to the MSI descriptor just to keep track of the Linux
interrupt number is daft. Use msi_get_virq() instead.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
Cc: dmaeng...@vger.kernel.org
Cc: Vinod Koul
---
drivers/dma/mv_xor_v2.c |
Let the core code fiddle with the MSI descriptor retrieval.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
Cc: Mark Rutland
Cc: Will Deacon
Cc: linux-arm-ker...@lists.infradead.org
---
drivers/perf/arm_smmuv3_pmu.c |5 +
1 file changed, 1
Let the core code fiddle with the MSI descriptor retrieval.
Signed-off-by: Thomas Gleixner
Tested-by: Robin Murphy
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 19 +++
1 file changed, 3 insertions(+), 16
No point in retrieving the MSI descriptors. Just query the Linux interrupt
number.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/mailbox/bcm-flexrm-mailbox.c |7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
---
Provide a domain info flag which makes the core code check for a contiguous
MSI-X index on allocation. That's simpler than checking it at some other
domain callback in architecture code.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
Set the domain info flag and remove the check.
Signed-off-by: Thomas Gleixner
---
V2: Remove it completely - Cedric
---
arch/powerpc/platforms/pseries/msi.c | 33 -
1 file changed, 8 insertions(+), 25 deletions(-)
--- a/arch/powerpc/platforms/pseries/msi.c
+++
This allows drivers to retrieve the Linux interrupt number instead of
fiddling with MSI descriptors.
msi_get_virq() returns the Linux interrupt number or 0 in case that there
is no entry for the given MSI index.
Signed-off-by: Thomas Gleixner
---
V2: Simplify the implementation and let PCI deal
Replace open coded MSI descriptor chasing and use the proper accessor
functions instead.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/pci/msi/msi.c | 26 ++
1 file changed, 10 insertions(+), 16 deletions(-)
Use msi_get_vector() and handle the return value to be compatible.
No functional change intended.
Signed-off-by: Thomas Gleixner
---
V2: Handle the INTx case directly instead of trying to be overly smart - Marc
---
drivers/pci/msi/msi.c | 25 +
1 file changed, 5
Just use the core function msi_get_virq().
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
drivers/dma/ti/k3-udma-private.c |6 ++
drivers/dma/ti/k3-udma.c | 10 --
drivers/soc/ti/k3-ringacc.c|
instead of fiddling with MSI descriptors.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
kernel/irq/msi.c | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -122,21
instead of fiddling with MSI descriptors.
Signed-off-by: Thomas Gleixner
---
V2: Invoke the function with the correct number of arguments - Andy
---
arch/powerpc/platforms/cell/axon_msi.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
---
instead of fiddling with MSI descriptors.
Signed-off-by: Thomas Gleixner
Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Jason Gunthorpe
---
arch/powerpc/platforms/pseries/msi.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/powerpc/platforms/pseries/msi.c
+++
On Mon, Dec 06, 2021 at 09:28:47PM +0100, Thomas Gleixner wrote:
> That's already the plan in some form, but there's a long way towards
> that. See below.
Okay, then I think we are thinking the same sorts of things, it is
good to see
> Also there will be a question of how many different
On Mon, Dec 06 2021 at 17:06, Jason Gunthorpe wrote:
> On Mon, Dec 06, 2021 at 09:28:47PM +0100, Thomas Gleixner wrote:
>> I wish I could mask underneath for some stuff on x86. Though that would
>> not help with the worst problem vs. affinity settings. See the horrible
>> dance in:
>
> My thinking
On 12/6/21 11:04 PM, Jason Gunthorpe wrote:
On Mon, Dec 06, 2021 at 06:47:45AM -0800, Christoph Hellwig wrote:
On Mon, Dec 06, 2021 at 10:45:35AM -0400, Jason Gunthorpe via iommu wrote:
IIRC the only thing this function does is touch ACPI and OF stuff?
Isn't that firmware?
AFAICT amba uses
On 12/6/21 11:06 PM, Jason Gunthorpe wrote:
On Mon, Dec 06, 2021 at 06:36:27AM -0800, Christoph Hellwig wrote:
I really hate the amount of boilerplate code that having this in each
bus type causes.
+1
I liked the first version of this series better with the code near
really_probe().
Can we
Currently three dma atomic pools are initialized as long as the relevant
kernel codes are built in. While in kdump kernel of x86_64, this is not
right when trying to create atomic_pool_dma, because there's no managed
pages in DMA zone. In the case, DMA zone only has low 1M memory presented
and
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