This is my second attempt to make Marvell 88SE91xx SATA controllers work when
IOMMU is enabled.[1][2]
As suggested, it no longer tries to add support for phantom functions.
What's missing:
* No AMD support. I need some help with this.
* Table of affected chip IDs is incomplete. I think 0x9123,
The dma_pte_free_pagetable() function will only free a page table page
if it is asked to free the *entire* 2MiB range that it covers. So if a
page table page was used for one or more small mappings, it's likely to
end up still present in the page tables... but with no valid PTEs.
This was fine
On 12/05/2012 02:37 AM, Hiroshi Doyu wrote:
Most of platform devices are IOMMU'able in Tegra30 SoC. Registering
all IOMMU'able devices manually isn't nice. This patch allows
platform bus_notifier to register IOMMU devices. Map info can be
passed from DT. Info format is:
dma-window = 0
On 2012-12-19, at 18:58, Andrew Cooks aco...@gmail.com wrote:
This is my second attempt to make Marvell 88SE91xx SATA controllers work when
IOMMU is enabled.[1][2]
As suggested, it no longer tries to add support for phantom functions.
What's missing:
* No AMD support. I need some help
Ack.
2012/12/19 Andrew Cooks aco...@gmail.com
On Wed, Dec 19, 2012 at 9:41 PM, Chu Ying gm.y...@gmail.com wrote:
On 2012-12-19, at 18:58, Andrew Cooks aco...@gmail.com wrote:
This is my second attempt to make Marvell 88SE91xx SATA controllers
work when IOMMU is enabled.[1][2]
+static
