Re: [PATCH v2] iommu: exynos: Fix trivial typos
On 08/03/14 21:36, Sachin Kamat wrote: Fixed trivial typos and grammar to improve readability. Changed w/a to workaround. Signed-off-by: Sachin Kamat sachin.ka...@samsung.com --- drivers/iommu/exynos-iommu.c | 51 ++-- 1 file changed, 26 insertions(+), 25 deletions(-) Acked-by: Randy Dunlap rdun...@infradead.org Thanks. -- ~Randy ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH v1 1/2] iommu/arm-smmu: Fix programming of SMMU_CBn_TCR for stage 1
Hi Olav, On Mon, Aug 04, 2014 at 01:47:43AM +0100, Olav Haugan wrote: Stage-1 context bank does not have SMMU_CBn_TCR[SL0] field. SL0 field is only applicable to stage-2 context banks. Ha, I actually noticed this last week but didn't get around to writing a a fix. Thanks for taking a look! Signed-off-by: Olav Haugan ohau...@codeaurora.org --- drivers/iommu/arm-smmu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index ff6633d..a83ca6a 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -833,6 +833,8 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain) reg |= (TTBCR2_ADDR_48 TTBCR_PASIZE_SHIFT); break; } + reg |= (TTBCR_SL0_LVL_1 TTBCR_SL0_SHIFT); + I think this block is all predicated on smmu-version 1, so we need something for stage2 CBs on SMMUv1 too. Will ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH v1 2/2] iommu/arm-smmu: Correctly program S2CR and SMR registers
On Mon, Aug 04, 2014 at 01:47:44AM +0100, Olav Haugan wrote: When stream matching is supported by the hardware the S2CR is indexed by the stream matching register group index and not the stream id. Fix the programming of the S2CR register to ensure it is programmed correctly in both cases. In addition, the SMR registers does not exist when stream matching is not supported by the hardware. Avoid writing to this register if not needed. I've already fixed some/all of this in my iommu/pci branch: https://git.kernel.org/cgit/linux/kernel/git/will/linux.git/commit/?h=iommu/pciid=d4e46030b91367b50ecb544fee021b30e4ec4e9a Can you try rebasing on that and see if there's anything left to do, please? Once we get to -rc1, I'll sort out my branches so the iommu/devel branch will contain stuff that I consider candidates for merging (since the iommu/pci branch contains a bunch of WIP/RFC stuff too) Cheers, Will ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH] iommu/amd: Implement syscore_ops.shutdown()
On Sat, Aug 02, 2014 at 10:25:39AM +0800, Jiang Liu wrote: During hibernation or shutdown, AMD iommu generates warnings on some platforms as below: [ 89.089832] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0x0080 flags=0x0020] [ 89.102239] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0x flags=0x] [ 89.114684] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 89.127162] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 89.139576] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 89.152017] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 89.164481] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] It may be caused by that the firmware takes back the device after the OS released it and now the legacy emulation tries to do DMA with it. But since there is an IOMMU the physical addresses it tries to DMA to is not mapped and it generated IO page faults. So explicitly shutdown IOMMU units during hibernation or poweroff. Unfortunately, this doesn't help. The current observation is that I don't get the IOPFs during *every* suspend-to-disk cycle but I do get them from time to time. Here are all IOPFs from 10ish suspend/resume cycles with this patch. The newlines between them show how the IOPFs happen: sometimes it is the GPU (device 01:00.0) with a single IOPF... [ 78.482122] AMD-Vi: Event logged [IO_PAGE_FAULT device=01:00.0 domain=0x0014 address=0x20001000 flags=0x] [ 171.593660] AMD-Vi: Event logged [IO_PAGE_FAULT device=01:00.0 domain=0x0014 address=0x20001000 flags=0x] and sometimes it is the GPU and OHCI0 with multiple ones. [ 280.680624] IO_PAGE_FAULT device=01:00.0 domain=0x0014 address=0x20001000 flags=0x] [ 280.694539] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0x0080 flags=0x0020] [ 280.707917] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0x flags=0x] [ 280.721234] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 280.734565] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 280.747877] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 280.761227] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 280.77] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:12.0 domain=0x0009 address=0xffc0 flags=0x0010] [ 290.686170] AMD-Vi: Event logged [IO_PAGE_FAULT device=01:00.0 domain=0x0014 address=0x20001000 flags=0x] [ 49.393307] IO_PAGE_FAULT device=01:00.0 domain=0x0014 address=0x20001000 flags=0x] Other than that, the box is fine AFAICT. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH] iommu/vt-d: Do not BUG_ON in intel_unmap if no domain
From: Joerg Roedel jroe...@suse.de This BUG_ON is easy to trigger with device-hotplug (e.g. SR-IOV). The device_notifier function in the Intel IOMMU driver listens to the BUS_NOTIFY_DEL_DEVICE event and frees the domain for the device if it is reveived. But this event is triggered before the device driver is unbound from the device. When the driver core actually removes the device the driver may release pending DMA resources, which ends up in intel_unmap and triggers the BUG_ON. Not listening to BUS_NOTIFY_DEL_DEVICE would cause resource leakage with devices that have never been assigned to any driver, so fix this issue by just making unmap a nop when the domain is already released. Cc: Jiang Liu jiang@linux.intel.com Cc: David Woodhouse dw...@infradead.org Signed-off-by: Joerg Roedel jroe...@suse.de --- drivers/iommu/intel-iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index d1f5caa..7d689d7 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -3196,7 +3196,8 @@ static void intel_unmap(struct device *dev, dma_addr_t dev_addr) return; domain = find_domain(dev); - BUG_ON(!domain); + if (!domain) + return; iommu = domain_get_iommu(domain); -- 1.9.1 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH] iommu/vt-d: Do not BUG_ON in intel_unmap if no domain
On Mon, Aug 04, 2014 at 01:23:06PM +0200, Joerg Roedel wrote: From: Joerg Roedel jroe...@suse.de This BUG_ON is easy to trigger with device-hotplug (e.g. SR-IOV). The device_notifier function in the Intel IOMMU driver listens to the BUS_NOTIFY_DEL_DEVICE event and frees the domain for the device if it is reveived. But this event is triggered before the device driver is unbound from the device. When the driver core actually removes the device the driver may release pending DMA resources, which ends up in intel_unmap and triggers the BUG_ON. Not listening to BUS_NOTIFY_DEL_DEVICE would cause resource leakage with devices that have never been assigned to any driver, so fix this issue by just making unmap a nop when the domain is already released. Cc: Jiang Liu jiang@linux.intel.com Cc: David Woodhouse dw...@infradead.org Signed-off-by: Joerg Roedel jroe...@suse.de --- drivers/iommu/intel-iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index d1f5caa..7d689d7 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -3196,7 +3196,8 @@ static void intel_unmap(struct device *dev, dma_addr_t dev_addr) return; domain = find_domain(dev); - BUG_ON(!domain); + if (!domain) + return; It is always questionable when people remove BUG_ONs because relaxing assertions sound like a temporary fix more often than not. Sounds to me that the original commit which deals with BUS_NOTIFY_DEL_DEVICE needs to try again with the fix. :-) -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH v1 1/2] iommu/arm-smmu: Fix programming of SMMU_CBn_TCR for stage 1
On 8/4/2014 2:41 AM, Will Deacon wrote: Hi Olav, On Mon, Aug 04, 2014 at 01:47:43AM +0100, Olav Haugan wrote: Stage-1 context bank does not have SMMU_CBn_TCR[SL0] field. SL0 field is only applicable to stage-2 context banks. Ha, I actually noticed this last week but didn't get around to writing a a fix. Thanks for taking a look! Signed-off-by: Olav Haugan ohau...@codeaurora.org --- drivers/iommu/arm-smmu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index ff6633d..a83ca6a 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -833,6 +833,8 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain) reg |= (TTBCR2_ADDR_48 TTBCR_PASIZE_SHIFT); break; } +reg |= (TTBCR_SL0_LVL_1 TTBCR_SL0_SHIFT); + I think this block is all predicated on smmu-version 1, so we need something for stage2 CBs on SMMUv1 too. Oh, I see. I will fix that. Olav -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH] iommu/msm: Switch to using managed resources
This switches the driver to using managed resources to simplify error
handling and to do away with remove function.
CC: Stepan Moskovchenko step...@codeaurora.org
CC: Joerg Roedel j...@8bytes.org
CC: Stephen Boyd sb...@codeaurora.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/iommu/msm_iommu_dev.c | 76 +++--
1 file changed, 19 insertions(+), 57 deletions(-)
diff --git a/drivers/iommu/msm_iommu_dev.c b/drivers/iommu/msm_iommu_dev.c
index 61def7cb..38a538f 100644
--- a/drivers/iommu/msm_iommu_dev.c
+++ b/drivers/iommu/msm_iommu_dev.c
@@ -140,39 +140,29 @@ static int msm_iommu_probe(struct platform_device *pdev)
return 0;
}
- drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
-
- if (!drvdata) {
- ret = -ENOMEM;
- goto fail;
- }
+ if (!iommu_dev)
+ return -ENOMEM;
- if (!iommu_dev) {
- ret = -ENODEV;
- goto fail;
- }
+ drvdata = devm_kzalloc(pdev-dev, sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
- iommu_pclk = clk_get(NULL, smmu_pclk);
- if (IS_ERR(iommu_pclk)) {
- ret = -ENODEV;
- goto fail;
- }
+ iommu_pclk = devm_clk_get(pdev-dev, smmu_pclk);
+ if (IS_ERR(iommu_pclk))
+ return -ENODEV;
ret = clk_prepare_enable(iommu_pclk);
if (ret)
- goto fail_enable;
-
- iommu_clk = clk_get(pdev-dev, iommu_clk);
+ return ret;
+ iommu_clk = devm_clk_get(pdev-dev, iommu_clk);
if (!IS_ERR(iommu_clk)) {
if (clk_get_rate(iommu_clk) == 0)
clk_set_rate(iommu_clk, 1);
ret = clk_prepare_enable(iommu_clk);
- if (ret) {
- clk_put(iommu_clk);
+ if (ret)
goto fail_pclk;
- }
} else
iommu_clk = NULL;
@@ -205,14 +195,13 @@ static int msm_iommu_probe(struct platform_device *pdev)
goto fail_clk;
}
- ret = request_irq(irq, msm_iommu_fault_handler, 0,
+ ret = devm_request_irq(pdev-dev, irq, msm_iommu_fault_handler, 0,
msm_iommu_secure_irpt_handler, drvdata);
if (ret) {
pr_err(Request IRQ %d failed with ret=%d\n, irq, ret);
goto fail_clk;
}
-
drvdata-pclk = iommu_pclk;
drvdata-clk = iommu_clk;
drvdata-base = regs_base;
@@ -231,16 +220,10 @@ static int msm_iommu_probe(struct platform_device *pdev)
return 0;
fail_clk:
- if (iommu_clk) {
+ if (iommu_clk)
clk_disable(iommu_clk);
- clk_put(iommu_clk);
- }
fail_pclk:
clk_disable_unprepare(iommu_pclk);
-fail_enable:
- clk_put(iommu_pclk);
-fail:
- kfree(drvdata);
return ret;
}
@@ -250,14 +233,9 @@ static int msm_iommu_remove(struct platform_device *pdev)
drv = platform_get_drvdata(pdev);
if (drv) {
- if (drv-clk) {
+ if (drv-clk)
clk_unprepare(drv-clk);
- clk_put(drv-clk);
- }
clk_unprepare(drv-pclk);
- clk_put(drv-pclk);
- memset(drv, 0, sizeof(*drv));
- kfree(drv);
}
return 0;
}
@@ -276,7 +254,8 @@ static int msm_iommu_ctx_probe(struct platform_device *pdev)
if (!drvdata)
return -ENODEV;
- ctx_drvdata = kzalloc(sizeof(*ctx_drvdata), GFP_KERNEL);
+ ctx_drvdata = devm_kzalloc(pdev-dev, sizeof(*ctx_drvdata),
+ GFP_KERNEL);
if (!ctx_drvdata)
return -ENOMEM;
@@ -288,14 +267,12 @@ static int msm_iommu_ctx_probe(struct platform_device
*pdev)
ret = clk_prepare_enable(drvdata-pclk);
if (ret)
- goto fail;
+ return ret;
if (drvdata-clk) {
ret = clk_prepare_enable(drvdata-clk);
- if (ret) {
+ if (ret)
clk_disable_unprepare(drvdata-pclk);
- goto fail;
- }
}
/* Program the M2V tables for this context */
@@ -329,20 +306,6 @@ static int msm_iommu_ctx_probe(struct platform_device
*pdev)
dev_info(pdev-dev, context %s using bank %d\n, c-name, c-num);
return 0;
-fail:
- kfree(ctx_drvdata);
- return ret;
-}
-
-static int msm_iommu_ctx_remove(struct platform_device *pdev)
-{
- struct msm_iommu_ctx_drvdata *drv = NULL;
- drv = platform_get_drvdata(pdev);
- if (drv) {
- memset(drv, 0, sizeof(struct msm_iommu_ctx_drvdata));
- kfree(drv);
- }
- return 0;
}
static struct platform_driver msm_iommu_driver = {
@@
[PATCH 1/1] iommu: exynos: Fix trivial typos
Fixed trivial typos and grammar to improve readability.
Signed-off-by: Sachin Kamat sachin.ka...@samsung.com
---
drivers/iommu/exynos-iommu.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index d037e87..327ebec 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -32,7 +32,7 @@
typedef u32 sysmmu_iova_t;
typedef u32 sysmmu_pte_t;
-/* We does not consider super section mapping (16MB) */
+/* We do not consider super section mapping (16MB) */
#define SECT_ORDER 20
#define LPAGE_ORDER 16
#define SPAGE_ORDER 12
@@ -307,7 +307,7 @@ static void show_fault_information(const char *name,
static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
{
- /* SYSMMU is in blocked when interrupt occurred. */
+ /* SYSMMU is in blocked state when interrupt occurred. */
struct sysmmu_drvdata *data = dev_id;
enum exynos_sysmmu_inttype itype;
sysmmu_iova_t addr = -1;
@@ -567,8 +567,8 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev,
sysmmu_iova_t iova,
/*
* L2TLB invalidation required
* 4KB page: 1 invalidation
-* 64KB page: 16 invalidation
-* 1MB page: 64 invalidation
+* 64KB page: 16 invalidations
+* 1MB page: 64 invalidations
* because it is set-associative TLB
* with 8-way and 64 sets.
* 1MB page can be cached in one of all sets.
@@ -862,13 +862,13 @@ static sysmmu_pte_t *alloc_lv2entry(struct
exynos_iommu_domain *priv,
/*
* If pretched SLPD is a fault SLPD in zero_l2_table, FLPD cache
-* may caches the address of zero_l2_table. This function
+* may cache the address of zero_l2_table. This function
* replaces the zero_l2_table with new L2 page table to write
* valid mappings.
* Accessing the valid area may cause page fault since FLPD
-* cache may still caches zero_l2_table for the valid area
+* cache may still cache zero_l2_table for the valid area
* instead of new L2 page table that have the mapping
-* information of the valid area
+* information of the valid area.
* Thus any replacement of zero_l2_table with other valid L2
* page table must involve FLPD cache invalidation for System
* MMU v3.3.
@@ -963,14 +963,14 @@ static int lv2set_page(sysmmu_pte_t *pent, phys_addr_t
paddr, size_t size,
/*
* *CAUTION* to the I/O virtual memory managers that support exynos-iommu:
*
- * System MMU v3.x have an advanced logic to improve address translation
+ * System MMU v3.x has an advanced logic to improve address translation
* performance with caching more page table entries by a page table walk.
* However, the logic has a bug that caching fault page table entries and
System
* MMU reports page fault if the cached fault entry is hit even though the
fault
* entry is updated to a valid entry after the entry is cached.
* To prevent caching fault page table entries which may be updated to valid
* entries later, the virtual memory manager should care about the w/a about
the
- * problem. The followings describe w/a.
+ * problem. The following describes w/a.
*
* Any two consecutive I/O virtual address regions must have a hole of 128KiB
* in maximum to prevent misbehavior of System MMU 3.x. (w/a of h/w bug)
@@ -982,8 +982,8 @@ static int lv2set_page(sysmmu_pte_t *pent, phys_addr_t
paddr, size_t size,
*
* Because System MMU v3.3 caches page table entries more aggressively, it
needs
* more w/a.
- * - Any two consecutive I/O virtual regions must be have a hole of larger size
- * than or equal size to 128KiB.
+ * - Any two consecutive I/O virtual regions must be have a hole of size larger
+ * than or equal to 128KiB.
* - Start address of an I/O virtual region must be aligned by 128KiB.
*/
static int exynos_iommu_map(struct iommu_domain *domain, unsigned long l_iova,
--
1.8.1.2
___
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[PATCH v2] iommu: exynos: Fix trivial typos
Fixed trivial typos and grammar to improve readability.
Changed w/a to workaround.
Signed-off-by: Sachin Kamat sachin.ka...@samsung.com
---
drivers/iommu/exynos-iommu.c | 51 ++--
1 file changed, 26 insertions(+), 25 deletions(-)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index d037e87..7423318 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -32,7 +32,7 @@
typedef u32 sysmmu_iova_t;
typedef u32 sysmmu_pte_t;
-/* We does not consider super section mapping (16MB) */
+/* We do not consider super section mapping (16MB) */
#define SECT_ORDER 20
#define LPAGE_ORDER 16
#define SPAGE_ORDER 12
@@ -307,7 +307,7 @@ static void show_fault_information(const char *name,
static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
{
- /* SYSMMU is in blocked when interrupt occurred. */
+ /* SYSMMU is in blocked state when interrupt occurred. */
struct sysmmu_drvdata *data = dev_id;
enum exynos_sysmmu_inttype itype;
sysmmu_iova_t addr = -1;
@@ -567,8 +567,8 @@ static void sysmmu_tlb_invalidate_entry(struct device *dev,
sysmmu_iova_t iova,
/*
* L2TLB invalidation required
* 4KB page: 1 invalidation
-* 64KB page: 16 invalidation
-* 1MB page: 64 invalidation
+* 64KB page: 16 invalidations
+* 1MB page: 64 invalidations
* because it is set-associative TLB
* with 8-way and 64 sets.
* 1MB page can be cached in one of all sets.
@@ -714,7 +714,7 @@ static int exynos_iommu_domain_init(struct iommu_domain
*domain)
if (!priv-lv2entcnt)
goto err_counter;
- /* w/a of System MMU v3.3 to prevent caching 1MiB mapping */
+ /* Workaround for System MMU v3.3 to prevent caching 1MiB mapping */
for (i = 0; i NUM_LV1ENTRIES; i += 8) {
priv-pgtable[i + 0] = ZERO_LV2LINK;
priv-pgtable[i + 1] = ZERO_LV2LINK;
@@ -861,14 +861,14 @@ static sysmmu_pte_t *alloc_lv2entry(struct
exynos_iommu_domain *priv,
pgtable_flush(sent, sent + 1);
/*
-* If pretched SLPD is a fault SLPD in zero_l2_table, FLPD cache
-* may caches the address of zero_l2_table. This function
-* replaces the zero_l2_table with new L2 page table to write
-* valid mappings.
+* If pre-fetched SLPD is a faulty SLPD in zero_l2_table,
+* FLPD cache may cache the address of zero_l2_table. This
+* function replaces the zero_l2_table with new L2 page table
+* to write valid mappings.
* Accessing the valid area may cause page fault since FLPD
-* cache may still caches zero_l2_table for the valid area
-* instead of new L2 page table that have the mapping
-* information of the valid area
+* cache may still cache zero_l2_table for the valid area
+* instead of new L2 page table that has the mapping
+* information of the valid area.
* Thus any replacement of zero_l2_table with other valid L2
* page table must involve FLPD cache invalidation for System
* MMU v3.3.
@@ -963,27 +963,27 @@ static int lv2set_page(sysmmu_pte_t *pent, phys_addr_t
paddr, size_t size,
/*
* *CAUTION* to the I/O virtual memory managers that support exynos-iommu:
*
- * System MMU v3.x have an advanced logic to improve address translation
+ * System MMU v3.x has advanced logic to improve address translation
* performance with caching more page table entries by a page table walk.
- * However, the logic has a bug that caching fault page table entries and
System
- * MMU reports page fault if the cached fault entry is hit even though the
fault
- * entry is updated to a valid entry after the entry is cached.
- * To prevent caching fault page table entries which may be updated to valid
- * entries later, the virtual memory manager should care about the w/a about
the
- * problem. The followings describe w/a.
+ * However, the logic has a bug that while caching faulty page table entries,
+ * System MMU reports page fault if the cached fault entry is hit even though
+ * the fault entry is updated to a valid entry after the entry is cached.
+ * To prevent caching faulty page table entries which may be updated to valid
+ * entries later, the virtual memory manager should care about the workaround
+ * for the problem. The following describes the workaround.
*
* Any two consecutive I/O virtual address regions must have a hole of 128KiB
- * in maximum to prevent misbehavior of System MMU 3.x. (w/a of h/w bug)
+ * at maximum to prevent misbehavior of System MMU 3.x (workaround for h/w
bug).
*
- * Precisely, any start
Re: [PATCH] iommu/vt-d: Do not BUG_ON in intel_unmap if no domain
On Mon, Aug 04, 2014 at 01:42:05PM +0200, Borislav Petkov wrote: It is always questionable when people remove BUG_ONs because relaxing assertions sound like a temporary fix more often than not. Sounds to me that the original commit which deals with BUS_NOTIFY_DEL_DEVICE needs to try again with the fix. :-) Right, but the real fix would be to add a bus notifier that is called after the device driver released the device and use this one instead of BUS_NOTIFY_DEL_DEVICE. But that change wouldn't be suitable for -stable and just removing the event handler for BUS_NOTIFY_DEL_DEVICE would cause resource leakage again on hotplug, so I think this fix is the best for now. We can re-add the BUG_ON when we have a real fix upstream. Joerg ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v2 1/2] iommu/arm-smmu: Fix programming of SMMU_CBn_TCR for stage 1
Stage-1 context bank does not have SMMU_CBn_TCR[SL0] field. SL0 field is only applicable to stage-2 context banks. Signed-off-by: Olav Haugan ohau...@codeaurora.org --- drivers/iommu/arm-smmu.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 3cf698d..c16431f 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -864,8 +864,11 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain) reg |= TTBCR_EAE | (TTBCR_SH_IS TTBCR_SH0_SHIFT) | (TTBCR_RGN_WBWA TTBCR_ORGN0_SHIFT) | - (TTBCR_RGN_WBWA TTBCR_IRGN0_SHIFT) | - (TTBCR_SL0_LVL_1 TTBCR_SL0_SHIFT); + (TTBCR_RGN_WBWA TTBCR_IRGN0_SHIFT); + + if (!stage1) + reg |= (TTBCR_SL0_LVL_1 TTBCR_SL0_SHIFT); + writel_relaxed(reg, cb_base + ARM_SMMU_CB_TTBCR); /* MAIR0 (stage-1 only) */ -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v2 2/2] iommu/arm-smmu: Do not access non-existing SMR registers
The SMR registers do not exist when stream matching is not
supported by the hardware. Avoid writing to this register if not needed.
Signed-off-by: Olav Haugan ohau...@codeaurora.org
---
drivers/iommu/arm-smmu.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index c16431f..1f3a5b3 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1731,7 +1731,10 @@ static void arm_smmu_device_reset(struct arm_smmu_device
*smmu)
/* Mark all SMRn as invalid and all S2CRn as bypass */
for (i = 0; i smmu-num_mapping_groups; ++i) {
- writel_relaxed(~SMR_VALID, gr0_base + ARM_SMMU_GR0_SMR(i));
+ if (smmu-features ARM_SMMU_FEAT_STREAM_MATCH) {
+ writel_relaxed(~SMR_VALID,
+ gr0_base + ARM_SMMU_GR0_SMR(i));
+ }
writel_relaxed(S2CR_TYPE_BYPASS,
gr0_base + ARM_SMMU_GR0_S2CR(i));
}
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[PATCH v2 0/2] arm-smmu fixes for CBn_TCR and S2CR/SMR programming
Here are a couple fixes for the arm smmu driver. The first one deals with ensuring that we program CBn_TCR correctly when we are programming a stage-1 context bank. The second patch ensures that SMR registers are not touched when stream matchign is not supported by the hardware. When stream id matching is not supported by the hardware the SMR registers does not exists. However, even if they are UNK/SBZP we prefer not to write to more registers than needed. v1 - v2: * Fixed so that SL0 is programed for SMMUv1 hardware also * Rebased onto Will's iommu/pci branch which only left one issue to fix for the second patch. Olav Haugan (2): iommu/arm-smmu: Fix programming of SMMU_CBn_TCR for stage 1 iommu/arm-smmu: Do not access non-existing SMR registers drivers/iommu/arm-smmu.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH v4 1/1] iommu-api: Add map_sg/unmap_sg functions
Any more comments on this from anyone before I submit v5?
On 8/1/2014 9:44 AM, Olav Haugan wrote:
Hi Will,
On 8/1/2014 1:22 AM, Will Deacon wrote:
Hi Olav,
On Fri, Aug 01, 2014 at 01:54:44AM +0100, Olav Haugan wrote:
Mapping and unmapping are more often than not in the critical path.
map_sg and unmap_sg allows IOMMU driver implementations to optimize
the process of mapping and unmapping buffers into the IOMMU page tables.
Instead of mapping a buffer one page at a time and requiring potentially
expensive TLB operations for each page, this function allows the driver
to map all pages in one go and defer TLB maintenance until after all
pages have been mapped.
Additionally, the mapping operation would be faster in general since
clients does not have to keep calling map API over and over again for
each physically contiguous chunk of memory that needs to be mapped to a
virtually contiguous region.
Just a couple of minor comments, but I think this is almost there now.
Signed-off-by: Olav Haugan ohau...@codeaurora.org
---
drivers/iommu/iommu.c | 44
include/linux/iommu.h | 28
2 files changed, 72 insertions(+)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 1698360..1d5dc2e 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -1088,6 +1088,50 @@ size_t iommu_unmap(struct iommu_domain *domain,
unsigned long iova, size_t size)
}
EXPORT_SYMBOL_GPL(iommu_unmap);
+int iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
+ struct scatterlist *sg, unsigned int nents,
+ int prot, unsigned long flags)
+{
What do you anticipate passing in the flags parameter? I assume it's
something specific to the scatterlist, since we can't provide this to
iommu_map as it stands?
Initially the flags argument is planned to be used by clients to
indicate to the driver that no TLB operation is necessary. This allows
clients to for example map/unmap multiple scatter-gather lists without
doing expensive TLB invalidate operations for each call but just do this
at the last mapping/unmapping call instead. I believe Rob Clark was
looking for this feature and I can see the benefit for our use cases also.
+ int ret = 0;
+ unsigned long offset = 0;
+
+ if (unlikely(domain-ops-map_sg == NULL)) {
+ unsigned int i;
+ struct scatterlist *s;
+
+ for_each_sg(sg, s, nents, i) {
+ phys_addr_t phys = page_to_phys(sg_page(s));
+ size_t page_len = s-offset + s-length;
+
+ ret = iommu_map(domain, iova + offset, phys, page_len,
+ prot);
+ if (ret)
+ goto fail;
+
+ offset += page_len;
+ }
+ } else {
+ ret = domain-ops-map_sg(domain, iova, sg, nents, prot, flags);
+ }
+ goto out;
+
+fail:
+ /* undo mappings already done in case of error */
+ iommu_unmap(domain, iova, offset);
I think this would be cleaner if you stuck it in the loop above and removed
all these labels:
if (ret) {
iommu_unmap(...);
break;
}
Sure, I can do that.
Thanks,
Olav
Olav
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