Add methods to map/unmap device resources addresses for dma_map_ops that
are IOMMU aware. This is needed to map a device MMIO register from a
physical address.
Signed-off-by: Niklas Söderlund
---
arch/arm/mm/dma-mapping.c | 63 +++
1 file changed, 63 i
Add methods to handle mapping of device resources from a physical
address. This is needed for example to map be able to map MMIO FIFO
registers to a IOMMU.
Signed-off-by: Niklas Söderlund
---
include/linux/dma-mapping.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/linux/dma-
Group slave address and transfer size in own structs for source and
destination. This is in preparation for hooking up the dma-mapping API
to the slave addresses.
Signed-off-by: Niklas Söderlund
---
drivers/dma/sh/rcar-dmac.c | 37 +
1 file changed, 21 inserti
Signed-off-by: Niklas Söderlund
---
arch/arm/boot/dts/r8a7790.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 7dfd393..048bbf8 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/
Enable slave transfers to devices behind IPMMU:s by mapping the slave
addresses using the dma-mapping API.
Signed-off-by: Niklas Söderlund
---
drivers/dma/sh/rcar-dmac.c | 57 ++
1 file changed, 52 insertions(+), 5 deletions(-)
diff --git a/drivers/dm
Hi,
This series add iommu support to rcar-dmac. It's tested on koelsch with
CONFIG_IPMMU_VMSA and by enabling the ipmmu_ds node in r8a7791.dtsi. I
verified operation by interacting with /dev/mmcblk1 which is a device
behind the iommu.
The series depends on out of tree patch '[PATCH] dmaengine: u
Map/Unmap a device resource from a physical address. If no dma_map_ops
method is available the operation is a no-op.
Signed-off-by: Niklas Söderlund
---
include/linux/dma-mapping.h | 27 +++
1 file changed, 27 insertions(+)
diff --git a/include/linux/dma-mapping.h b/incl
Signed-off-by: Niklas Söderlund
---
arch/arm/boot/dts/r8a7791.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 2a369dd..6dff061 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/
From: Robin Murphy
On some platforms, MMIO regions might need slightly different treatment
compared to mapping regular memory; add the notion of MMIO mappings to
the IOMMU API's memory type flags, so that callers can let the IOMMU
drivers know to do the right thing.
Signed-off-by: Robin Murphy
Since iommu_map() code added pgsize value to the paddr, trace_map()
used wrong paddr. So, this patch adds "orig_paddr" value in the
iommu_map() to use for the trace_map().
Signed-off-by: Yoshihiro Shimoda
---
drivers/iommu/iommu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --g
On Tue, Feb 09, 2016 at 04:53:50PM -0600, Suravee Suthikulpanit wrote:
> From: Suravee Suthikulpanit
>
> This patch series modifies the existing perf_event_amd_iommu driver
> to support systems with multiple IOMMUs. It introduces new AMD IOMMU APIs,
> which will are used by the AMD IOMMU Perf dri
Introduce a helper function to calculate bit-index for assigning
performance counter assignment.
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/kernel/cpu/perf_event_amd_iommu.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_
This patch introduces amd_iommu_get_num_iommus(). Initially, this is
intended to be used by Perf AMD IOMMU driver.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd_iommu_init.c| 7 ++-
include/linux/perf/perf_event_amd_iommu.h | 2 ++
2 files changed, 8 insertions(+), 1
From: Suravee Suthikulpanit
This patch series modifies the existing perf_event_amd_iommu driver
to support systems with multiple IOMMUs. It introduces new AMD IOMMU APIs,
which will are used by the AMD IOMMU Perf driver to access performance
counters in multiple IOMMUs.
In addition, this series
The current amd_iommu_pc_get_set_reg_val() does not support muli-IOMMU
system. This patch replace amd_iommu_pc_get_set_reg_val() with
amd_iommu_pc_set_reg_val() and amd_iommu_pc_[set|get]_cnt_vals().
Also, the current struct hw_perf_event.prev_count can only store the
previous counter value only f
This patch consolidates "arch/x86/kernel/cpu/perf_event_amd_iommu.h" and
"drivers/iommu/amd_iommu_proto.h", which contain duplicate function
declarations, into "include/linux/perf/perf_event_amd_iommu.h"
Reviewed-by: Joerg Roedel
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/kernel/cpu/perf
Currently, amd_iommu_pc_get_max_[banks|counters]() require devid,
which should not be the case. Also, these don't properly support
multi-IOMMU system.
Current and future AMD systems with IOMMU that support perf counter
would likely contain homogeneous IOMMUs where multiple IOMMUs are
availalbe. So
Hi Joerg,
On 01/07/2016 06:15 AM, Joerg Roedel wrote:
On Fri, Jan 01, 2016 at 12:13:37PM -0600, Suravee Suthikulpanit wrote:
+int amd_iommu_get_num_iommus(void)
+{
+ return amd_iommus_present;
+}
+EXPORT_SYMBOL(amd_iommu_get_num_iommus);
Is this export needed? The perf code can't be bui
Am seeing some DMAR error messages on reboot after a 'shutdown -r now'.
(Finally got annoyed enough to track it down while doing a git bisect)
Hardware: Dell Latitude E6530 laptop.
Working (booting from power-off state):
[0.027673] Freeing SMP alternatives memory: 28K (b5111000 -
ff
On 2/9/16, 3:52 AM, "Robin Murphy" wrote:
>On 05/02/16 18:47, tchalama...@caviumnetworks.com wrote:
>> From: Tirumalesh Chalamarla
>>
>> An issue exists whereby the Linux kernel requires that ASIDs are a
>> unique namespace per SMMU.
>
>I too tend to consider the SMMUv2 architecture an "iss
On Tue, Jan 26, 2016 at 06:06:33PM +, Robin Murphy wrote:
> Here's my current "miscellaneous SMMU enhancements" branch for your
> consideration. Patch #1 solves a subtle corner case that cropped up
> while exercising stage 1 context formats on the DMA330-MMU500 model;
> #3 will be wanted fairly
On Tue, Jan 26, 2016 at 06:06:37PM +, Robin Murphy wrote:
> TLB synchronisation is a mighty big hammmer to bring down on the
> transaction stream, typically stalling all in-flight transactions until
> the sync completes. Since in most cases (except at stage 2 on SMMUv1)
> a per-context sync ope
On Tue, Jan 26, 2016 at 06:06:34PM +, Robin Murphy wrote:
> The IOMMU API has no concept of privilege so assumes all devices and
> mappings are equal, and indeed most non-CPU master devices on an AMBA
> interconnect make little use of the attribute bits on the bus thus by
> default perform unpr
Hi Robin,
On Tue, Jan 26, 2016 at 06:06:35PM +, Robin Murphy wrote:
> Borrow the disable_bypass parameter from the SMMUv3 driver as a handy
> debugging/security feature so that unmatched stream IDs (i.e. devices
> not attached to an IOMMU domain) may be configured to fault.
>
> Signed-off-by:
On 05/02/16 18:47, tchalama...@caviumnetworks.com wrote:
From: Tirumalesh Chalamarla
An issue exists whereby the Linux kernel requires that ASIDs are a
unique namespace per SMMU.
I too tend to consider the SMMUv2 architecture an "issue", but we should
probably still call it by its name ;)
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