On Sun, 4 Mar 2018, Fredrik Noring wrote:
> Hi Alan Stern,
>
> > > Alan, can dma_free_coherent be delayed to a point when IRQs are enabled?
> >
> > Yes, subject to the usual concerns about not being delayed for too
> > long. Also, some HCDs are highly memory-constrained. I don't know if
> >
Ping..
Joerg, when you get a chance, would you please let me know if you have any
other concerns for this v4.
Thanks,
Suravee
On 2/21/18 2:19 PM, Suravee Suthikulpanit wrote:
Since AMD IOMMU driver currently flushes all TLB entries
when page size is more than one, use the same interface
for
Hi Alan Stern,
> > Alan, can dma_free_coherent be delayed to a point when IRQs are enabled?
>
> Yes, subject to the usual concerns about not being delayed for too
> long. Also, some HCDs are highly memory-constrained. I don't know if
> they use this API, but if they do then delaying a free
On Sat, 3 Mar 2018, Fredrik Noring wrote:
> Christoph, Alan,
>
> > If it is allocating / freeing this memory all the time in the hot path
> > it should really use a dma pool (see include/ilinux/dmapool.h).
> > The dma coherent APIs aren't really built for being called in the
> > hot path.
>
>
