RE: [PATCH 00/10] iommu/vt-d: Add scalable mode support

2018-07-16 Thread Liu, Yi L
Hi Jean, > From: Jean-Philippe Brucker > Sent: Monday, July 16, 2018 6:52 PM > On 16/07/18 07:49, Lu Baolu wrote: > > Intel vt-d rev3.0 [1] introduces a new translation mode called > > 'scalable mode', which enables PASID-granular translations for first > > level, second level, nested and

Re: [PATCH] x86/pci: Some buggy virtual functions incorrectly report 1 for intx.

2018-07-16 Thread Raj, Ashok
Hi Alex On Mon, Jul 16, 2018 at 03:17:57PM -0600, Alex Williamson wrote: > > static bool vfio_pci_nointx(struct pci_dev *pdev) > > { > > + /* > > +* Per PCI, no VF's should have INTx > > +* Simply disable it here > > +*/ > > + if (pdev->is_virtfn) > > + return true; >

Re: [PATCH] x86/pci: Some buggy virtual functions incorrectly report 1 for intx.

2018-07-16 Thread Alex Williamson
On Mon, 16 Jul 2018 13:42:25 -0700 Ashok Raj wrote: > PCI_INTERRUPT_PIN should always read 0 for SRIOV Virtual Functions. > > Some SRIOV devices have some bugs in RTL and VF's end up reading 1 > instead of 0 for the PIN. > > We could enforce it by default in vfio_pci_nointx. > > Reported-by:

[PATCH] x86/pci: Some buggy virtual functions incorrectly report 1 for intx.

2018-07-16 Thread Ashok Raj
PCI_INTERRUPT_PIN should always read 0 for SRIOV Virtual Functions. Some SRIOV devices have some bugs in RTL and VF's end up reading 1 instead of 0 for the PIN. We could enforce it by default in vfio_pci_nointx. Reported-by: Gage Eads Tested-by: Gage Eads Signed-off-by: Ashok Raj Cc:

Re: [PATCH 3/3] arm64: dts: stratix10: Add SMMU Node

2018-07-16 Thread Thor Thayer
Hi Robin, On 07/13/2018 01:09 PM, Robin Murphy wrote: On 13/07/18 17:27, thor.tha...@linux.intel.com wrote: From: Thor Thayer Add the SMMU node and IOMMU parameters to the Stratix10 Device Tree. Signed-off-by: Thor Thayer ---   arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 44

Re: [PATCH v4] dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI

2018-07-16 Thread Matthias Brugger
On 21/06/18 08:27, Yong Wu wrote: > Hi Matthias, > > A gentle ping on this. > > On Thu, 2018-05-24 at 20:35 +0800, Yong Wu wrote: >> This patch adds decriptions for mt2712 IOMMU and SMI. >> >> In order to balance the bandwidth, mt2712 has two M4Us, two >> smi-commons, 10 smi-larbs. and

Re: [PATCH v12 3/4] iommu/arm-smmu: Add the device_link between masters and smmu

2018-07-16 Thread Vivek Gautam
On 7/16/2018 2:25 PM, Rafael J. Wysocki wrote: On Thu, Jul 12, 2018 at 2:41 PM, Vivek Gautam wrote: Hi Rafael, On Wed, Jul 11, 2018 at 4:06 PM, Vivek Gautam wrote: Hi Rafael, On 7/11/2018 3:23 PM, Rafael J. Wysocki wrote: On Sunday, July 8, 2018 7:34:12 PM CEST Vivek Gautam wrote:

Re: [PATCH 00/10] iommu/vt-d: Add scalable mode support

2018-07-16 Thread Jean-Philippe Brucker
Hi, On 16/07/18 07:49, Lu Baolu wrote: > Intel vt-d rev3.0 [1] introduces a new translation mode called > 'scalable mode', which enables PASID-granular translations for > first level, second level, nested and pass-through modes. The > vt-d scalable mode is the key ingredient to enable Scalable

Re: [PATCH v12 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops

2018-07-16 Thread Rafael J. Wysocki
Hi, On Mon, Jul 16, 2018 at 12:11 PM, Vivek Gautam wrote: > HI Rafael, > > > > On 7/16/2018 2:21 PM, Rafael J. Wysocki wrote: >> >> On Thu, Jul 12, 2018 at 12:57 PM, Vivek Gautam >> wrote: [cut] Although, given the PM subsystem internals, the suspend function wouldn't be called on

Re: [PATCH v12 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops

2018-07-16 Thread Vivek Gautam
HI Rafael, On 7/16/2018 2:21 PM, Rafael J. Wysocki wrote: On Thu, Jul 12, 2018 at 12:57 PM, Vivek Gautam wrote: Hi, On Wed, Jul 11, 2018 at 6:21 PM, Tomasz Figa wrote: On Wed, Jul 11, 2018 at 8:11 PM Rafael J. Wysocki wrote: On Wed, Jul 11, 2018 at 12:55 PM, Vivek Gautam wrote: Hi

Re: [PATCH v12 3/4] iommu/arm-smmu: Add the device_link between masters and smmu

2018-07-16 Thread Rafael J. Wysocki
On Thu, Jul 12, 2018 at 2:41 PM, Vivek Gautam wrote: > Hi Rafael, > > > On Wed, Jul 11, 2018 at 4:06 PM, Vivek Gautam > wrote: >> Hi Rafael, >> >> >> >> On 7/11/2018 3:23 PM, Rafael J. Wysocki wrote: >>> >>> On Sunday, July 8, 2018 7:34:12 PM CEST Vivek Gautam wrote: From: Sricharan R

Re: [PATCH v12 1/4] iommu/arm-smmu: Add pm_runtime/sleep ops

2018-07-16 Thread Rafael J. Wysocki
On Thu, Jul 12, 2018 at 12:57 PM, Vivek Gautam wrote: > Hi, > > > On Wed, Jul 11, 2018 at 6:21 PM, Tomasz Figa wrote: >> On Wed, Jul 11, 2018 at 8:11 PM Rafael J. Wysocki wrote: >>> >>> On Wed, Jul 11, 2018 at 12:55 PM, Vivek Gautam >>> wrote: >>> > Hi Rafael, >>> > >>> > >>> > On Wed, Jul 11,

Re: [PATCH 1/1] Revert "iommu/vt-d: Clean up pasid quirk for pre-production devices"

2018-07-16 Thread Zhenyu Wang
On 2018.07.16 14:02:12 +0800, Lu Baolu wrote: > Hi Joerg, > > The graphic guys are looking forward to having this in 4.18. > Is it possible to take it in the following rcs? > This breakes intel gfx driver in 4.18 when gfx dmar is on. Please include this fix ASAP. Tested-by: Zhenyu Wang

Re: [PATCH 1/2] mm/cma: remove unsupported gfp_mask parameter from cma_alloc()

2018-07-16 Thread Vlastimil Babka
On 07/09/2018 02:19 PM, Marek Szyprowski wrote: > cma_alloc() function doesn't really support gfp flags other than > __GFP_NOWARN, so convert gfp_mask parameter to boolean no_warn parameter. > > This will help to avoid giving false feeling that this function supports > standard gfp flags and

Re: [PATCH 2/2] dma: remove unsupported gfp_mask parameter from dma_alloc_from_contiguous()

2018-07-16 Thread Vlastimil Babka
On 07/09/2018 02:19 PM, Marek Szyprowski wrote: > The CMA memory allocator doesn't support standard gfp flags for memory > allocation, so there is no point having it as a parameter for > dma_alloc_from_contiguous() function. Replace it by a boolean no_warn > argument, which covers all the

[PATCH 10/10] iommu/vt-d: Remove deferred invalidation

2018-07-16 Thread Lu Baolu
Deferred invalidation is an ECS specific feature. It will not be supported when IOMMU works in scalable mode. As we deprecated the ECS support, remove deferred invalidation and cleanup the code. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Signed-off-by: Lu Baolu Reviewed-by:

[PATCH 09/10] iommu/vt-d: Shared virtual address in scalable mode

2018-07-16 Thread Lu Baolu
This patch enables the current SVA (Shared Virtual Address) implementation to work in the scalable mode. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Signed-off-by: Sanjay Kumar Signed-off-by: Lu Baolu Reviewed-by: Ashok Raj --- drivers/iommu/intel-iommu.c | 38

[PATCH 08/10] iommu/vt-d: Add first level page table interface

2018-07-16 Thread Lu Baolu
This adds an interface to setup the structures for first level page table translation type. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Signed-off-by: Sanjay Kumar Signed-off-by: Lu Baolu Reviewed-by: Ashok Raj --- drivers/iommu/intel-pasid.c | 65

[PATCH 07/10] iommu/vt-d: Setup context and enable RID2PASID support

2018-07-16 Thread Lu Baolu
This patch enables the translation for requests without PASID in the scalable mode by setting up the root and context entries. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Signed-off-by: Sanjay Kumar Signed-off-by: Lu Baolu Reviewed-by: Ashok Raj --- drivers/iommu/intel-iommu.c

[PATCH 06/10] iommu/vt-d: Pass pasid table to context mapping

2018-07-16 Thread Lu Baolu
So that the pasid related info, such as the pasid table and the maximum of pasid could be used during setting up scalable mode context. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Signed-off-by: Lu Baolu Reviewed-by: Ashok Raj --- drivers/iommu/intel-iommu.c | 14 +++---

[PATCH 05/10] iommu/vt-d: Setup pasid entry for RID2PASID support

2018-07-16 Thread Lu Baolu
when the scalable mode is enabled, there is no second level page translation pointer in the context entry any more (for DMA request without PASID). Instead, a new RID2PASID field is introduced in the context entry. Software can choose any PASID value to set RID2PASID and then setup the translation

[PATCH 04/10] iommu/vt-d: Add second level page table interface

2018-07-16 Thread Lu Baolu
This adds an interface to setup the structures for second level page table translation type. This includes the types of second level translation only and pass through. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Signed-off-by: Sanjay Kumar Signed-off-by: Lu Baolu Reviewed-by:

[PATCH 03/10] iommu/vt-d: Move page table helpers into header

2018-07-16 Thread Lu Baolu
So that they could also be used in other source files. Cc: Ashok Raj Cc: Jacob Pan Cc: Kevin Tian Cc: Liu Yi L Signed-off-by: Lu Baolu Reviewed-by: Ashok Raj --- drivers/iommu/intel-iommu.c | 43 --- include/linux/intel-iommu.h | 43

[PATCH 02/10] iommu/vt-d: Manage scalalble mode PASID tables

2018-07-16 Thread Lu Baolu
In scalable mode, pasid structure is a two level table with a pasid directory table and a pasid table. Any pasid entry can be identified by a pasid value in below way. 1 9 6 5 0 .---.---. | PASID| |

[PATCH 01/10] iommu/vt-d: Enumerate the scalable mode capability

2018-07-16 Thread Lu Baolu
The Intel vt-d spec rev3.0 introduces a new translation mode called scalable mode, which enables PASID-granular translations for first level, second level, nested and pass-through modes. At the same time, the previous Extended Context (ECS) mode is deprecated (no production ever implements ECS).

[PATCH 00/10] iommu/vt-d: Add scalable mode support

2018-07-16 Thread Lu Baolu
Hi, Intel vt-d rev3.0 [1] introduces a new translation mode called 'scalable mode', which enables PASID-granular translations for first level, second level, nested and pass-through modes. The vt-d scalable mode is the key ingredient to enable Scalable I/O Virtualization (Scalable IOV) [2] [3],

Re: [PATCH 1/1] Revert "iommu/vt-d: Clean up pasid quirk for pre-production devices"

2018-07-16 Thread Lu Baolu
Hi Joerg, The graphic guys are looking forward to having this in 4.18. Is it possible to take it in the following rcs? Best regards, Lu Baolu On 07/08/2018 02:23 PM, Lu Baolu wrote: > This reverts commit ab96746aaa344fb720a198245a837e266fad3b62. > > The commit ab96746aaa34 ("iommu/vt-d: Clean