As we have abandoned the home-made lazy domain allocation
and delegated the DMA domain life cycle up to the default
domain mechanism defined in the generic iommu layer, we
needn't consider pci alias anymore when mapping/unmapping
the context entries. Without this fix, we see kernel NULL
pointer
On 7/8/19 12:57 PM, Christoph Hellwig wrote:
> Without the __always_inline at least i386 configs that have
> CONFIG_OPTIMIZE_INLINING set seem fail to inline
> dma_alloc_need_uncached, leading to a linker error because of
> undefined symbols.
>
> Reported-by: Randy Dunlap
> Signed-off-by:
Without the __always_inline at least i386 configs that have
CONFIG_OPTIMIZE_INLINING set seem fail to inline
dma_alloc_need_uncached, leading to a linker error because of
undefined symbols.
Reported-by: Randy Dunlap
Signed-off-by: Christoph Hellwig
---
include/linux/dma-noncoherent.h | 2 +-
1
Add a new sub-format ARM_64_LPAE_SPLIT_S1 to create and set up split
pagetables (TTBR0 and TTBR1). The initialization function sets up the
correct va_size and sign extension bits and programs the TCR registers.
Split pagetable formats use their own own map/unmap wrappers to ensure
that the correct
When DOMAIN_ATTR_SPLIT_TABLES is specified for pass ARM_64_LPAE_SPLIT_S1
to io_pgtable_ops to allocate and initialize TTBR0 and TTBR1 pagetables.
v3: Moved all the pagetable specific work into io-pgtable-arm
in a previous patch.
Signed-off-by: Jordan Crouse
---
drivers/iommu/arm-smmu.c | 16
Add a new domain attribute to enable split pagetable support for devices
devices that support it.
Signed-off-by: Jordan Crouse
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index fdc355c..b06db6c 100644
---
(RESEND because I fat fingered a email address and I didn't want everybody to
get a bunch of SMTP errors)
This series implements split pagetable support for arm-smmu-v2 devices. You have
seen this code before as part of [1] but I split it apart from the other
features to make it easier to review
On Tue, Jul 02, 2019 at 11:48:44AM +0200, Arend Van Spriel wrote:
> You made me look ;-) Actually not touching my drivers so I'm off the hook.
> However, I was wondering if drivers could know so I decided to look into
> the DMA-API.txt documentation which currently states:
>
> """
> The flag
Add a new domain attribute to enable split pagetable support for devices
devices that support it.
Signed-off-by: Jordan Crouse
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index fdc355c..b06db6c 100644
---
When DOMAIN_ATTR_SPLIT_TABLES is specified for pass ARM_64_LPAE_SPLIT_S1
to io_pgtable_ops to allocate and initialize TTBR0 and TTBR1 pagetables.
v3: Moved all the pagetable specific work into io-pgtable-arm in a previous
patch.
Signed-off-by: Jordan Crouse
---
drivers/iommu/arm-smmu.c | 16
This series implements split pagetable support for arm-smmu-v2 devices. You have
seen this code before as part of [1] but I split it from the other features
to make it easier to review / merge.
This series adds a new format type to io-pgtable-arm to enable TTBR0 and
TTBR1. Because of the way that
Add a new sub-format ARM_64_LPAE_SPLIT_S1 to create and set up split
pagetables (TTBR0 and TTBR1). The initialization function sets up the
correct va_size and sign extension bits and programs the TCR registers.
Split pagetable formats use their own own map/unmap wrappers to ensure
that the correct
On Mon, Jul 08, 2019 at 01:45:55PM +0200, Ulf Hansson wrote:
> On Mon, 1 Jul 2019 at 10:32, Christoph Hellwig wrote:
> >
> > Any comments from the block, iommu and mmc maintainers? I'd be happy
> > to queue this up in the dma-mapping tree, but I'll need some ACKs
> > for that fast.
Hi Linus,
The following changes since commit 6fbc7275c7a9ba97877050335f290341a1fd8dbf:
Linux 5.2-rc7 (2019-06-30 11:25:36 +0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-updates-v5.3
for you to fetch changes up to
Hi Jean,
On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> At the moment, the SMMUv3 driver implements only one stage-1 or stage-2
> page directory per device. However SMMUv3 allows more than one address
> space for some devices, by providing multiple stage-1 page directories. In
> addition to
Hi Jean,
On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> The SMMU can support up to 20 bits of SSID. Add a second level of page
> tables to accommodate this. Devices that support more than 1024 SSIDs now
> have a table of 1024 L1 entries (8kB), pointing to tables of 1024 context
> descriptors
On Tue, 25 Jun 2019 at 11:21, Christoph Hellwig wrote:
>
> These days the DMA mapping code must bounce buffer for any not supported
> address, and if they driver needs to optimize for natively supported
> ranged it should use dma_get_required_mask.
>
> Signed-off-by: Christoph Hellwig
Applied
On Tue, 25 Jun 2019 at 11:21, Christoph Hellwig wrote:
>
> Just like we do for all other block drivers. Especially as the limit
> imposed at the moment might be way to pessimistic for iommus.
>
> Signed-off-by: Christoph Hellwig
>From your earlier reply, I decided to fold in the following
On Mon, 1 Jul 2019 at 10:32, Christoph Hellwig wrote:
>
> Any comments from the block, iommu and mmc maintainers? I'd be happy
> to queue this up in the dma-mapping tree, but I'll need some ACKs
> for that fast. Alternatively I can just queue up the DMA API bits,
> leaving the rest for the next
On Mon, 24 Jun 2019 at 08:24, Christoph Hellwig wrote:
>
> On Thu, Jun 20, 2019 at 05:50:10PM +0900, Yoshihiro Shimoda wrote:
> > When the max_segs of a mmc host is smaller than 512, the mmc
> > subsystem tries to use 512 segments if DMA MAP layer can merge
> > the segments, and then the mmc
Hi Jean,
On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> Let add_device() clean up behind itself. The iommu_bus_init() function
> does call remove_device() on error, but other sites (e.g. of_iommu) do
> not.
>
> Don't free level-2 stream tables because we'd have to track if we
> allocated
Hi Jean,
On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> For platform devices that support SubstreamID (SSID), firmware provides
> the number of supported SSID bits. Restrict it to what the SMMU supports
> and cache it into master->ssid_bits.
The commit message may give the impression the
Hi Jean,
On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> Enable PASID for PCI devices that support it. Since the SSID tables are
> allocated by arm_smmu_attach_dev(), PASID has to be enabled early enough.
> arm_smmu_dev_feature_enable() would be too late, since by that time the
> main DMA
Hi Jean,
On 6/10/19 8:47 PM, Jean-Philippe Brucker wrote:
> On Arm systems, some platform devices behind an SMMU may support the PASID
> feature, which offers multiple address space. Let the firmware tell us
> when a device supports PASID.
>
> Reviewed-by: Rob Herring
> Signed-off-by:
Hi Christoph,
On Tue, Jun 25, 2019 at 11:01 AM Christoph Hellwig wrote:
> can you take a look at the (untested) patches below? They convert m68k
> to use the generic remapping DMA allocator, which is also used by
> arm64 and csky.
>
> Changes since v2:
> - fix kconfig dependencies to properly
Hi Eric,
> -Original Message-
> From: Auger Eric [mailto:eric.au...@redhat.com]
> Sent: 07 July 2019 16:03
> To: Shameerali Kolothum Thodi ;
> alex.william...@redhat.com; pmo...@linux.vnet.ibm.com
> Cc: k...@vger.kernel.org; linux-ker...@vger.kernel.org;
>
Hi Eric,
> -Original Message-
> From: Auger Eric [mailto:eric.au...@redhat.com]
> Sent: 07 July 2019 16:03
> To: Shameerali Kolothum Thodi ;
> alex.william...@redhat.com; pmo...@linux.vnet.ibm.com
> Cc: k...@vger.kernel.org; linux-ker...@vger.kernel.org;
>
Hi Eric
> -Original Message-
> From: Auger Eric [mailto:eric.au...@redhat.com]
> Sent: 05 July 2019 13:10
> To: Shameerali Kolothum Thodi ;
> Alex Williamson
> Cc: k...@vger.kernel.org; linux-ker...@vger.kernel.org;
> iommu@lists.linux-foundation.org; Linuxarm ; John
> Garry ; xuwei (O)
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