From: Liu Xiang
[ Upstream commit 6db7bfb431220d78e34d2d0afdb7c12683323588 ]
When alloc_io_pgtable_ops is failed, context bitmap which is just allocated
by __arm_smmu_alloc_bitmap should be freed to release the resource.
Signed-off-by: Liu Xiang
Signed-off-by: Will Deacon
Signed-off-by: Sasha
From: Liu Xiang
[ Upstream commit 6db7bfb431220d78e34d2d0afdb7c12683323588 ]
When alloc_io_pgtable_ops is failed, context bitmap which is just allocated
by __arm_smmu_alloc_bitmap should be freed to release the resource.
Signed-off-by: Liu Xiang
Signed-off-by: Will Deacon
Signed-off-by: Sasha
From: Liu Xiang
[ Upstream commit 6db7bfb431220d78e34d2d0afdb7c12683323588 ]
When alloc_io_pgtable_ops is failed, context bitmap which is just allocated
by __arm_smmu_alloc_bitmap should be freed to release the resource.
Signed-off-by: Liu Xiang
Signed-off-by: Will Deacon
Signed-off-by: Sasha
From: Liu Xiang
[ Upstream commit 6db7bfb431220d78e34d2d0afdb7c12683323588 ]
When alloc_io_pgtable_ops is failed, context bitmap which is just allocated
by __arm_smmu_alloc_bitmap should be freed to release the resource.
Signed-off-by: Liu Xiang
Signed-off-by: Will Deacon
Signed-off-by: Sasha
From: "Suthikulpanit, Suravee"
[ Upstream commit ec21f17a9437e11bb29e5fa375aa31b472793c15 ]
IOMMU Event Log encodes 20-bit PASID for events:
ILLEGAL_DEV_TABLE_ENTRY
IO_PAGE_FAULT
PAGE_TAB_HARDWARE_ERROR
INVALID_DEVICE_REQUEST
as:
PASID[15:0] = bit 47:32
PASID[19:16] = bi
From: Liu Xiang
[ Upstream commit 6db7bfb431220d78e34d2d0afdb7c12683323588 ]
When alloc_io_pgtable_ops is failed, context bitmap which is just allocated
by __arm_smmu_alloc_bitmap should be freed to release the resource.
Signed-off-by: Liu Xiang
Signed-off-by: Will Deacon
Signed-off-by: Sasha
From: Robin Murphy
[ Upstream commit 52f325f4eb321ea2e8a0779f49a3866be58bc694 ]
Whilst Midgard's MEMATTR follows a similar principle to the VMSA MAIR,
the actual attribute values differ, so although it currently appears to
work to some degree, we probably shouldn't be using our standard stage 1
From: Robin Murphy
[ Upstream commit 1be08f458d1602275b02f5357ef069957058f3fd ]
In principle, Midgard GPUs supporting smaller VA sizes should only
require 3-level pagetables, since level 0 only resolves bits 48:40 of
the address. However, the kbase driver does not appear to have any
notion of a
The pull request you sent on Sat, 26 Oct 2019 07:45:51 +0200:
> git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.4-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/964f9cfaaee31588b1f1a23edee8bed94136452a
Thank you!
--
Deet-doot-dot, I am a bot.
On 2019-10-25 22:30, Christoph Hellwig wrote:
The definition makes very little sense.
Can you please clarify what part doesn’t make sense, and why? This is
really just an extension of this patch that got mainlined, so that
clients that use the DMA API can use IOMMU_QCOM_SYS_CACHE as well:
http
Hi again,
On 10/26/19 10:40 AM, Lu Baolu wrote:
Hi,
On 10/25/19 3:27 PM, Tian, Kevin wrote:
From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
Sent: Friday, October 25, 2019 3:55 AM
When Shared Virtual Address (SVA) is enabled for a guest OS via
vIOMMU, we need to provide invalidation sup
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