Hi Kevin,
On 2020/4/22 16:06, Lu Baolu wrote:
When a PASID is stopped or terminated, there can be pending PRQs
(requests that haven't received responses) in the software and
remapping hardware. The pending page requests must be drained
so that the pasid could be reused. The chapter 7.10 in the V
Hi Thomas,
On Tue, Apr 28, 2020 at 02:54:59AM +0200, Thomas Gleixner wrote:
> Ashok,
>
> "Raj, Ashok" writes:
> > On Sun, Apr 26, 2020 at 05:25:06PM +0200, Thomas Gleixner wrote:
> >> Just for the record I also suggested to have a proper errorcode in the
> >> #GP for ENQCMD and I surely did not
Ashok,
"Raj, Ashok" writes:
> On Sun, Apr 26, 2020 at 05:25:06PM +0200, Thomas Gleixner wrote:
>> Just for the record I also suggested to have a proper errorcode in the
>> #GP for ENQCMD and I surely did not suggest to avoid decoding the user
>> instructions.
>
> We certainly discussed the possib
"Luck, Tony" writes:
>> Just for the record I also suggested to have a proper errorcode in the
>> #GP for ENQCMD and I surely did not suggest to avoid decoding the user
>> instructions.
>
> Is the heuristic to avoid decoding the user instructions OK (you are just
> pointing
> out that you should
Fenghua Yu writes:
> On Sun, Apr 26, 2020 at 05:25:06PM +0200, Thomas Gleixner wrote:
>> > @@ -499,6 +510,12 @@ dotraplinkage void do_general_protection(struct
>> > pt_regs *regs, long error_code)
>> >int ret;
>> >
>> >RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
Fenghua Yu writes:
> On Sun, Apr 26, 2020 at 04:55:25PM +0200, Thomas Gleixner wrote:
>> Fenghua Yu writes:
>> > + +#ifdef CONFIG_INTEL_IOMMU_SVM + int pasid;
>>
>> int? It's a value which gets programmed into the MSR along with the valid
>> bit (bit 31) set.
>
> The pasid is defined as "int" i
> Just for the record I also suggested to have a proper errorcode in the
> #GP for ENQCMD and I surely did not suggest to avoid decoding the user
> instructions.
Thomas,
Is the heuristic to avoid decoding the user instructions OK (you are just
pointing
out that you should not be given credit for
Hi Thomas
On Sun, Apr 26, 2020 at 05:25:06PM +0200, Thomas Gleixner wrote:
> Fenghua Yu writes:
> > A #GP fault is generated when ENQCMD instruction is executed without
> > a valid PASID value programmed in.
>
> Programmed in what?
>
> > The #GP fault handler will initialize the current thread'
On Sun, Apr 26, 2020 at 04:55:25PM +0200, Thomas Gleixner wrote:
> Fenghua Yu writes:
> > +++ b/arch/x86/include/asm/mmu.h @@ -50,6 +50,10 @@ typedef struct {
> > u16 pkey_allocation_map; s16 execute_only_pkey;
> > #endif
> > + +#ifdef CONFIG_INTEL_IOMMU_SVM + int pasid;
>
> int? It's a val
On Sun, Apr 26, 2020 at 01:22:00PM +0200, Thomas Gleixner wrote:
> Fenghua Yu writes:
>
> > The IA32_PASID MSR (0xd93) contains the Process Address Space Identifier
> > (PASID), a 20-bit value. Bit 31 must be set to indicate the value
> > programmed in the MSR is valid. Hardware uses PASID to ide
On Sun, Apr 26, 2020 at 01:17:11PM +0200, Thomas Gleixner wrote:
> Fenghua Yu writes:
> > From: Yu-cheng Yu
> >
> > The IA32_PASID MSR is used when a task submits work via the ENQCMD
> > instruction.
>
> Is used?
>
> > The per task MSR is stored in the task's supervisor FPU
>
> per task MSR? L
On Fri, 24 Apr 2020 10:47:45 +
"Tian, Kevin" wrote:
> > From: Jacob Pan
> > Sent: Wednesday, April 22, 2020 2:53 AM
> >
> > When supporting guest SVA with emulated IOMMU, the guest PASID
> > table is shadowed in VMM. Updates to guest vIOMMU PASID table
> > will result in PASID cache flush w
On Sun, Apr 26, 2020 at 01:06:33PM +0200, Thomas Gleixner wrote:
> Fenghua Yu writes:
> > A user space application can execute ENQCMD instruction to submit work
> > to device. The kernel executes ENQCMDS instruction to submit work to
> > device.
>
> So a user space application _can_ execute ENQCM
On Sun, Apr 26, 2020 at 01:02:12PM +0200, Thomas Gleixner wrote:
> Fenghua Yu writes:
>
> s/Add a documentation/Add documentation/
>
> > From: Ashok Raj
> >
> > ENQCMD and Data Streaming Accelerator (DSA) and all of their associated
> > features are a complicated stack with lots of interconnect
On Sun, Apr 26, 2020 at 05:25:06PM +0200, Thomas Gleixner wrote:
> Fenghua Yu writes:
> > A #GP fault is generated when ENQCMD instruction is executed without
> > a valid PASID value programmed in.
>
> Programmed in what?
Will change to "...programmed in the PASID MSR".
>
> > The #GP fault han
Hello Konrad,
On Mon, Mar 30, 2020 at 10:25:51PM +, Ashish Kalra wrote:
> Hello Konrad,
>
> On Tue, Mar 03, 2020 at 12:03:53PM -0500, Konrad Rzeszutek Wilk wrote:
> > On Tue, Feb 04, 2020 at 07:35:00PM +, Ashish Kalra wrote:
> > > Hello Konrad,
> > >
> > > Looking fwd. to your feedback r
On Fri, 17 Apr 2020 23:46:13 +
"Tian, Kevin" wrote:
> > From: Jacob Pan
> > Sent: Friday, April 17, 2020 11:29 PM
> >
> > On Fri, 17 Apr 2020 09:46:55 +0200
> > Auger Eric wrote:
> >
> > > Hi Kevin,
> > > On 4/17/20 4:45 AM, Tian, Kevin wrote:
> > > >> From: Auger Eric
> > > >> Sent:
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