> From: Lu Baolu
> Sent: Friday, July 10, 2020 1:37 PM
>
> Hi Kevin,
>
> On 2020/7/10 10:42, Tian, Kevin wrote:
> >> From: Lu Baolu
> >> Sent: Thursday, July 9, 2020 3:06 PM
> >>
> >> After page requests are handled, software must respond to the device
> >> which raised the page request with
Hi Alex,
> From: Alex Williamson
> Sent: Thursday, July 9, 2020 10:28 PM
>
> On Thu, 9 Jul 2020 07:16:31 +
> "Liu, Yi L" wrote:
>
> > Hi Alex,
> >
> > After more thinking, looks like adding a r-b tree is still not enough to
> > solve the potential problem for free a range of PASID in one
Hi Kevin,
On 2020/7/10 10:42, Tian, Kevin wrote:
From: Lu Baolu
Sent: Thursday, July 9, 2020 3:06 PM
After page requests are handled, software must respond to the device
which raised the page request with the result. This is done through
the iommu ops.page_response if the request was reported
On Wed, Jul 8, 2020 at 10:02 PM Bjorn Andersson
wrote:
>
> Based on previous attempts and discussions this is the latest attempt at
> inheriting stream mappings set up by the bootloader, for e.g. boot splash or
> efifb.
>
> The first patch is an implementation of Robin's suggestion that we should
Hi Kevin,
On 2020/7/10 10:24, Tian, Kevin wrote:
From: Lu Baolu
Sent: Thursday, July 9, 2020 3:06 PM
A pasid might be bound to a page table from a VM guest via the iommu
ops.sva_bind_gpasid. In this case, when a DMA page fault is detected
on the physical IOMMU, we need to inject the page
On Thu, Jul 2, 2020 at 7:18 AM Will Deacon wrote:
> On Thu, Jun 25, 2020 at 12:10:39AM +, John Stultz wrote:
> > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
> > index b510f67dfa49..714893535dd2 100644
> > --- a/drivers/iommu/Kconfig
> > +++ b/drivers/iommu/Kconfig
> > @@ -381,6
> From: Lu Baolu
> Sent: Thursday, July 9, 2020 3:06 PM
>
> After page requests are handled, software must respond to the device
> which raised the page request with the result. This is done through
> the iommu ops.page_response if the request was reported to outside of
> vendor iommu driver
> From: Lu Baolu
> Sent: Thursday, July 9, 2020 3:06 PM
>
> A pasid might be bound to a page table from a VM guest via the iommu
> ops.sva_bind_gpasid. In this case, when a DMA page fault is detected
> on the physical IOMMU, we need to inject the page fault request into
> the guest. After the
Hi Mario
On Fri, Jul 10, 2020 at 4:58 AM Limonciello, Mario
wrote:
>
> > -Original Message-
> > From: iommu On Behalf Of Koba Ko
> > Sent: Sunday, June 14, 2020 10:47 PM
> > To: David Woodhouse; Lu Baolu; Joerg Roedel
> > Cc: iommu@lists.linux-foundation.org; Kai Heng Feng; Linux Kernel
> -Original Message-
> From: iommu On Behalf Of Koba Ko
> Sent: Sunday, June 14, 2020 10:47 PM
> To: David Woodhouse; Lu Baolu; Joerg Roedel
> Cc: iommu@lists.linux-foundation.org; Kai Heng Feng; Linux Kernel Mailing
> List
> Subject: [Issue]platform/x86: iommu: System can't shutdown
On Thu, 9 Jul 2020, Nicolas Saenz Julienne wrote:
> The function is only used once and can be simplified to a one-liner.
>
> Signed-off-by: Nicolas Saenz Julienne
I'll leave this one to Christoph to decide on. One thing I really liked
about hacking around in kernel/dma is the coding style,
On Wed, 8 Jul 2020, Christoph Hellwig wrote:
> On Wed, Jul 08, 2020 at 06:00:35PM +0200, Nicolas Saenz Julienne wrote:
> > On Wed, 2020-07-08 at 17:35 +0200, Christoph Hellwig wrote:
> > > On Tue, Jul 07, 2020 at 02:28:04PM +0200, Nicolas Saenz Julienne wrote:
> > > > When allocating atomic DMA
On Wed, 8 Jul 2020, Nicolas Saenz Julienne wrote:
> There is no guarantee to CMA's placement, so allocating a zone specific
> atomic pool from CMA might return memory from a completely different
> memory zone. So stop using it.
>
> Fixes: c84dc6e68a1d ("dma-pool: add additional coherent pools to
On Tue, Jul 07, 2020 at 10:00:16PM -0700, Krishna Reddy wrote:
> Add binding for NVIDIA's Tegra194 SoC SMMU.
>
> Signed-off-by: Krishna Reddy
> ---
> .../devicetree/bindings/iommu/arm,smmu.yaml| 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git
On Thu 09 Jul 08:50 PDT 2020, Laurentiu Tudor wrote:
>
>
> On 7/9/2020 8:01 AM, Bjorn Andersson wrote:
> > With many Qualcomm platforms not having functional S2CR BYPASS a
> > temporary IOMMU domain, without translation, needs to be allocated in
> > order to allow these memory transactions.
> >
On Thu 09 Jul 11:55 PDT 2020, Rob Clark wrote:
> On Thu, Jul 9, 2020 at 9:56 AM Rob Clark wrote:
> >
> > On Thu, Jul 9, 2020 at 9:48 AM Bjorn Andersson
> > wrote:
> > >
> > > On Thu 09 Jul 09:17 PDT 2020, Rob Clark wrote:
> > >
> > > > On Wed, Jul 8, 2020 at 10:01 PM Bjorn Andersson
> > > >
On Thu, Jul 9, 2020 at 9:56 AM Rob Clark wrote:
>
> On Thu, Jul 9, 2020 at 9:48 AM Bjorn Andersson
> wrote:
> >
> > On Thu 09 Jul 09:17 PDT 2020, Rob Clark wrote:
> >
> > > On Wed, Jul 8, 2020 at 10:01 PM Bjorn Andersson
> > > wrote:
> > [..]
> > > > @@ -678,7 +680,11 @@ static int
On Thu, 9 Jul 2020 08:27:51 -0600
Alex Williamson wrote:
> > So I'm wondering can we fall back to prior proposal which only free
> > one PASID for a free request. how about your opinion?
>
> Doesn't it still seem like it would be a useful user interface to have
> a mechanism to free all
On Thu, Jul 9, 2020 at 9:48 AM Bjorn Andersson
wrote:
>
> On Thu 09 Jul 09:17 PDT 2020, Rob Clark wrote:
>
> > On Wed, Jul 8, 2020 at 10:01 PM Bjorn Andersson
> > wrote:
> [..]
> > > @@ -678,7 +680,11 @@ static int arm_smmu_init_domain_context(struct
> > > iommu_domain *domain,
> > > if
On Thu 09 Jul 09:17 PDT 2020, Rob Clark wrote:
> On Wed, Jul 8, 2020 at 10:01 PM Bjorn Andersson
> wrote:
[..]
> > @@ -678,7 +680,11 @@ static int arm_smmu_init_domain_context(struct
> > iommu_domain *domain,
> > if (smmu_domain->smmu)
> > goto out_unlock;
> >
> > -
The function is only used once and can be simplified to a one-liner.
Signed-off-by: Nicolas Saenz Julienne
---
kernel/dma/pool.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/kernel/dma/pool.c b/kernel/dma/pool.c
index 8cfa01243ed2..7363640fc91c 100644
---
When allocating DMA memory from a pool, the core can only guess which
atomic pool will fit a device's constraints. If it doesn't, get a safer
atomic pool and try again.
Fixes: c84dc6e68a1d ("dma-pool: add additional coherent pools to map to gfp
mask")
Reported-by: Jeremy Linton
Suggested-by:
dma_coherent_ok() checks if a physical memory area fits a device's DMA
constraints.
Signed-off-by: Nicolas Saenz Julienne
---
include/linux/dma-direct.h | 1 +
kernel/dma/direct.c| 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/linux/dma-direct.h
dma-pool's dev_to_pool() creates the false impression that there is a
way to grantee a mapping between a device's DMA constraints and an
atomic pool. It tuns out it's just a guess, and the device might need to
use an atomic pool containing memory from a 'safer' (or lower) memory
zone.
To help
This is my attempt at fixing one of the regressions we've seen[1] after
the introduction of per-zone atomic pools.
This combined with "dma-pool: Do not allocate pool memory from CMA"[2]
should fix the boot issues on Jeremy's RPi4 setup.
[1] https://lkml.org/lkml/2020/7/2/974
[2]
On Wed, Jul 8, 2020 at 10:01 PM Bjorn Andersson
wrote:
>
> Some firmware found on various Qualcomm platforms traps writes to S2CR
> of type BYPASS and writes FAULT into the register. This prevents us from
> marking the streams for the display controller as BYPASS to allow
> continued scanout of
On Fri, Jul 03, 2020 at 09:04:49AM -0700, Rob Clark wrote:
> On Fri, Jul 3, 2020 at 7:53 AM Sai Prakash Ranjan
> wrote:
> >
> > Hi Will,
> >
> > On 2020-07-03 19:07, Will Deacon wrote:
> > > On Mon, Jun 29, 2020 at 09:22:50PM +0530, Sai Prakash Ranjan wrote:
> > >> diff --git
On 7/9/2020 8:01 AM, Bjorn Andersson wrote:
> With many Qualcomm platforms not having functional S2CR BYPASS a
> temporary IOMMU domain, without translation, needs to be allocated in
> order to allow these memory transactions.
>
> Unfortunately the boot loader uses the first few context banks,
On Fri, Jul 03, 2020 at 08:17:09PM -0400, Qian Cai wrote:
> FYI, I have just sent a patch to fix this,
>
> https://lore.kernel.org/linux-iommu/20200704001003.2303-1-...@lca.pw/
Just queued that fix, thanks. Please don't send patches to my suse
email address, use only the 8bytes.org one.
Thanks,
On Sat, Jul 04, 2020 at 05:09:57PM +0800, Hillf Danton wrote:
> > + group = iommu_group_get_for_dev(dev);
> > + if (!IS_ERR(group)) {
>
> Typo?
Yes, fortunatly it gets fixed again in patch 11 of this series.
Regards,
Joerg
___
iommu
On Thu, 9 Jul 2020 07:16:31 +
"Liu, Yi L" wrote:
> Hi Alex,
>
> After more thinking, looks like adding a r-b tree is still not enough to
> solve the potential problem for free a range of PASID in one ioctl. If
> caller gives [0, MAX_UNIT] in the free request, kernel anyhow should
> loop all
On Thu, Jul 09, 2020 at 09:27:06AM -0400, Jim Quinlan wrote:
> Hi Christoph,
>
> I'm sending all commits to since most of
> them are PCI related. I don't send all patches to
> linux-ker...@vger.kernel.org since I've read it is overused. The --cc
> list is generated by get_maintainer.pl.
>
>
Hi Christoph,
I'm sending all commits to since most of
them are PCI related. I don't send all patches to
linux-ker...@vger.kernel.org since I've read it is overused. The --cc
list is generated by get_maintainer.pl.
IIRC, in a previous discussion you said you preferred NOT to get the
entire
On 2020/7/9 17:21, Lorenzo Pieralisi wrote:
On Thu, Jul 02, 2020 at 04:22:00PM +0800, Hanjun Guo wrote:
Hi Robin,
On 2020/7/2 0:12, Robin Murphy wrote:
On 2020-06-30 14:04, Hanjun Guo wrote:
On 2020/6/30 18:24, Lorenzo Pieralisi wrote:
On Tue, Jun 30, 2020 at 11:06:41AM +0800, Hanjun Guo
> -Original Message-
> From: Diana Madalina Craciun (OSS)
> Sent: Thursday, July 9, 2020 4:17 PM
> To: Makarand Pawagi ; Laurentiu Tudor
> ; Lorenzo Pieralisi
> Cc: linux-arm-ker...@lists.infradead.org; iommu@lists.linux-foundation.org;
> linux-a...@vger.kernel.org;
> -Original Message-
> From: Laurentiu Tudor
> Sent: Thursday, July 9, 2020 3:45 PM
> To: Makarand Pawagi ; Lorenzo Pieralisi
>
> Cc: linux-arm-ker...@lists.infradead.org; Diana Madalina Craciun (OSS)
> ; iommu@lists.linux-foundation.org; linux-
> a...@vger.kernel.org;
On 7/9/2020 12:26 PM, Makarand Pawagi wrote:
>
>
>> -Original Message-
>> From: Lorenzo Pieralisi
>> Sent: Thursday, July 9, 2020 2:50 PM
>> To: Laurentiu Tudor
>> Cc: linux-arm-ker...@lists.infradead.org; Makarand Pawagi
>> ; Diana Madalina Craciun (OSS)
>> ;
On 7/9/2020 1:37 PM, Makarand Pawagi wrote:
-Original Message-
From: Laurentiu Tudor
Sent: Thursday, July 9, 2020 3:45 PM
To: Makarand Pawagi ; Lorenzo Pieralisi
Cc: linux-arm-ker...@lists.infradead.org; Diana Madalina Craciun (OSS)
; iommu@lists.linux-foundation.org; linux-
On 7/9/2020 1:37 PM, Makarand Pawagi wrote:
>
>
>> -Original Message-
>> From: Laurentiu Tudor
>> Sent: Thursday, July 9, 2020 3:45 PM
>> To: Makarand Pawagi ; Lorenzo Pieralisi
>>
>> Cc: linux-arm-ker...@lists.infradead.org; Diana Madalina Craciun (OSS)
>> ;
I someone seem to get just this patch instead of the full series for
review again..
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
On Tue, 9 Jun 2020 15:40:18 -0400, Jonathan Marek wrote:
> Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
>
> Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
> few changes. Notably, the HDK865 dts has regulator config changed a bit based
> on downstream
Hi Will,
On Thu, Jun 18, 2020 at 05:51:13PM +0200, Jean-Philippe Brucker wrote:
> Since v7 [1], I split the series into three parts to ease review. This
> first one adds page table sharing to the SMMUv3 driver. The second one
> adds support for I/O page faults through PRI and Stall, and the last
On Fri, Jun 19, 2020 at 09:20:06AM +0100, Lorenzo Pieralisi wrote:
> Some HW devices are created as child devices of proprietary busses,
> that have a bus specific policy defining how the child devices
> wires representing the devices ID are translated into IOMMU and
> IRQ controllers device IDs.
> -Original Message-
> From: Lorenzo Pieralisi
> Sent: Thursday, July 9, 2020 2:50 PM
> To: Laurentiu Tudor
> Cc: linux-arm-ker...@lists.infradead.org; Makarand Pawagi
> ; Diana Madalina Craciun (OSS)
> ; iommu@lists.linux-foundation.org; linux-
> a...@vger.kernel.org;
On Thu, Jul 02, 2020 at 04:22:00PM +0800, Hanjun Guo wrote:
> Hi Robin,
>
> On 2020/7/2 0:12, Robin Murphy wrote:
> > On 2020-06-30 14:04, Hanjun Guo wrote:
> > > On 2020/6/30 18:24, Lorenzo Pieralisi wrote:
> > > > On Tue, Jun 30, 2020 at 11:06:41AM +0800, Hanjun Guo wrote:
> > > >
> > > >
On Wed, Jul 01, 2020 at 07:55:28PM +0300, Laurentiu Tudor wrote:
>
>
> On 6/19/2020 11:20 AM, Lorenzo Pieralisi wrote:
> > From: Makarand Pawagi
> >
> > Add ACPI support in the fsl-mc driver. Driver parses MC DSDT table to
> > extract memory and other resources.
> >
> > Interrupt (GIC ITS)
On 08-07-20, 22:01, Bjorn Andersson wrote:
> Firmware that traps writes to S2CR to translate BYPASS into FAULT also
> ignores writes of type FAULT. As such booting with "disable_bypass" set
> will result in all S2CR registers left as configured by the bootloader.
>
> This has been seen to result
On 08-07-20, 22:01, Bjorn Andersson wrote:
> Based on previous attempts and discussions this is the latest attempt at
> inheriting stream mappings set up by the bootloader, for e.g. boot splash or
> efifb.
>
> The first patch is an implementation of Robin's suggestion that we should just
> mark
Hi Alex,
After more thinking, looks like adding a r-b tree is still not enough to
solve the potential problem for free a range of PASID in one ioctl. If
caller gives [0, MAX_UNIT] in the free request, kernel anyhow should
loop all the PASIDs and search in the r-b tree. Even VFIO can track the
Hi,
This series adds page request event reporting and response support to
the Intel IOMMU driver. This is necessary when the page requests must
be processed by any component other than the vendor IOMMU driver. For
example, when a guest page table was bound to a PASID through the
A pasid might be bound to a page table from a VM guest via the iommu
ops.sva_bind_gpasid. In this case, when a DMA page fault is detected
on the physical IOMMU, we need to inject the page fault request into
the guest. After the guest completes handling the page fault, a page
response need to be
There are several places in the code that need to get the pointers of
svm and sdev according to a pasid and device. Add a helper to achieve
this for code consolidation and readability.
Signed-off-by: Lu Baolu
Reviewed-by: Kevin Tian
---
drivers/iommu/intel/svm.c | 121
After page requests are handled, software must respond to the device
which raised the page request with the result. This is done through
the iommu ops.page_response if the request was reported to outside of
vendor iommu driver through iommu_report_device_fault(). This adds the
VT-d implementation
It is refactored in two ways:
- Make it global so that it could be used in other files.
- Make bus/devfn optional so that callers could ignore these two returned
values when they only want to get the coresponding iommu pointer.
Signed-off-by: Lu Baolu
Reviewed-by: Kevin Tian
---
On 2020/7/7 9:39, Lu Baolu wrote:
The hardware assistant vfio mediated device is a use case of iommu
aux-domain. The interactions between vfio/mdev and iommu during mdev
creation and passthr are:
- Create a group for mdev with iommu_group_alloc();
- Add the device to the group with
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