On 2/16/22 11:48 AM, Robin Murphy wrote:
> On 2022-02-16 17:37, Florian Fainelli wrote:
>> On 2/16/22 3:13 AM, Robin Murphy wrote:
>>> On 2022-02-15 22:43, Florian Fainelli wrote:
Some platforms might define the same memory region to be suitable for
used by a kernel supporting CONFIG_DMA_
On 2022-02-16 17:37, Florian Fainelli wrote:
On 2/16/22 3:13 AM, Robin Murphy wrote:
On 2022-02-15 22:43, Florian Fainelli wrote:
Some platforms might define the same memory region to be suitable for
used by a kernel supporting CONFIG_DMA_RESTRICTED_POOL while maintaining
compatibility with old
Starting from Intel VT-d v3.2, Intel platform BIOS can provide
additional SATC table structure. SATC table includes a list of
SoC integrated devices that support ATC (Address translation
cache).
Enabling ATC (via ATS capability) can be a functional requirement
for SATC device operation or an optio
On 2/16/22 3:13 AM, Robin Murphy wrote:
> On 2022-02-15 22:43, Florian Fainelli wrote:
>> Some platforms might define the same memory region to be suitable for
>> used by a kernel supporting CONFIG_DMA_RESTRICTED_POOL while maintaining
>> compatibility with older kernels that do not support that. T
From: Minghao Chi (CGEL ZTE)
Replace zero-length array with flexible-array member and make use
of the struct_size() helper in kzalloc(). For example:
struct viommu_request {
...
unsigned intlen;
charbuf[];
};
Make use of th
On Wed, Feb 16, 2022 at 02:28:09PM +0800, Lu Baolu wrote:
> It seems everyone agrees that for device assignment (where the I/O
> address is owned by the user-space application), the iommu_group-based
> APIs should always be used. Otherwise, the isolation and protection are
> not guaranteed.
This
On Fri, Jan 07, 2022 at 08:09:11AM +, Miaoqian Lin wrote:
> The reference taken by 'of_find_device_by_node()' must be released when
> not needed anymore.
> Add the corresponding 'put_device()' in the error handling path.
>
> Fixes: 765a9d1d02b2 ("iommu/tegra-smmu: Fix mc errors on tegra124-nya
On Thu, Dec 09, 2021 at 05:35:57PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> On NVIDIA SoC's the ARM SMMU needs to interact with the memory
> controller in order to map memory clients to the corresponding stream
> IDs. Document how the nvidia,memory-controller property can be used t
This is unused since commit 404837741416 ("iommu/vt-d: Use
iommu_sva_alloc(free)_pasid() helpers")
Signed-off-by: YueHaibing
---
drivers/iommu/intel/svm.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
index 5b5d69b04fcc..2c53689da4
On 2022-02-15 22:43, Florian Fainelli wrote:
Some platforms might define the same memory region to be suitable for
used by a kernel supporting CONFIG_DMA_RESTRICTED_POOL while maintaining
compatibility with older kernels that do not support that. This is
achieved by declaring the node this way;
On 2022/2/15 22:29, Robin Murphy wrote:
> On 2022-02-15 13:42, Will Deacon wrote:
>> On Tue, Feb 15, 2022 at 01:30:26PM +, Robin Murphy wrote:
>>> On 2022-02-15 13:00, Will Deacon wrote:
On Mon, Feb 14, 2022 at 08:55:20PM +0800, Yicong Yang wrote:
> On 2022/1/24 21:11, Yicong Yang wrot
From: Adrian Huang
When enabling VMD and IOMMU scalable mode, the following kernel panic
call trace/kernel log is shown in Eagle Stream platform (Sapphire Rapids
CPU) during booting:
pci :59:00.5: Adding to iommu group 42
...
vmd :59:00.5: PCI host bridge to bus 1:80
pci 1:80:01.
On Wed, 2022-02-16 at 14:59 +0900, Tomasz Figa wrote:
> On Wed, Feb 16, 2022 at 2:55 PM Yong Wu wrote:
> >
> > On Thu, 2022-01-27 at 12:08 +0100, AngeloGioacchino Del Regno
> > wrote:
> > > Il 25/01/22 09:56, Yong Wu ha scritto:
> > > > No need zero for the protect buffer that is only accessed by
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