Please ignore this patch, its sent by mistake to wrong mailing list.
Thanks,
Tejas
> -Original Message-
> From: Surendrakumar Upadhyay, TejaskumarX
>
> Sent: 02 March 2022 10:00
> To: gfx-internal-de...@eclists.intel.com
> Cc: iommu@lists.linux-foundation.org; Surendrakumar Upadhyay,
> T
The VT-d spec requires (10.4.4 Global Command Register, TE
field) that:
Hardware implementations supporting DMA draining must drain
any in-flight DMA read/write requests queued within the
Root-Complex before completing the translation enable
command and reflecting the status of the command through
The VT-d spec requires (10.4.4 Global Command Register, TE
field) that:
Hardware implementations supporting DMA draining must drain
any in-flight DMA read/write requests queued within the
Root-Complex before completing the translation enable
command and reflecting the status of the command through
On Tue, 1 Mar 2022, Christoph Hellwig wrote:
> Allow to pass a remap argument to the swiotlb initialization functions
> to handle the Xen/x86 remap case. ARM/ARM64 never did any remapping
> from xen_swiotlb_fixup, so we don't even need that quirk.
>
> Signed-off-by: Christoph Hellwig
> ---
> ar
Hi Yunfei,
>> Since __alloc_and_insert_iova_range fail will set the current alloc
>> iova size to max32_alloc_size (iovad->max32_alloc_size = size),
>> when the retry is executed into the __alloc_and_insert_iova_range
>> function, the retry action will be blocked by the check condition
>> (size >=
From: Halil Pasic
[ Upstream commit ddbd89deb7d32b1fbb879f48d68fda1a8ac58e8e ]
The problem I'm addressing was discovered by the LTP test covering
cve-2018-1000204.
A short description of what happens follows:
1) The test case issues a command code 00 (TEST UNIT READY) via the SG_IO
interface
From: Halil Pasic
[ Upstream commit ddbd89deb7d32b1fbb879f48d68fda1a8ac58e8e ]
The problem I'm addressing was discovered by the LTP test covering
cve-2018-1000204.
A short description of what happens follows:
1) The test case issues a command code 00 (TEST UNIT READY) via the SG_IO
interface
> -#include
> -
> -/*
> - * History lesson:
> - * The execution chain of IOMMUs in 2.6.36 looks as so:
> - *
> - *[xen-swiotlb]
> - * |
> - * +[swiotlb *]--+
> - */ | \
> - * / | \
> - *[GART] [Calgary]
On 2022-03-01 16:14, cyn...@kapsi.fi wrote:
From: Mikko Perttunen
Add schema information for specifying context stream IDs. This uses
the standard iommu-map property.
Signed-off-by: Mikko Perttunen
---
v3:
* New patch
v4:
* Remove memory-contexts subnode.
---
.../bindings/display/tegra/nvid
From: Mikko Perttunen
For engines that support context isolation, allocate a context when
opening a channel, and set up stream ID offset and context fields
when submitting a job.
Signed-off-by: Mikko Perttunen
---
v4:
* Separate error and output values in get_streamid_offset API
* Improve error
From: Mikko Perttunen
Add Host1x context stream IDs on systems that support Host1x context
isolation. Host1x and attached engines can use these stream IDs to
allow isolation between memory used by different processes.
The specified stream IDs must match those configured by the hypervisor,
if one
From: Mikko Perttunen
The context bus is a "dummy" bus that contains struct devices that
correspond to IOMMU contexts assigned through Host1x to processes.
Even when host1x itself is built as a module, the bus is registered
in built-in code so that the built-in ARM SMMU driver is able to
referen
From: Mikko Perttunen
Add schema information for specifying context stream IDs. This uses
the standard iommu-map property.
Signed-off-by: Mikko Perttunen
---
v3:
* New patch
v4:
* Remove memory-contexts subnode.
---
.../bindings/display/tegra/nvidia,tegra20-host1x.yaml| 5 +
1 file
From: Mikko Perttunen
Add code to do stream ID switching at the beginning of a job. The
stream ID is switched to the stream ID specified by the context
passed in the job structure.
Before switching the stream ID, an OP_DONE wait is done on the
channel's engine to ensure that there is no residual
From: Mikko Perttunen
The DMACTX field determines which context, as specified in the
TRANSCFG register, is used. While during boot it doesn't matter
which is used, later on it matters and this value is reused by
the firmware.
Signed-off-by: Mikko Perttunen
---
drivers/gpu/drm/tegra/falcon.c |
From: Mikko Perttunen
Implement the get_streamid_offset required for supporting context
isolation. Since old firmware cannot support context isolation
without hacks that we don't want to implement, check the firmware
binary to see if context isolation should be enabled.
Signed-off-by: Mikko Pert
From: Mikko Perttunen
Add code to register context devices from device tree, allocate them
out and manage their refcounts.
Signed-off-by: Mikko Perttunen
---
v2:
* Directly set DMA mask instead of inheriting from Host1x.
* Use iommu-map instead of custom DT property.
v4:
* Use u64 instead of dm
From: Mikko Perttunen
Set itself as the IOMMU for the host1x context device bus, containing
"dummy" devices used for Host1x context isolation.
Signed-off-by: Mikko Perttunen
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/iom
From: Mikko Perttunen
***
New in v4:
Addressed review comments. See individual patches.
***
***
New in v3:
Added device tree bindings for new property.
***
***
New in v2:
Added support for Tegra194
Use standard iommu-map property instead of custom mechanism
***
This series adds support for
On 3/1/2022 7:53 PM, Christoph Hellwig wrote:
On Fri, Feb 25, 2022 at 10:28:54PM +0800, Tianyu Lan wrote:
One more perspective is that one device may have multiple queues and
each queues should have independent swiotlb bounce buffer to avoid spin
lock overhead. The number of queues is only
On 2022-03-01 01:59, yf.wang--- via iommu wrote:
From: Yunfei Wang
In alloc_iova_fast function, if __alloc_and_insert_iova_range fail,
alloc_iova_fast will try flushing rcache and retry alloc iova, but
this has an issue:
Since __alloc_and_insert_iova_range fail will set the current alloc
iova
On Fri, Feb 25, 2022 at 10:28:54PM +0800, Tianyu Lan wrote:
> One more perspective is that one device may have multiple queues and
> each queues should have independent swiotlb bounce buffer to avoid spin
> lock overhead. The number of queues is only available in the device
> driver. This me
On 01/03/2022 10:53, Christoph Hellwig wrote:
> diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
> index 2ac0ef9c2fb76..7ab7002758396 100644
> --- a/arch/x86/kernel/pci-dma.c
> +++ b/arch/x86/kernel/pci-dma.c
> @@ -53,6 +53,13 @@ static void __init pci_swiotlb_detect(void)
>
On Tue, Mar 01, 2022 at 11:39:29AM +, Andrew Cooper wrote:
> This isn't really "must". The guest is perfectly capable of sharing
> memory with the hypervisor.
>
> It's just that for now, bounce buffering is allegedly faster, and the
> simple way of getting it working.
Yeah, I guess you щould
Hi Matt,
On 2022-03-01 03:00, Matt Flax wrote:
Hi All,
It seems that the ZONE_DMA changes have broken the operation of Rochip rk3399
chipsets from v5.10.22 onwards.
It isn't clear what needs to be changed to get any of these boards up and
running again. Any pointers on how/what to change ?
gets pulled in by all drivers using the DMA API.
Remove x86 internal variables and unnecessary includes from it.
Signed-off-by: Christoph Hellwig
---
arch/x86/include/asm/dma-mapping.h | 11 ---
arch/x86/include/asm/iommu.h | 2 ++
2 files changed, 2 insertions(+), 11 deletions(-
Allow to pass a remap argument to the swiotlb initialization functions
to handle the Xen/x86 remap case. ARM/ARM64 never did any remapping
from xen_swiotlb_fixup, so we don't even need that quirk.
Signed-off-by: Christoph Hellwig
---
arch/arm/xen/mm.c | 23 +++---
arch/x86/includ
Power SVM wants to allocate a swiotlb buffer that is not restricted to
low memory for the trusted hypervisor scheme. Consolidate the support
for this into the swiotlb_init interface by adding a new flag.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/include/asm/svm.h | 4
arch/p
Pass a bool to pass if swiotlb needs to be enabled based on the
addressing needs and replace the verbose argument with a set of
flags, including one to force enable bounce buffering.
Note that this patch removes the possibility to force xen-swiotlb
use using swiotlb=force on the command line on x8
Move enabling SWIOTLB_FORCE for guest memory encryption into common code.
Signed-off-by: Christoph Hellwig
---
arch/x86/kernel/cpu/mshyperv.c | 8
arch/x86/kernel/pci-dma.c | 7 +++
arch/x86/mm/mem_encrypt_amd.c | 3 ---
3 files changed, 7 insertions(+), 11 deletions(-)
diff
The IOMMU table tries to separate the different IOMMUs into different
backends, but actually requires various cross calls.
Rewrite the code to do the generic swiotlb/swiotlb-xen setup directly
in pci-dma.c and then just call into the IOMMU drivers.
Signed-off-by: Christoph Hellwig
---
arch/ia64
Use the generic swiotlb initialization helper instead of open coding it.
Signed-off-by: Christoph Hellwig
---
arch/mips/cavium-octeon/dma-octeon.c | 15 ++-
arch/mips/pci/pci-octeon.c | 2 +-
2 files changed, 3 insertions(+), 14 deletions(-)
diff --git a/arch/mips/cavium-
Let the caller chose a zone to allocate from. This will be used
later on by the xen-swiotlb initialization on arm.
Signed-off-by: Christoph Hellwig
Reviewed-by: Anshuman Khandual
---
arch/x86/pci/sta2x11-fixup.c | 2 +-
include/linux/swiotlb.h | 2 +-
kernel/dma/swiotlb.c | 4 ++--
swiotlb_late_init_with_default_size is an overly verbose name that
doesn't even catch what the function is doing, given that the size is
not just a default but the actual requested size.
Rename it to swiotlb_init_late.
Signed-off-by: Christoph Hellwig
Reviewed-by: Anshuman Khandual
---
arch/x8
Remove the bogus Xen override that was usually larger than the actual
size and just calculate the value on demand. Note that
swiotlb_max_segment still doesn't make sense as an interface and should
eventually be removed.
Signed-off-by: Christoph Hellwig
Reviewed-by: Anshuman Khandual
---
driver
If force bouncing is enabled we can't release the buffers.
Signed-off-by: Christoph Hellwig
Reviewed-by: Anshuman Khandual
---
kernel/dma/swiotlb.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c
index bfc56cb217059..64b390136f9ef 100644
--- a/
Use the more specific is_swiotlb_active check instead of checking the
global swiotlb_force variable.
Signed-off-by: Christoph Hellwig
Reviewed-by: Anshuman Khandual
---
kernel/dma/direct.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/dma/direct.h b/kernel/dma/direc
Hi all,
this series tries to clean up the swiotlb initialization, including
that of swiotlb-xen. To get there is also removes the x86 iommu table
infrastructure that massively obsfucates the initialization path.
Git tree:
git://git.infradead.org/users/hch/misc.git swiotlb-init-cleanup
Gitw
On 2/28/2022 6:17 PM, Joerg Roedel wrote:
> On Mon, Feb 21, 2022 at 10:29:12AM +0530, Vasant Hegde wrote:
>> From: Suravee Suthikulpanit
>>
>> Add error messages to prevent silent failure.
>>
>> Signed-off-by: Suravee Suthikulpanit
>> Signed-off-by: Vasant Hegde
>> ---
>> drivers/iommu/amd/i
From: Suravee Suthikulpanit
During module exit, the current logic loops through all possible
16-bit device ID space to search for existing devices and clean up
device state structures. This can be simplified by looping through
the device state list.
Also, refactor various clean up logic into fre
This variable has not been used since it was introduced.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Vasant Hegde
---
drivers/iommu/amd/iommu_v2.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/iommu/amd/iommu_v2.c b/drivers/iommu/amd/iommu_v2.c
index 58da08cc3d01..2daf37c21
Remove unused declarations and add static keyword as needed.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Vasant Hegde
---
drivers/iommu/amd/amd_iommu.h | 4
drivers/iommu/amd/init.c | 2 +-
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/iommu/amd/amd_iom
Unmap old_devtb in error path.
Signed-off-by: Vasant Hegde
---
drivers/iommu/amd/init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 6b5af568f3d5..f7e7d208063c 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
From: Suravee Suthikulpanit
Add error messages to prevent silent failure.
Signed-off-by: Vasant Hegde
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/init.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/
This series contains various cleanup and trivial fixes.
Changes in v2:
- Fixed error log message in patch 1 as suggested by Joerg.
Suravee Suthikulpanit (2):
iommu/amd: Improve error handling for amd_iommu_init_pci
iommu/amd: Improve amd_iommu_v2_exit()
Vasant Hegde (3):
iommu/amd: Call
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