PASID allocator uses IDR which is exclusive for the end of the
allocation range. There is no need to decrement pasid_max.
Fixes: af39507305fb ("iommu/vt-d: Apply global PASID in SVA")
Reported-by: Eric Auger
Signed-off-by: Jacob Pan
Reviewed-by: Eric Auger
Acked-by: Lu Baolu
--
On Wed, 20 Nov 2019 22:06:24 +0100
Auger Eric wrote:
> Hi Jacob,
>
> On 11/19/19 6:56 PM, Jacob Pan wrote:
> > Make use of generic IOASID code to manage PASID allocation,
> > free, and lookup. Replace Intel specific code.
> > IOASID allocator is inclusive fo
gt; > > > > >
> > > > > > > > This patch adds VFIO_IOMMU_PASID_REQUEST ioctl which
> > > > > > > > aims to passdown PASID allocation/free request from the
> > > > > > > > vi
On Fri, 8 Nov 2019 17:18:10 +0100
Auger Eric wrote:
> Hi Jacob,
>
> On 10/24/19 9:55 PM, Jacob Pan wrote:
> > When Shared Virtual Memory is exposed to a guest via vIOMMU,
> > scalable IOTLB invalidation may be passed down from outside IOMMU
> > subsystems. This patch
pfsid & 0xfff) << 52)) +#define QI_DEV_EIOTLB_PFSID(pfsid)
> (((u64)(pfsid & 0xf) << 12) | \
> + ((u64)((pfsid >> 4) & 0xfff) <<
> 52)) #define QI_DEV_EIOTLB_MAX_INVS 32
>
> /* Page group response descriptor QW0 */
Good catch. Thanks!
Acked-by: Jacob Pan
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
On Fri, 8 Nov 2019 12:30:31 +0100
Auger Eric wrote:
> Hi Jacob,
>
> On 10/24/19 9:54 PM, Jacob Pan wrote:
> > Make use of generic IOASID code to manage PASID allocation,
> > free, and lookup. Replace Intel specific code.
> >
> > Signed-off-by: Jacob Pan
On Fri, 8 Nov 2019 11:40:23 +0100
Auger Eric wrote:
> Hi Jacob,
>
> On 10/24/19 9:54 PM, Jacob Pan wrote:
> > When VT-d driver runs in the guest, PASID allocation must be
> > performed via virtual command interface. This patch registers a
> > custom IOASID allocator
On Fri, 8 Nov 2019 11:33:22 +0100
Auger Eric wrote:
> Hi Jacob,
> On 10/24/19 9:54 PM, Jacob Pan wrote:
> > From: Lu Baolu
> >
> > Enabling IOMMU in a guest requires communication with the host
> > driver for certain aspects. Use of PASID ID to enable Shar
On Fri, 25 Oct 2019 07:21:29 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > When Shared Virtual Memory is exposed to a guest via vIOMMU,
> > scalable IOTLB inva
On Sat, 26 Oct 2019 10:22:43 +0800
Lu Baolu wrote:
> Hi,
>
> On 10/25/19 3:55 AM, Jacob Pan wrote:
> > When Shared Virtual Memory is exposed to a guest via vIOMMU,
> > scalable IOTLB invalidation may be passed down from outside IOMMU
> > subsystems. This patch adds
On Fri, 25 Oct 2019 07:04:28 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > Nested translation mode is supported in VT-d 3.0 Spec.CH 3.8.
> > With PASID granular tr
On Fri, 25 Oct 2019 13:47:25 +0800
Lu Baolu wrote:
> Hi,
>
> On 10/25/19 3:54 AM, Jacob Pan wrote:
> > Make use of generic IOASID code to manage PASID allocation,
> > free, and lookup. Replace Intel specific code.
> >
> > Signed-off-by: Jacob Pan
> > ---
On Tue, 29 Oct 2019 18:52:01 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Tuesday, October 29, 2019 12:11 AM
> >
> > On Mon, 28 Oct 2019 06:06:33 +
> > "Tian, Kevin" wrote:
> >
&g
On Fri, 25 Oct 2019 06:19:29 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > From: Lu Baolu
> >
> > Enabling IOMMU in a guest requires communication with t
On Tue, 29 Oct 2019 07:57:21 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Tuesday, October 29, 2019 12:03 AM
> >
> > On Mon, 28 Oct 2019 06:03:36 +
> > "Tian, Kevin&quo
On Tue, 29 Oct 2019 10:54:48 +0800
Lu Baolu wrote:
> Hi,
>
> On 10/29/19 6:29 AM, Jacob Pan wrote:
> > Hi Baolu,
> >
> > Appreciate the thorough review, comments inline.
>
> You are welcome.
>
> >
> > On Sat, 26 Oct 2019 10
On Fri, 25 Oct 2019 06:31:04 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > When VT-d driver runs in the guest, PASID allocation must be
> > performed via virtual c
e?
> > >
> > > Based on that I prefer to disabling the SM mode completely (better
> > > through an interface), and move the logic out of CONFIG_INTEL_
> > > IOMMU_SVM
> > >
> >
> > Unfortunately, it is dangerous to disable SM after boot. SM uses
>
On Fri, 25 Oct 2019 06:41:16 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > Make use of generic IOASID code to manage PASID allocation,
> > free, and lookup. Repl
On Fri, 25 Oct 2019 06:42:54 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > After each setup for PASID entry, related translation caches must be
> > flushed.
>
On Sat, 26 Oct 2019 09:00:51 +0800
Lu Baolu wrote:
> Hi,
>
> On 10/25/19 3:55 AM, Jacob Pan wrote:
> > Use combined macros for_each_svm_dev() to simplify SVM device
> > iteration and error checking.
> >
> > Suggested-by: Andy Shevchenko
> > Signed-o
Hi Baolu,
Appreciate the thorough review, comments inline.
On Sat, 26 Oct 2019 10:01:19 +0800
Lu Baolu wrote:
> Hi,
>
> On 10/25/19 3:55 AM, Jacob Pan wrote:
> > When supporting guest SVA with emulated IOMMU, the guest PASID
> > table is shadowed in VMM. Updates to gue
On Fri, 25 Oct 2019 07:27:26 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > When Shared Virtual Address (SVA) is enabled for a guest OS via
> > vIOMMU, we need to p
On Mon, 28 Oct 2019 06:06:33 +
"Tian, Kevin" wrote:
> > >>> + /* PASID based dev TLBs, only support all PASIDs or single
> > >>> PASID */
> > >>> + {1, 1, 0},
> > >>
> > >> I forgot previous discussion. is it necessary to pass down dev
> > >> TLB invalidation
> > >> requests? Can it b
On Mon, 28 Oct 2019 06:03:36 +
"Tian, Kevin" wrote:
> > > > + .sva_bind_gpasid= intel_svm_bind_gpasid,
> > > > + .sva_unbind_gpasid = intel_svm_unbind_gpasid,
> > > > +#endif
> > >
> > > again, pure PASID management logic should be separated from SVM.
> > >
> > I
Hi Kevin,
On Fri, 25 Oct 2019 07:19:26 +
"Tian, Kevin" wrote:
> > From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> > Sent: Friday, October 25, 2019 3:55 AM
> >
> > When supporting guest SVA with emulated IOMMU, the guest PASID
> > table is
On Fri, 25 Oct 2019 23:04:48 +0800
Lu Baolu wrote:
> Hi,
>
> On 10/25/19 3:55 AM, Jacob Pan wrote:
> > Nested translation mode is supported in VT-d 3.0 Spec.CH 3.8.
> > With PASID granular translation type set to 0x11b, translation
> > result from the first level(F
Hi Baolu,
Thanks for the review. please see my comments inline.
On Fri, 25 Oct 2019 10:30:48 +0800
Lu Baolu wrote:
> Hi Jacob,
>
> On 10/25/19 3:54 AM, Jacob Pan wrote:
> > When VT-d driver runs in the guest, PASID allocation must be
> > performed via virtual command
PASID namespace is system-
wide.
Signed-off-by: Lu Baolu
Signed-off-by: Liu, Yi L
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 1 +
drivers/iommu/intel-iommu.c | 67 +
include/linux/intel-iommu.h | 2 ++
3 files changed, 70 insertions
When Shared Virtual Memory is exposed to a guest via vIOMMU, scalable
IOTLB invalidation may be passed down from outside IOMMU subsystems.
This patch adds invalidation functions that can be used for additional
translation cache types.
Signed-off-by: Jacob Pan
---
drivers/iommu/dmar.c
| | |SL for GPA-HPA, default domain|
| | '--'
'-'
Where:
- FL = First level/stage one page tables
- SL = Second level/stage two page tables
Signed-off-by: Jacob Pan
Signed-off-by: Liu, Yi L
---
Move domain helper to header to be used by SVA code.
Signed-off-by: Jacob Pan
Reviewed-by: Eric Auger
---
drivers/iommu/intel-iommu.c | 6 --
include/linux/intel-iommu.h | 6 ++
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu
Use combined macros for_each_svm_dev() to simplify SVM device iteration
and error checking.
Suggested-by: Andy Shevchenko
Signed-off-by: Jacob Pan
Reviewed-by: Eric Auger
---
drivers/iommu/intel-svm.c | 89 ++-
1 file changed, 42 insertions(+), 47
device handle,
host IOMMU driver can replace certain fields before submit to the
invalidation queue.
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
Signed-off-by: Liu, Yi L
---
drivers/iommu/intel-iommu.c | 170
1 file changed, 170 insertions
Make use of generic IOASID code to manage PASID allocation,
free, and lookup. Replace Intel specific code.
Signed-off-by: Jacob Pan
---
drivers/iommu/intel-iommu.c | 12 ++--
drivers/iommu/intel-pasid.c | 36
drivers/iommu/intel-svm.c | 39
After each setup for PASID entry, related translation caches must be flushed.
We can combine duplicated code into one function which is less error prone.
Signed-off-by: Jacob Pan
---
drivers/iommu/intel-pasid.c | 48 +
1 file changed, 18 insertions
physical translation and
SL performs guest physical to host physical translation.
Signed-off-by: Jacob Pan
Signed-off-by: Liu, Yi L
---
drivers/iommu/intel-pasid.c | 207
drivers/iommu/intel-pasid.h | 12 +++
2 files changed, 219 insertions(+)
diff
s the enlightened PASID allocation/free interfaces
via the virtual command interface.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
Signed-off-by: Jacob Pan
Reviewed-by: Eric Auger
---
drivers/iommu/intel-pasid.c
ithub.com/eauger/linux/tree/v5.1-rc3-2stage-v7)
- Addressed review comments from Andy Shevchenko and Alex Williamson
on
IOASID custom allocator.
- Support multiple custom IOASID allocators (vIOMMUs) and dynamic
registration.
Jacob Pan (10):
iommu/vt-d:
Virtual command registers are used in the guest only, to prevent
vmexit cost, we cache the capability and store it during initialization.
Signed-off-by: Jacob Pan
---
drivers/iommu/dmar.c| 1 +
include/linux/intel-iommu.h | 4
2 files changed, 5 insertions(+)
diff --git a/drivers
On Tue, 22 Oct 2019 21:04:00 -0700
Jacob Pan wrote:
> > > + if (cap_caching_mode(iommu->cap) &&
> > > sm_supported(iommu)) {
> >
> > do you need to check against cap_caching_mode() or ecap_vcmd?
> >
> I guess ecap_vcmd() will
On Wed, 23 Oct 2019 10:21:51 +0800
Lu Baolu wrote:
> >> +#ifdef CONFIG_INTEL_IOMMU_SVM
> >
> > Maybe move them to intel-svm.c instead? that's where the bulk
> > of the svm support is?
>
> I think this is a generic PASID allocator for guest IOMMU although
> vSVA is currently the only consume
On Wed, 23 Oct 2019 10:55:23 -0700
Jacob Pan wrote:
> > > Do you have to check this everytime? every dmar_readq is going to
> > > trap to the other side ...
> >
> > Yes. We don't need to check it every time. Check once and save the
> > result during
On Wed, 23 Oct 2019 09:53:04 +0800
Lu Baolu wrote:
> Hi Ashok,
>
> Thanks for reviewing the patch.
>
> On 10/23/19 8:45 AM, Raj, Ashok wrote:
> > On Tue, Oct 22, 2019 at 04:53:14PM -0700, Jacob Pan wrote:
> >> From: Lu Baolu
> >>
> >> If
On Tue, 22 Oct 2019 17:27:51 -0700
"Raj, Ashok" wrote:
> Hi Jacob
>
> On Tue, Oct 22, 2019 at 04:53:13PM -0700, Jacob Pan wrote:
> > Shared virtual address (SVA), a.k.a, Shared virtual memory (SVM) on
> > Intel platforms allow address space sharing between devic
On Tue, 22 Oct 2019 17:58:59 -0700
"Raj, Ashok" wrote:
> On Tue, Oct 22, 2019 at 04:53:16PM -0700, Jacob Pan wrote:
> > Make use of generic IOASID code to manage PASID allocation,
> > free, and lookup. Replace Intel specific code.
> >
> > Signed-off-by:
On Tue, 22 Oct 2019 17:51:29 -0700
"Raj, Ashok" wrote:
> On Tue, Oct 22, 2019 at 04:53:15PM -0700, Jacob Pan wrote:
> > When VT-d driver runs in the guest, PASID allocation must be
> > performed via virtual command interface. This patch registers a
> > cust
| | |SL for GPA-HPA, default domain|
| | '--'
'-'
Where:
- FL = First level/stage one page tables
- SL = Second level/stage two page tables
Signed-off-by: Jacob Pan
Signed-off-by: Liu, Yi L
---
When Shared Virtual Memory is exposed to a guest via vIOMMU, scalable
IOTLB invalidation may be passed down from outside IOMMU subsystems.
This patch adds invalidation functions that can be used for additional
translation cache types.
Signed-off-by: Jacob Pan
---
drivers/iommu/dmar.c
After each setup for PASID entry, related translation caches must be flushed.
We can combine duplicated code into one function which is less error prone.
Signed-off-by: Jacob Pan
---
drivers/iommu/intel-pasid.c | 48 +
1 file changed, 18 insertions
device handle,
host IOMMU driver can replace certain fields before submit to the
invalidation queue.
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
Signed-off-by: Liu, Yi L
---
drivers/iommu/intel-iommu.c | 170
1 file changed, 170 insertions
PASID namespace is system-
wide.
Signed-off-by: Lu Baolu
Signed-off-by: Liu, Yi L
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 1 +
drivers/iommu/intel-iommu.c | 67 +
include/linux/intel-iommu.h | 2 ++
3 files changed, 70 insertions
d branch v5.1-rc4
- Integrated with Eric Auger's new v7 series for common APIs
(https://github.com/eauger/linux/tree/v5.1-rc3-2stage-v7)
- Addressed review comments from Andy Shevchenko and Alex Williamson
on
IOASID custom allocator.
- Support m
Use combined macros for_each_svm_dev() to simplify SVM device iteration
and error checking.
Suggested-by: Andy Shevchenko
Signed-off-by: Jacob Pan
Reviewed-by: Eric Auger
---
drivers/iommu/intel-svm.c | 85 +++
1 file changed, 41 insertions(+), 44
physical translation and
SL performs guest physical to host physical translation.
Signed-off-by: Jacob Pan
Signed-off-by: Liu, Yi L
---
drivers/iommu/intel-pasid.c | 207
drivers/iommu/intel-pasid.h | 12 +++
2 files changed, 219 insertions(+)
diff
register and a virtual response register. Refer
to section 10.4.42, 10.4.43, 10.4.44 for more information.
This patch adds the enlightened PASID allocation/free interfaces
via the virtual command register.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
Move domain helper to header to be used by SVA code.
Signed-off-by: Jacob Pan
Reviewed-by: Eric Auger
---
drivers/iommu/intel-iommu.c | 6 --
include/linux/intel-iommu.h | 6 ++
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu
Make use of generic IOASID code to manage PASID allocation,
free, and lookup. Replace Intel specific code.
Signed-off-by: Jacob Pan
---
drivers/iommu/intel-iommu.c | 12 ++--
drivers/iommu/intel-pasid.c | 36
drivers/iommu/intel-svm.c | 37
Hi Joerg,
Just another gentle reminder. I think we have reached consensus in this
common code. Jean and Eric can confirm.
Thanks,
Jacob
On Mon, 7 Oct 2019 12:39:12 -0700
Jacob Pan wrote:
> Hi Joerg and all,
>
> Just wondering if you have more comments on this series.
>
> Tha
Hi Joerg and all,
Just wondering if you have more comments on this series.
Thanks,
Jacob
On Wed, 2 Oct 2019 12:42:39 -0700
Jacob Pan wrote:
> This set consists of IOMMU APIs to support SVA in the guest, a.k.a
> nested SVA. As the complete SVA support is complex, we break down the
>
compile error with missing header errno.h
- Updated Jean-Philiippe's new email and updateded reviewed-by tag
Jacob Pan (2):
iommu/ioasid: Add custom allocators
iommu: Introduce guest PASID bind function
Jean-Philippe Brucker (1):
iommu: Add I/O ASID allocator
Yi L Liu (1):
XArray.
- switching between allocators requires all outstanding IOASIDs to be
freed unless the two allocators share the same alloc()/free() helpers.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
Link: https://lkml.org/lkml/2019/4/26/462
---
drivers/iommu/ioasid.c | 289
iu
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
Signed-off-by: Eric Auger
Signed-off-by: Jean-Philippe Brucker
---
drivers/iommu/iommu.c | 10 +
include/linux/iommu.h | 14 ++
include/uapi/linux/iommu.h | 110 +
3 files ch
IOMMU, using the same ID space as IOMMU.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 4 ++
drivers/iommu/Makefile | 1 +
drivers/iommu/ioasid.c | 151 +
include/linux/ioasid.h | 48 ++
x27;-'
'-'
Where:
- FL = First level/stage one page tables
- SL = Second level/stage two page tables
- GP = Guest PASID
- HP = Host PASID
* Conversion needed if non-identity GP-HP mapping option is chosen.
Signed-off-by: Jacob Pan
Signed-off-
On Wed, 2 Oct 2019 18:18:25 +0200
Jean-Philippe Brucker wrote:
> Hi Jacob,
>
> I have four tiny comments below but the patch looks great otherwise,
> no major concern from me.
>
> On Sat, Sep 21, 2019 at 05:07:49PM -0700, Jacob Pan wrote:
> > +/*
> > + * struct io
On Wed, 2 Oct 2019 16:18:10 +0200
Jean-Philippe Brucker wrote:
> Hi Jacob,
>
> There seem to be a mix-up here, the changes from your v2 are lost and
> patches 1 and 3 are back to v1. Assuming this isn't intended, I'll
> review v2 of this patch since it looked good to me overall.
>
oops, you are
Hi Jean,
Just wondering if you have more comments on ioasid custom allocator, v3
is largely the same as v2 other than shuffling header within the set.
Thanks,
Jacob
On Tue, 1 Oct 2019 16:33:21 -0700
Jacob Pan wrote:
> This set consists of IOMMU APIs to support SVA in the guest, a.
IOMMU, using the same ID space as IOMMU.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 4 ++
drivers/iommu/Makefile | 1 +
drivers/iommu/ioasid.c | 151 +
include/linux/ioasid.h | 48 ++
XArray.
- switching between allocators requires all outstanding IOASIDs to be
freed unless the two allocators share the same alloc()/free() helpers.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
Link: https://lkml.org/lkml/2019/4/26/462
---
drivers/iommu/ioasid.c | 301
x27;-'
'-'
Where:
- FL = First level/stage one page tables
- SL = Second level/stage two page tables
- GP = Guest PASID
- HP = Host PASID
* Conversion needed if non-identity GP-HP mapping option is chosen.
Signed-off-by: Jaco
iu
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
Signed-off-by: Eric Auger
Signed-off-by: Jean-Philippe Brucker
---
drivers/iommu/iommu.c | 10 +
include/linux/iommu.h | 14 ++
include/uapi/linux/iommu.h | 110 +
3 files ch
-Philiippe's new email and updateded reviewed-by tag
Jacob Pan (2):
iommu/ioasid: Add custom allocators
iommu: Introduce guest PASID bind function
Jean-Philippe Brucker (1):
iommu: Add I/O ASID allocator
Yi L Liu (1):
iommu: Introduce cache_invalidate API
drivers/iommu/Kconfig
rst level page table interfaces
> iommu/vt-d: Map/unmap domain with mmmap/mmunmap
> iommu/vt-d: Identify domains using first level page table
>
> drivers/iommu/Makefile | 2 +-
> drivers/iommu/intel-iommu.c| 142 ++--
> drivers/iommu/intel-pgtable.c | 342
> + include/linux/intel-iommu.h|
> 31 ++- include/trace/events/intel_iommu.h | 60 +
> 5 files changed, 553 insertions(+), 24 deletions(-)
> create mode 100644 drivers/iommu/intel-pgtable.c
>
[Jacob Pan]
___
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https://lists.linuxfoundation.org/mailman/listinfo/iommu
XArray.
- switching between allocators requires all outstanding IOASIDs to be
freed unless the two allocators share the same alloc()/free() helpers.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
Link: https://lkml.org/lkml/2019/4/26/462
---
drivers/iommu/ioasid.c | 293
IOMMU, using the same ID space as IOMMU.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 4 ++
drivers/iommu/Makefile | 1 +
drivers/iommu/ioasid.c | 151 +
include/linux/ioasid.h | 47 +
:
- Addressed review comments by Jean on IOASID custom allocators, locking
fix, misc control flow fix.
- Fixed a compile error with missing header errno.h
- Updated Jean-Philiippe's new email and updateded reviewed-by tag
Jacob Pan (2):
iommu/ioasid: Add custom alloc
x27;-'
'-'
Where:
- FL = First level/stage one page tables
- SL = Second level/stage two page tables
- GP = Guest PASID
- HP = Host PASID
* Conversion needed if non-identity GP-HP mapping option is chosen.
Signed-off-by: Jacob Pan
Signed-off-
iu
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
Signed-off-by: Eric Auger
Signed-off-by: Jean-Philippe Brucker
---
drivers/iommu/iommu.c | 10 +
include/linux/iommu.h | 14 ++
include/uapi/linux/iommu.h | 110 +
3 files ch
On Fri, 20 Sep 2019 18:35:58 +0200
Jean-Philippe Brucker wrote:
> On Wed, Sep 18, 2019 at 04:26:33PM -0700, Jacob Pan wrote:
> > +/*
> > + * struct ioasid_allocator_data - Internal data structure to hold
> > information
> > + * about an allocator. There
x27;-'
'-'
Where:
- FL = First level/stage one page tables
- SL = Second level/stage two page tables
- GP = Guest PASID
- HP = Host PASID
* Conversion needed if non-identity GP-HP mapping option is chosen.
Signed-off-by: Jaco
iu
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
Signed-off-by: Eric Auger
Signed-off-by: Jean-Philippe Brucker
---
drivers/iommu/iommu.c | 10 +
include/linux/iommu.h | 14 ++
include/uapi/linux/iommu.h | 110 +
3 files ch
IOMMU, using the same ID space as IOMMU.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 4 ++
drivers/iommu/Makefile | 1 +
drivers/iommu/ioasid.c | 151 +
include/linux/ioasid.h | 47 +
XArray.
- switching between allocators requires all outstanding IOASIDs to be
freed unless the two allocators share the same alloc()/free() helpers.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
Link: https://lkml.org/lkml/2019/4/26/462
---
drivers/iommu/ioasid.c | 301
the uAPI,
considering we have been using PASID in the rest of uAPIs. IOASID will remain
used within the kernel.
For more discussions lead to this series, checkout LPC 2019 VFIO/IOMMU/PCI
microconference materials.
https://linuxplumbersconf.org/event/4/sessions/66/#20190909
Jacob Pan (2):
iommu
nks,
Jacob
On Thu, 15 Aug 2019 13:13:06 -0700
Jacob Pan wrote:
> Shared virtual address (SVA), a.k.a, Shared virtual memory (SVM) on
> Intel platforms allow address space sharing between device DMA and
> applications. SVA can reduce programming complexity and enhance
> security. This s
lable
mode")
Reported-by: Sanjay K Kumar
Signed-off-by: Jacob Pan
---
drivers/iommu/intel-svm.c | 36 +++-
include/linux/intel-iommu.h | 3 ---
2 files changed, 15 insertions(+), 24 deletions(-)
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-s
On Fri, 23 Aug 2019 10:23:07 +0200
Joerg Roedel wrote:
> Hi Jacob,
>
> On Tue, Aug 20, 2019 at 02:21:08PM -0700, Jacob Pan wrote:
> > Global pages support is removed from VT-d spec 3.0. Since global
> > pages G flag only affects first-level paging structures and because
invalidation, PASID
granularity and page selective within PASID will be used. There is
no global granularity supported. Without this fix, IOTLB invalidation
will cause invalid descriptor error in the queued invalidation (QI)
interface.
Reported-by: Sanjay K Kumar
Signed-off-by: Jacob Pan
---
drivers
On Fri, 16 Aug 2019 00:17:44 +0300
Andy Shevchenko wrote:
> On Thu, Aug 15, 2019 at 11:52 PM Jacob Pan
> wrote:
> >
> > Use combined macros for_each_svm_dev() to simplify SVM device
> > iteration and error checking.
> >
> > Suggested-by: Andy Shev
IOMMU, using the same ID space as IOMMU.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 4 ++
drivers/iommu/Makefile | 1 +
drivers/iommu/ioasid.c | 151 +
include/linux/ioasid.h | 47 +
x27;-'
'-'
Where:
- FL = First level/stage one page tables
- SL = Second level/stage two page tables
- GP = Guest PASID
- HP = Host PASID
* Conversion needed if non-identity GP-HP mapping option is chosen.
Signed-off-by: Jaco
the same XArray.
- switching between allocators requires all outstanding IOASIDs to be
freed unless the two allocators share the same alloc()/free() helpers.
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
Link: https://lkml.org/lkml/2019/4/26/462
---
drivers/iommu/ioasid.c | 302
PASID namespace is system-
wide.
Signed-off-by: Lu Baolu
Signed-off-by: Liu, Yi L
Signed-off-by: Jacob Pan
---
drivers/iommu/Kconfig | 1 +
drivers/iommu/intel-iommu.c | 67 +
include/linux/intel-iommu.h | 2 ++
3 files changed, 70 insertions
After each setup for PASID entry, related translation caches must be flushed.
We can combine duplicated code into one function which is less error prone.
Signed-off-by: Jacob Pan
---
drivers/iommu/intel-pasid.c | 48 +
1 file changed, 18 insertions
Make use of generic IOASID code to manage PASID allocation,
free, and lookup. Replace Intel specific code.
Signed-off-by: Jacob Pan
---
drivers/iommu/intel-iommu.c | 12 ++--
drivers/iommu/intel-pasid.c | 36
drivers/iommu/intel-svm.c | 37
Use combined macros for_each_svm_dev() to simplify SVM device iteration
and error checking.
Suggested-by: Andy Shevchenko
Signed-off-by: Jacob Pan
Reviewed-by: Eric Auger
---
drivers/iommu/intel-svm.c | 85 +++
1 file changed, 41 insertions(+), 44
From: Jean-Philippe Brucker
For development only, trace I/O page faults and responses.
Signed-off-by: Jacob Pan
[JPB: removed the invalidate trace event, that will be added later]
Signed-off-by: Jean-Philippe Brucker
Signed-off-by: Jacob Pan
---
include/trace/events/iommu.h | 84
timer expires but not
included in this patch. We need to consider the life cycle of page
groupd ID to prevent confusion with reused group ID by a device.
For now, a warning message provides clue of such failure.
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
---
drivers/iommu/iommu.c | 55
device handle,
host IOMMU driver can replace certain fields before submit to the
invalidation queue.
Signed-off-by: Jacob Pan
Signed-off-by: Ashok Raj
Signed-off-by: Liu, Yi L
---
drivers/iommu/intel-iommu.c | 170
1 file changed, 170 insertions
701 - 800 of 1270 matches
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