Re: [PATCH 0/3] Add support for privileged mappings

On Thu, Jul 07, 2016 at 06:00:26PM +0100, Will Deacon wrote: > On Wed, Jul 06, 2016 at 04:51:33PM -0700, Mitchel Humpherys wrote: > > The following patch to the ARM SMMU driver: > > > > commit d346180e70b91b3d5a1ae7e5603e65593d4622bc > > Author: Robin Murphy > >

Re: [PATCH v2 0/6] Add support for privileged mappings

On Mon, Jul 11, 2016 at 03:02:24PM +0100, Robin Murphy wrote: > Hey Mitch, > > Thanks for having the necessary go at the DMA API - I think the series > looks broadly workable now. > > On 09/07/16 03:09, Mitchel Humpherys wrote: > > The following patch to the ARM SMMU driver: > > > > commit

Re: [PATCH 3/4] iommu/arm-smmu: Disable stalling faults for all endpoints

On Tue, Dec 06, 2016 at 06:30:21PM -0500, Rob Clark wrote: > On Thu, Aug 18, 2016 at 9:05 AM, Will Deacon wrote: > > Enabling stalling faults can result in hardware deadlock on poorly > > designed systems, particularly those with a PCI root complex upstream of > > the SMMU. >

Re: [RFC 2/3] iommu/arm-smmu: Add qcom implementation

On Tue, Jan 03, 2017 at 04:30:55PM -0500, Rob Clark wrote: > At least on the db820c I have, with the firmware I have, I'm not seeing > the SS bit set, even though the iommu is in a stalled state. So for > this implementation ignore not having SS bit set. The SS bit gets set if SCTLR.CFCFG is set

Re: [PATCH v2 2/4] iommu/arm-smmu: Tidy up context bank indexing

time, and every other usage is to dynamically calculate CB_BASE over > and over and over again. Let's flip things around so that we just > maintain the CB_BASE address directly. Reviewed-by: Jordan Crouse <jcro...@codeaurora.org> > Signed-off-by: Robin Murphy <robin.mur...@arm.com> > --

Re: [PATCH v2 4/4] iommu/arm-smmu: Poll for TLB sync completion more effectively

ot;reasonable time" > periods, it becomes increasingly unlikely that it ever will. I really really like this. Reviewed-by: Jordan Crouse <jcro...@codeaurora.org> > Signed-off-by: Robin Murphy <robin.mur...@arm.com> > --- > > v2: Restored the cpu_relax() to the inner loop >

Re: [PATCH v2 1/4] iommu/arm-smmu: Simplify ASID/VMID handling

no bad thing. If it helps: Reviewed-by: Jordan Crouse <jcro...@codeaurora.org> > Signed-off-by: Robin Murphy <robin.mur...@arm.com> > --- > > v2: No change > > drivers/iommu/arm-smmu.c | 36 +++- > 1 file changed, 19 insertions(+),

Re: [PATCH 7/7] iommu/arm-smmu: add support for dynamic domains

On Tue, Mar 07, 2017 at 06:11:38PM +, Mark Rutland wrote: > On Tue, Mar 07, 2017 at 09:39:55AM -0700, Jordan Crouse wrote: > > Implement support for dynamic domain switching. This feature is > > only enabled when the qcom,dynamic device tree attribute for an sm

[PATCH 0/7] RFC: iommu/arm-smmu-v2: Dynamic domains

an Jeremy Gebben (2): iommu: introduce TTBR0 domain attribute iommu/arm-smmu: add support for TTBR0 attribute Jordan Crouse (4): iommu: Add DOMAIN_ATTR_ENABLE_TTBR1 iommu/arm-smmu: Add support for TTBR1 iommu: Add dynamic domains iommu/arm-smmu: add support for dynamic domains Mitchel Humphe

[PATCH 5/7] iommu/arm-smmu: add support for TTBR0 attribute

From: Jeremy Gebben <jgeb...@codeaurora.org> Add support to return the value of the TTBR0 register in response to a request via DOMAIN_ATTR_TTBR0. Signed-off-by: Jeremy Gebben <jgeb...@codeaurora.org> Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iom

[PATCH 3/7] iommu/arm-smmu: Add support for TTBR1

/unmap operations will automatically use the appropriate pagetable based on the specified iova and the existing mask. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c | 19 - drivers/iommu/io-pgtable-arm.c

[PATCH 6/7] iommu: Add dynamic domains

-dynamic domains. The domains will share configuration (pagetable format, context bank, etc). Dynamic domains do not modify the hardware directly - they are typically a wrapper for the pagetable memory and facilitate using the other IOMMU APIs to map and unmap buffers. Signed-off-by: Jordan Crouse <j

[PATCH 7/7] iommu/arm-smmu: add support for dynamic domains

s restored at the end of the switch operation. Signed-off-by: Jeremy Gebben <jgeb...@codeaurora.org> Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c | 157 --- 1 file changed, 136 insertions(+), 21 deletions(-)

[PATCH 4/7] iommu: introduce TTBR0 domain attribute

format. The domain must be attached before TTBR0 may be queried. Signed-off-by: Jeremy Gebben <jgeb...@codeaurora.org> Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iom

[PATCH 2/7] iommu: Add DOMAIN_ATTR_ENABLE_TTBR1

safely. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 436dc21..d537cc9 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -114,6

[PATCH 1/7] iommu/arm-smmu: save the pgtbl_cfg in the domain

From: Mitchel Humpherys The pgtbl_cfg object has a few handy properties that we'd like to make use of later (returning the pgd in a domain attribute, for example). Keep track of the domain pgtbl_cfg in the domain structure. Signed-off-by: Mitchel Humpherys

Re: [Freedreno] [PATCH 0/7] RFC: iommu/arm-smmu-v2: Dynamic domains

On Tue, Mar 07, 2017 at 09:39:48AM -0700, Jordan Crouse wrote: > Pursuant to the arm-smmu-v3 SVM support: > > https://lists.linuxfoundation.org/pipermail/iommu/2017-February/020599.html > > I felt it would be helpful if I would demonstrate how Qualcomm implements > per-

Re: [PATCH V3 0/5] iommu/arm-smmu: Add runtime pm/sleep support

On Tue, Apr 04, 2017 at 12:39:14PM -0700, Stephen Boyd wrote: > On 04/03, Will Deacon wrote: > > On Fri, Mar 31, 2017 at 10:58:16PM -0400, Rob Clark wrote: > > > On Fri, Mar 31, 2017 at 1:54 PM, Will Deacon wrote: > > > > On Thu, Mar 09, 2017 at 09:05:43PM +0530, Sricharan R

Re: Task based virtual address spaces

On Thu, Oct 05, 2017 at 11:08:12AM +0100, Jean-Philippe Brucker wrote: > Hi Jordan, > > On 04/10/17 20:43, Jordan Crouse wrote: > > Trying to start back up the conversation about multiple address > > spaces for IOMMU devices. If you will remember Jean-Philippe posted

Re: [RFCv2 PATCH 00/36] Process management for IOMMU + SVM for SMMUv3

On Thu, Oct 12, 2017 at 01:55:32PM +0100, Jean-Philippe Brucker wrote: > On 12/10/17 13:05, Yisheng Xie wrote: > [...] > * An iommu_process can be bound to multiple domains, and a domain can > have > multiple iommu_process. > >>> when bind a task to device, can we create a single

[RFC] iommu/arm-smmu: Add support for TTBR1

/TTBR1 virtual address range of 36 bits the memory map will look like this: TTBR0 [0x:0x0007] TTBR1 [0xFFF8:0x] The map/unmap operations will automatically use the appropriate pagetable for the given iova. Signed-off-by: Jordan Crouse

[PATCH] iommu: Check the result of iommu_group_get() for NULL

The result of iommu_group_get() was being blindly used in both attach and detach which results in a dereference when trying to work with an unknown device. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/iommu.c | 5 + 1 file changed, 5 insertions(+) diff

Re: [RFCv2 PATCH 00/36] Process management for IOMMU + SVM for SMMUv3

On Mon, Oct 23, 2017 at 02:00:07PM +0100, Jean-Philippe Brucker wrote: > Hi Jordan, > > [Lots of IOMMU people have been dropped from Cc, I've tried to add them back] > > On 12/10/17 16:28, Jordan Crouse wrote: > > On Thu, Oct 12, 2017 at 01:55:32PM +0100, Jean-Philippe Bruc

[PATCH 01/16] iommu: Add DOMAIN_ATTR_SPLIT_TABLES

Add a new domain attribute to enable split pagetable support for devices devices that support it. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index d7e2f5

[RFC v2 00/16] Private PASID and per-instance pagetables

from v1]: * Switch the domain attribute to SPLIT_TABLES (Robin Murphy) * Reuse existing mm hooks as much as possible (Jean Phillipe Brucker) * Consolidate iommu map/unmap code (Jean Phillipe Brucker) [1] https://patchwork.kernel.org/patch/10394883/ Jordan Crouse (16): iommu: Add DOMAIN_ATTR_SPLIT_TAB

[PATCH 10/16] drm/msm: Add msm_mmu features

Add a few simple support functions to support a bitmask of features that a specific MMU implementation supports. The first feature will be per-instance pagetables coming in the following patch. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_mmu.

[PATCH 13/16] drm/msm/a5xx: Support per-instance pagetables

. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/Kconfig | 1 + drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 55 + drivers/gpu/drm/msm/adreno/a5xx_gpu.h | 17 ++ drivers/gpu/drm/msm/adreno/a5xx_preempt.

[PATCH 14/16] drm/msm: Support per-instance address spaces

Create a per-instance address spaces when a new DRM file instance is opened assuming the target supports it and the underlying infrastructure exists. If the operation is unsupported fall back quietly to use the global pagetable. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- d

[PATCH 16/16] iommu/arm-smmu: Add list of devices to opt out of DMA domains

DMA ops. Later the client device in question can set up and attach their own domain. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c | 24 1 file changed, 24 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-

[PATCH 05/16] iommu: arm-smmu: Add support for private PASIDs

Add support for allocating and populating pagetables indexed by private PASIDs. Each new PASID is allocated a pagetable with the same parameters and format as the parent domain. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c

[PATCH 04/16] iommu: sva: Add support for private PASIDs

PASIDs by creating a new io-pgtable instance map it to a PASID and provide the APIs for drivers to populate it manually. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/iommu-sva.c | 139 -- drivers/iommu/iommu.c

[PATCH 11/16] drm/msm: Add support for iommu-sva PASIDs

a msm_mmu struct to abstract (most) of the details from the rest of the system. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_iommu.c | 190 drivers/gpu/drm/msm/msm_mmu.h | 6 + 2 files changed, 196 insertions(+) diff

[PATCH 12/16] drm/msm: Add support for per-instance address spaces

Add a function to allocate a new pasid from a existing MMU domain and create a per-instance address space. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_drv.h | 3 +++ drivers/gpu/drm/msm/msm_gem_vma.c | 37 +-- 2 files c

[PATCH 08/16] drm/msm: Pass the MMU domain index in struct msm_file_private

Pass the index of the MMU domain in struct msm_file_private instead of assuming gpu->id throughout the submit path. This clears the way to change ctx->aspace to a per-instance pagetable. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_drv.c

[PATCH 09/16] drm/msm/gpu: Support using split page tables for kernel buffer objects

ll need additional support to be enabled but even if they aren't set up it isn't harmful to just use TTBR1 for all virtual memory regions and leave the other pagetable unused. If TTBR1 support isn't enabled then fall back to the "legacy" virtual address space both kernel and user. Si

[PATCH 02/16] iommu/arm-smmu: Add split pagetable support for arm-smmu-v2

Add support for a split pagetable (TTBR0/TTBR1) scheme for arm-smmu-v2. If split pagetables are enabled, create a pagetable for TTBR1 and set up the sign extension bit so that all IOVAs with that bit set are mapped and translated from the TTBR1 pagetable. Signed-off-by: Jordan Crouse <j

[PATCH 03/16] iommu/io-pgtable-arm: Remove ttbr[1] from io_pgtbl_cfg

Now that we have a working example of an ARM driver that implements split pagetables completely in the client driver it is apparent that we don't need to store an extra ttbr value in the io_pgtbl_cfg struct that will never get used. Signed-off-by: Jordan Crouse <jcro...@codeaurora.

[PATCH 06/16] iommu: arm-smmu: Add side-band function for specific PASID callbacks

pagetable information to the client driver whenever a new PASID is created or destroyed Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c | 40 include/linux/arm-smmu.h | 18 ++ 2 files changed, 58 inse

[PATCH 07/16] drm/msm/gpu: Enable 64 bit mode by default

addresses so switch over now to prepare for using addresses above 4G for targets that support them. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 14 ++ drivers/gpu/drm/msm/msm_iommu.c | 2 +- 2 files changed, 15 inse

[PATCH 15/16] iommu: Gracefully allow drivers to not attach to a default domain

ork and the next domain to try to attach will take group->domain for itself and everything will proceed as normal. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/iommu.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/d

Re: [PATCH 1/1] iommu/arm-smmu: Add support to use Last level cache

On Fri, Jun 15, 2018 at 05:52:32PM +0100, Will Deacon wrote: > Hi Vivek, > > On Fri, Jun 15, 2018 at 04:23:29PM +0530, Vivek Gautam wrote: > > Qualcomm SoCs have an additional level of cache called as > > System cache or Last level cache[1]. This cache sits right > > before the DDR, and is

Re: [RFCv2 PATCH 00/36] Process management for IOMMU + SVM for SMMUv3

On Wed, Oct 25, 2017 at 02:20:15PM -0600, Jordan Crouse wrote: > On Mon, Oct 23, 2017 at 02:00:07PM +0100, Jean-Philippe Brucker wrote: > > Hi Jordan, > > > > [Lots of IOMMU people have been dropped from Cc, I've tried to add them > > back] > > > >

Re: [PATCH v7 6/6] drm/msm: iommu: Replace runtime calls with runtime suppliers

On Tue, Feb 13, 2018 at 06:10:38PM +0900, Tomasz Figa wrote: > Hi Vivek, > > Thanks for the patch. Please see my comments inline. > > On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam > wrote: > > While handling the concerned iommu, there should not be a > > need to

Re: [PATCH v7 6/6] drm/msm: iommu: Replace runtime calls with runtime suppliers

On Wed, Feb 14, 2018 at 12:31:29PM +0900, Tomasz Figa wrote: > Hi Jordan, > > On Wed, Feb 14, 2018 at 1:42 AM, Jordan Crouse <jcro...@codeaurora.org> wrote: > > On Tue, Feb 13, 2018 at 06:10:38PM +0900, Tomasz Figa wrote: > >> Hi Vivek, > >> > >&

[PATCH 02/14] iommu/arm-smmu: Add support for TTBR1

/unmap operations will automatically use the appropriate pagetable based on the specified iova and the existing mask. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu-regs.h | 2 - drivers/iommu/arm-smmu.c | 22 -- drivers/iommu/io-pgtable-arm.c

[PATCH 05/14] iommu: arm-smmu: Add pasid implementation

Add support for allocating and populating pagetables indexed by pasid. Each new pasid is allocated a pagetable with the same parameters and format as the parent domain. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c

[RFC 00/14] Per-instance pagetables for MSM GPUs

t that bikeshed if you feel so inclined. Thanks for reading this far. On with the code. Applies against git://linux-arm.org/linux-jpb.git sva/v1 Jordan Crouse (14): iommu: Add DOMAIN_ATTR_ENABLE_TTBR1 iommu/arm-smmu: Add support for TTBR1 iommu: Create a base struct for io_mm iommu: sva: Ad

[PATCH 03/14] iommu: Create a base struct for io_mm

In order to support both shared mm sva pagetables as well as io-pgtable backed tables add a base structure to io_mm so that the two styles can share the same idr. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 8 drivers/iommu/iommu-sva.c

[PATCH 01/14] iommu: Add DOMAIN_ATTR_ENABLE_TTBR1

safely. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 641aaf0f1b81..e2c49e583d8d 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -153,6

[PATCH 12/14] drm/msm: Add support for per-instance address spaces

Add a function to allocate a new pasid from a existing MMU domain and create a per-instance address space. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_drv.h | 3 +++ drivers/gpu/drm/msm/msm_gem_vma.c | 36 +++- 2

[PATCH 11/14] drm/msm: Add support for iommu-sva PASIDs

a msm_mmu struct to abstract (most) of the details from the rest of the system. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_iommu.c | 184 drivers/gpu/drm/msm/msm_mmu.h | 6 ++ 2 files changed, 190 inse

[PATCH 14/14] drm/msm/a5xx: Support per-instance pagetables

. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 55 ++ drivers/gpu/drm/msm/adreno/a5xx_gpu.h | 17 +++ drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 76 +-- drivers/gpu/drm/msm/

[PATCH 04/14] iommu: sva: Add support for pasid allocation

CPU pagetables these implementations need to a new pagetable structure and populate it manually. Add a new set of API functions to create and populate a pagetable structure identified by a pasid. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/iommu-sva.c

[PATCH 08/14] drm/msm: Pass the MMU domain index in struct msm_file_private

Pass the index of the MMU domain in struct msm_file_private instead of assuming gpu->id throughout the submit path. This clears the way to change ctx->aspace to a per-instance pagetable. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_drv.c

[PATCH 10/14] drm/msm: Add msm_mmu features

Add a few simple support functions to support a bitmask of features that a specific MMU implementation supports. The first feature will be per-instance pagetables coming in the following patch. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/msm_mmu.

[PATCH 13/14] drm/msm: Support per-instance address spaces

Create a per-instance address spaces when a new DRM file instance is opened assuming the target supports it and the underlying infrastructure exists. If the operation is unsupported fall back quietly to use the global pagetable. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- d

[PATCH 09/14] drm/msm/gpu: Support using TTBR1 for kernel buffer objects

pagetables still need additional support to be enabled but even if they aren't set up it isn't harmful to just use TTBR1 for all virtual memory regions and leave the other pagetable unused. If TTBR1 support isn't enabled then fall back to the "legacy" virtual address space both kernel and user. Si

[PATCH 06/14] iommu: arm-smmu: Add side-band function to specific pasid callbacks

pagetable information to the client driver whenever a new pasid is created or destroyed Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c | 40 include/linux/arm-smmu.h | 18 ++ 2 files changed, 58 inse

[PATCH 07/14] drm/msm: Enable 64 bit mode by default

addresses so switch over now to prepare for using addresses above 4G for targets that support them. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 14 ++ drivers/gpu/drm/msm/msm_iommu.c | 2 +- 2 files changed, 15 inse

Re: [PATCH v7 3/6] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

On Wed, Feb 07, 2018 at 04:01:19PM +0530, Vivek Gautam wrote: > From: Sricharan R > > The smmu device probe/remove and add/remove master device callbacks > gets called when the smmu is not linked to its master, that is without > the context of the master device. So

Re: [Freedreno] [PATCH v7 3/6] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

On Fri, Feb 23, 2018 at 04:06:39PM +0530, Vivek Gautam wrote: > On Fri, Feb 23, 2018 at 5:22 AM, Jordan Crouse <jcro...@codeaurora.org> wrote: > > On Wed, Feb 07, 2018 at 04:01:19PM +0530, Vivek Gautam wrote: > >> From: Sricharan R <sricha...@codeaurora.org> > >

Re: [RFC PATCH v1 0/6] Resolve unwanted DMA backing with IOMMU

On Fri, Aug 03, 2018 at 04:43:41PM +0100, Robin Murphy wrote: > On 02/08/18 19:24, Dmitry Osipenko wrote: > >On Friday, 27 July 2018 20:16:53 MSK Dmitry Osipenko wrote: > >>On Friday, 27 July 2018 20:03:26 MSK Jordan Crouse wrote: > >>>On Fri, Jul 27, 2018 at 05:02:

Re: [RFC PATCH v1 0/6] Resolve unwanted DMA backing with IOMMU

On Fri, Jul 27, 2018 at 05:02:37PM +0100, Robin Murphy wrote: > On 27/07/18 15:10, Dmitry Osipenko wrote: > >On Friday, 27 July 2018 12:03:28 MSK Will Deacon wrote: > >>On Fri, Jul 27, 2018 at 10:25:13AM +0200, Joerg Roedel wrote: > >>>On Fri, Jul 27, 2018 at 02:16:18AM +0300, Dmitry Osipenko

Re: [PATCH 04/16] iommu: sva: Add support for private PASIDs

On Tue, Jul 17, 2018 at 12:21:03PM +0100, Jean-Philippe Brucker wrote: > Hi Jordan, > > Thanks for the patches, I finally got around testing them with SMMUv3. > It's an important feature, arguably more than SVA itself. I could pick > this one as part of the SVA series, what do you think? I'm

[VERY RFC 0/2] iommu: optionally skip attaching to a DMA domain

I am very much in the market for better ideas. [1] https://patchwork.freedesktop.org/series/38729/ Jordan Crouse (2): iommu: Gracefully allow drivers to not attach to a default domain iommu/arm-smmu: Add list of devices to opt out of DMA domains drivers/iommu/arm-smmu.c | 23 +

[PATCH 1/2] iommu: Gracefully allow drivers to not attach to a default domain

ork and the next domain to try to attach will take group->domain for itself and everything will proceed as normal. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/iommu.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/d

[PATCH 2/2] iommu/arm-smmu: Add list of devices to opt out of DMA domains

DMA ops. Later the client device in question can set up and attach their own domain. Signed-off-by: Jordan Crouse <jcro...@codeaurora.org> --- drivers/iommu/arm-smmu.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-

Re: [PATCH v2 1/5] drm/nouveau: tegra: Detach from ARM DMA/IOMMU mapping

On Wed, Apr 25, 2018 at 12:10:47PM +0200, Thierry Reding wrote: > From: Thierry Reding > > Depending on the kernel configuration, early ARM architecture setup code > may have attached the GPU to a DMA/IOMMU mapping that transparently uses > the IOMMU to back the DMA API.

Re: [PATCH 03/14] iommu: Create a base struct for io_mm

On Fri, Mar 02, 2018 at 12:25:48PM +, Jean-Philippe Brucker wrote: > Hi Jordan, > > Thank you for this, SMMUv3 and virtio-iommu need these SVA patches as well. > > On 21/02/18 22:59, Jordan Crouse wrote: > [...]> diff --git a/include/linux/iommu.h b/include/li

Re: [PATCH 04/14] iommu: sva: Add support for pasid allocation

On Fri, Mar 02, 2018 at 12:27:58PM +, Jean-Philippe Brucker wrote: > On 21/02/18 22:59, Jordan Crouse wrote: > [...] > > +int iommu_sva_alloc_pasid(struct iommu_domain *domain, struct device *dev) > > +{ > > + int ret, pasid; > > + struct io_pasid *io_pasid;

Re: [PATCH 02/14] iommu/arm-smmu: Add support for TTBR1

On Fri, Mar 02, 2018 at 05:57:21PM +, Robin Murphy wrote: > On 21/02/18 22:59, Jordan Crouse wrote: > >Allow a SMMU device to opt into allocating a TTBR1 pagetable. > > > >The size of the TTBR1 region will be the same as > >the TTBR0 size with the sign extension bi

Re: [RFC PATCH v3 10/10] iommu/sva: Add support for private PASIDs

be bound to > multiple devices. The mm_alloc() IOMMU op must now check if the mm > argument is NULL, in which case it should allocate io_pgtables instead of > binding to an mm. > > Signed-off-by: Jordan Crouse > Signed-off-by: Jean-Philippe Brucker > --- > Sadly this

Re: [RFC PATCH v3 10/10] iommu/sva: Add support for private PASIDs

On Wed, Oct 17, 2018 at 03:21:43PM +0100, Jean-Philippe Brucker wrote: > Hi Jordan, > > On 12/10/2018 15:32, Jordan Crouse wrote: > > On Thu, Sep 20, 2018 at 06:00:46PM +0100, Jean-Philippe Brucker wrote: > >> Provide an API for allocating PASIDs and populating them manual

Re: [RFC PATCH 0/6] Auxiliary IOMMU domains and Arm SMMUv3

On Mon, Oct 22, 2018 at 12:50:56PM +0100, Robin Murphy wrote: > On 22/10/2018 07:53, Tian, Kevin wrote: > >>From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com] > >>Sent: Saturday, October 20, 2018 2:12 AM > >> > >>This is a first prototype adding auxiliary domain support to Arm

Re: [RFC PATCH 0/6] Auxiliary IOMMU domains and Arm SMMUv3

On Fri, Oct 19, 2018 at 07:11:52PM +0100, Jean-Philippe Brucker wrote: > (2) Allocate a domain and attach it to the device. > > dom = iommu_domain_alloc() > iommu_attach_device(dom, dev) > > I still have concerns about this part, which are highlighted by the > messy changes

Re: [PATCH 1/1] iommu/arm-smmu: Add support to use Last level cache

On Tue, Jul 24, 2018 at 03:13:37PM +0530, Vivek Gautam wrote: > Hi Will, > > > On Wed, Jun 27, 2018 at 10:07 PM, Will Deacon wrote: > > Hi Vivek, > > > > On Tue, Jun 19, 2018 at 02:04:44PM +0530, Vivek Gautam wrote: > >> On Fri, Jun 15, 2018 at 10:22 PM, Will Deacon wrote: > >> > On Fri, Jun

Re: [PATCH] iommu: arm-smmu: Set SCTLR.HUPCF bit

On Mon, Nov 26, 2018 at 07:31:48PM +, Will Deacon wrote: > Hi Rob, > > On Tue, Nov 13, 2018 at 08:12:35AM -0500, Rob Clark wrote: > > On Tue, Nov 13, 2018 at 1:32 AM Will Deacon wrote: > > > On Fri, Nov 09, 2018 at 01:01:55PM -0500, Rob Clark wrote: > > > > On Mon, Oct 29, 2018 at 3:09 PM

[RFC PATCH v1 01/15] iommu: Add DOMAIN_ATTR_SPLIT_TABLES

Add a new domain attribute to enable split pagetable support for devices devices that support it. Signed-off-by: Jordan Crouse --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index e90da6b..3f2250b 100644 --- a/include

[RFC PATCH v1 02/15] iommu/arm-smmu: Add split pagetable support for arm-smmu-v2

Add support for a split pagetable (TTBR0/TTBR1) scheme for arm-smmu-v2. If split pagetables are enabled, create a pagetable for TTBR1 and set up the sign extension bit so that all IOVAs with that bit set are mapped and translated from the TTBR1 pagetable. Signed-off-by: Jordan Crouse

[RFC PATCH v1 05/15] iommu/arm-smmu: Add auxiliary domain support for arm-smmuv2

iova addresses in the pagetable. The driver/hardware can be used to switch the pagetable according to its own specific implementation. Signed-off-by: Jordan Crouse --- drivers/iommu/arm-smmu.c | 135 ++- 1 file changed, 111 insertions(+), 24 deletions

[RFC PATCH v1 03/15] iommu/io-pgtable: Allow TLB operations to be optional

configuration to be NULL just in case the caller accidentally calls for a flush with the wrong device. Signed-off-by: Jordan Crouse --- drivers/iommu/io-pgtable.h | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/io-pgtable.h b/drivers/iommu/io-pgtable.h

[RFC PATCH v1 04/15] iommu: Add DOMAIN_ATTR_PTBASE

Add an attribute to return the base address of the pagetable. This is used by auxiliary domains from arm-smmu to return the address of the pagetable to the leaf driver so that it can set the appropriate pagetable through it's own means. Signed-off-by: Jordan Crouse --- include/linux/iommu.h

[RFC PATCH v1 00/15] drm/msm: Per-instance pagetable support

, I want to make sure that this fits with the current thinking about how aux domains should look and feel. [1] https://patchwork.freedesktop.org/series/43447/ [2] https://patchwork.kernel.org/patch/10825061/ Jordan Crouse (15): iommu: Add DOMAIN_ATTR_SPLIT_TABLES iommu/arm-smmu: Add split

Re: [RFC PATCH v1 04/15] iommu: Add DOMAIN_ATTR_PTBASE

On Mon, Mar 18, 2019 at 10:53:21AM +0100, Joerg Roedel wrote: > On Fri, Mar 01, 2019 at 12:38:26PM -0700, Jordan Crouse wrote: > > Add an attribute to return the base address of the pagetable. This is used > > by auxiliary domains from arm-smmu to return the address o

Re: [PATCH] of/device: add blacklist for iommu dma_ops

> It shouldn't be a problem to hook something else up to the IOMMU > subsystem. Hopefully it's something that people are going to standardize > on. > > > 3) The automatic attach of DMA domain is also causing a different > >problem for us on the GPU side, preventing us from supporting per- > >

[PATCH v3 01/16] iommu/arm-smmu: Allow client devices to select direct mapping

-by: Jordan Crouse --- drivers/iommu/arm-smmu.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 5e54cc0..7537639 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1235,6 +1235,35

[PATCH v3 00/16] drm/msm: Per-instance pagetable support

. Jordan Crouse (16): iommu/arm-smmu: Allow client devices to select direct mapping iommu: Add DOMAIN_ATTR_SPLIT_TABLES iommu/io-pgtable-arm: Add support for AARCH64 split pagetables iommu/arm-smmu: Add support for DOMAIN_ATTR_SPLIT_TABLES iommu: Add DOMAIN_ATTR_PTBASE iommu/arm-smmu: Add

[PATCH v3 03/16] iommu/io-pgtable-arm: Add support for AARCH64 split pagetables

that the correct pagetable is selected based on the incoming iova but most of the heavy lifting is common. v3: New patch taking most of the TTBR1 specific code out of arm-smmu Signed-off-by: Jordan Crouse --- drivers/iommu/io-pgtable-arm.c | 261 + drivers

[PATCH v3 02/16] iommu: Add DOMAIN_ATTR_SPLIT_TABLES

Add a new domain attribute to enable split pagetable support for devices devices that support it. Signed-off-by: Jordan Crouse --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index a815cf6..a2f07cf 100644 --- a/include

[PATCH v3 04/16] iommu/arm-smmu: Add support for DOMAIN_ATTR_SPLIT_TABLES

If DOMAIN_ATTR_SPLIT_TABLES is specified for a domain pass ARM_64_LPAE_SPLIT_S1 to io_pgtable_ops to allocate and initialize TTBR0 and TTBR1 pagetables. v3: Moved all the pagetable specific work into io-pgtable-arm in previous patch Signed-off-by: Jordan Crouse --- drivers/iommu/arm-smmu.c

[PATCH v3 06/16] iommu/arm-smmu: Add auxiliary domain support for arm-smmuv2

addresses in the pagetable. The driver/hardware is used to switch the pagetable according to its own specific implementation. v3: Trivial update to reflect new pgtable ops situation Signed-off-by: Jordan Crouse --- drivers/iommu/arm-smmu.c | 125 +-- 1

[PATCH v3 05/16] iommu: Add DOMAIN_ATTR_PTBASE

Add an attribute to return the base address of the pagetable. This is used by auxiliary domains from arm-smmu to return the address of the pagetable to the leaf driver so that it can set the appropriate pagetable through it's own means. Signed-off-by: Jordan Crouse --- include/linux/iommu.h

Re: [PATCH v2 03/15] iommu/arm-smmu: Add split pagetable support for arm-smmu-v2

On Tue, May 21, 2019 at 07:18:32PM +0100, Robin Murphy wrote: > On 21/05/2019 17:13, Jordan Crouse wrote: > >Add support for a split pagetable (TTBR0/TTBR1) scheme for arm-smmu-v2. > >If split pagetables are enabled, create a pagetable for TTBR1 and set > >up the sign exte

[PATCH v2 03/15] iommu/arm-smmu: Add split pagetable support for arm-smmu-v2

Add support for a split pagetable (TTBR0/TTBR1) scheme for arm-smmu-v2. If split pagetables are enabled, create a pagetable for TTBR1 and set up the sign extension bit so that all IOVAs with that bit set are mapped and translated from the TTBR1 pagetable. Signed-off-by: Jordan Crouse

[PATCH v2 02/15] iommu: Add DOMAIN_ATTR_SPLIT_TABLES

Add a new domain attribute to enable split pagetable support for devices devices that support it. Signed-off-by: Jordan Crouse --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 4ef8bd5..204acd8 100644 --- a/include

[PATCH v2 05/15] iommu/arm-smmu: Add auxiliary domain support for arm-smmuv2

addresses in the pagetable. The driver/hardware is used to switch the pagetable according to its own specific implementation. Signed-off-by: Jordan Crouse --- drivers/iommu/arm-smmu.c | 133 +-- 1 file changed, 117 insertions(+), 16 deletions(-) diff --git

[PATCH v2 04/15] iommu: Add DOMAIN_ATTR_PTBASE

Add an attribute to return the base address of the pagetable. This is used by auxiliary domains from arm-smmu to return the address of the pagetable to the leaf driver so that it can set the appropriate pagetable through it's own means. Signed-off-by: Jordan Crouse --- include/linux/iommu.h

[PATCH v2 01/15] iommu/arm-smmu: Allow IOMMU enabled devices to skip DMA domains

domain of its own. Signed-off-by: Jordan Crouse --- drivers/iommu/arm-smmu.c | 42 ++ drivers/iommu/iommu.c| 29 +++-- include/linux/iommu.h| 3 +++ 3 files changed, 68 insertions(+), 6 deletions(-) diff --git a/drivers

[PATCH v2 00/15] drm/msm: Per-instance pagetable support

and drm/msm: Add support to create target specific address spaces can be merged to the msm-next tree without dependencies on the IOMMU changes. Only the last three patches will require coordination between the two areas. Jordan Crouse (15): iommu/arm-smmu: Allow IOMMU enabled devices to skip DMA

Re: [PATCH v2 01/15] iommu/arm-smmu: Allow IOMMU enabled devices to skip DMA domains

On Tue, May 21, 2019 at 06:43:34PM +0100, Robin Murphy wrote: > On 21/05/2019 17:13, Jordan Crouse wrote: > >Allow IOMMU enabled devices specified on an opt-in list to create a > >default identity domain for a new IOMMU group and bypass the DMA > >domain created by the IO

  1   2   3   4   >