On Mon, Jul 04, 2022 at 06:00:15PM +0800, Tinghan Shen wrote:
> Extract duplicated properties and support more levels of power
> domain nodes.
>
> This change fix following error when do dtbs_check,
> arch/arm64/boot/dts/mediatek/mt8195-evb.dtb: power-controller:
>
On Mon, Jul 04, 2022 at 06:00:13PM +0800, Tinghan Shen wrote:
> mt8195 infra iommu has max 5 interrupts.
>
> Signed-off-by: Tinghan Shen
> ---
> .../devicetree/bindings/iommu/mediatek,iommu.yaml| 12 +++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git
On Tue, 05 Jul 2022 15:06:52 +0200, Thierry Reding wrote:
> From: Thierry Reding
>
> This adds the "iommu-addresses" property to reserved-memory nodes, which
> allow describing the interaction of memory regions with IOMMUs. Two use-
> cases are supported:
>
> 1. Static mappings can be
On Thu, Jun 30, 2022 at 5:11 PM Saravana Kannan wrote:
>
> On Mon, Jun 27, 2022 at 2:10 AM Tony Lindgren wrote:
> >
> > * Saravana Kannan [220623 08:17]:
> > > On Thu, Jun 23, 2022 at 12:01 AM Tony Lindgren wrote:
> > > >
> > > > * Saravana Kannan [220622 19:05]:
> > > > > On Tue, Jun 21,
On Thu, Jun 23, 2022 at 12:04:21PM +0200, sascha hauer wrote:
> On Thu, Jun 23, 2022 at 01:03:43AM -0700, Saravana Kannan wrote:
> > Commit 71066545b48e ("driver core: Set fw_devlink.strict=1 by default")
> > enabled iommus and dmas dependency enforcement by default. On some
> > systems, this
On Fri, Jun 24, 2022 at 11:26 AM Rob Herring wrote:
>
> On Tue, 21 Jun 2022 18:10:14 +0300, Mikko Perttunen wrote:
> > From: Thierry Reding
> >
> > Convert the Tegra host1x controller bindings from the free-form text
> > format to json-schema.
> >
> >
On Tue, 21 Jun 2022 18:10:14 +0300, Mikko Perttunen wrote:
> From: Thierry Reding
>
> Convert the Tegra host1x controller bindings from the free-form text
> format to json-schema.
>
> This also adds the missing display-hub DT bindings that were not
> previously documented.
d, 1 insertion(+)
>
Acked-by: Rob Herring
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rant DMA
> ops"
>
> Changes V3 -> V4:
>- add Stefano's R-b
>- remove underscore in iommu node name
>- remove consumer example virtio@3000
>- update text for two descriptions
> ---
> .../devicetree/bindings/iommu/xen,grant-d
On Mon, May 30, 2022 at 08:03:26PM +0200, Fabien Parent wrote:
> Add IOMMU binding documentation for the MT8365 SoC.
>
> Signed-off-by: Fabien Parent
> ---
> .../bindings/iommu/mediatek,iommu.yaml| 2 +
> include/dt-bindings/memory/mt8365-larb-port.h | 96 +++
> 2 files
On Fri, May 27, 2022 at 11:28:59PM +0200, Konrad Dybcio wrote:
> From: AngeloGioacchino Del Regno
>
> Some IOMMUs associated with some TZ firmwares may support switching
> to the AArch64 pagetable format by sending a "set pagetable format"
> scm command indicating the IOMMU secure ID and the
On Wed, May 25, 2022 at 10:31:46AM +0900, Nobuhiro Iwamatsu wrote:
> Add documentation for the binding of Toshiba Visconti5 SoC's IOMMU.
>
> Signed-off-by: Nobuhiro Iwamatsu
> ---
> .../bindings/iommu/toshiba,visconti-atu.yaml | 62 +++
> 1 file changed, 62 insertions(+)
>
On Wed, May 18, 2022 at 01:42:20PM +0200, AngeloGioacchino Del Regno wrote:
> Il 18/05/22 13:29, Matthias Brugger ha scritto:
> >
> >
> > On 18/05/2022 12:04, AngeloGioacchino Del Regno wrote:
> > > Add properties "mediatek,infracfg" and "mediatek,pericfg" to let the
> > > mtk_iommu driver
6795-larb-port.h | 96 +++
> 2 files changed, 100 insertions(+)
> create mode 100644 include/dt-bindings/memory/mt6795-larb-port.h
>
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On Wed, May 18, 2022 at 12:07:58PM +0100, Robin Murphy wrote:
> On 2022-05-18 09:29, AngeloGioacchino Del Regno wrote:
> > Il 17/05/22 16:12, Robin Murphy ha scritto:
> > > On 2022-05-17 14:21, AngeloGioacchino Del Regno wrote:
> > > > This driver will get support for more SoCs and the list of
On Wed, May 18, 2022 at 10:14:43AM +0200, AngeloGioacchino Del Regno wrote:
> Il 18/05/22 03:41, Rob Herring ha scritto:
> > On Tue, May 17, 2022 at 03:21:06PM +0200, AngeloGioacchino Del Regno wrote:
> > > Both MT2712 and MT8173 got a mediatek,infracfg phandle: add that to
node in upstream mt8195 devicetrees
> yet.
>
> .../devicetree/bindings/iommu/mediatek,iommu.yaml | 10 ++
> 1 file changed, 10 insertions(+)
>
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ee.
Wait, what? If there's only one possible node that can match, I prefer
the 'old way'. Until we implemented a phandle cache, searching the
entire tree was how phandle lookups worked too, so not any better.
But if this makes things more consistent,
Acked-by: Ro
> v3:
> * New patch
> v4:
> * Remove memory-contexts subnode.
> ---
> .../bindings/display/tegra/nvidia,tegra20-host1x.yaml| 5 +
> 1 file changed, 5 insertions(+)
>
Acked-by: Rob Herring
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iommu mai
6795-larb-port.h | 96 +++
> 2 files changed, 99 insertions(+)
> create mode 100644 include/dt-bindings/memory/mt6795-larb-port.h
>
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On Fri, May 13, 2022 at 12:26 PM Saravana Kannan wrote:
>
> On Fri, May 13, 2022 at 6:58 AM Rob Herring wrote:
> >
> > On Fri, Apr 29, 2022 at 5:09 PM Saravana Kannan
> > wrote:
> > >
> > > The deferred probe timer that's used for this curren
On Fri, Apr 29, 2022 at 5:09 PM Saravana Kannan wrote:
>
> The deferred probe timer that's used for this currently starts at
> late_initcall and runs for driver_deferred_probe_timeout seconds. The
> assumption being that all available drivers would be loaded and
> registered before the timer
On Thu, 12 May 2022 21:00:48 +0200, Thierry Reding wrote:
> From: Thierry Reding
>
> This adds the "iommu-addresses" property to reserved-memory nodes, which
> allow describing the interaction of memory regions with IOMMUs. Two use-
> cases are supported:
>
> 1. Static mappings can be
ime and just build the list in whatever natural order the DT had.
>
> Signed-off-by: Robin Murphy
> ---
>
> v2: Clean up now-unused local variable
>
> drivers/iommu/dma-iommu.c | 13 -
> drivers/pci/of.c | 8 +---
> 2 files changed, 13 i
dings/mmc/sdhci-msm.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
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There's no need to show consumer side in provider examples. The ones
used here are undocumented or undocumented in schemas which results in
warnings.
Signed-off-by: Rob Herring
---
.../devicetree/bindings/iommu/mediatek,iommu.yaml | 10 --
.../devicetree/bindings/iommu/samsung
On Tue, Mar 22, 2022 at 12:27 PM Robin Murphy wrote:
>
> Originally, creating the dma_ranges resource list in pre-sorted fashion
> was the simplest and most efficient way to enforce the order required by
> iova_reserve_pci_windows(). However since then at least one PCI host
> driver is now
On Wed, Mar 23, 2022 at 5:15 PM dann frazier wrote:
>
> On Wed, Mar 23, 2022 at 09:49:04AM +, Marc Zyngier wrote:
> > On Tue, 22 Mar 2022 17:27:36 +,
> > Robin Murphy wrote:
> > >
> > > Originally, creating the dma_ranges resource list in pre-sorted fashion
> > > was the simplest and
/asm/fadump-internal.h | 5 -
> arch/powerpc/kernel/fadump.c | 2 +-
> drivers/of/of_reserved_mem.c | 9 +++--
Acked-by: Rob Herring
> include/linux/cma.h| 9 +
> kernel/dma/contiguous.c
cetree/bindings/iommu/renesas,ipmmu-vmsa.yaml | 4
> 1 file changed, 4 insertions(+)
>
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On Wed, Jan 26, 2022 at 01:24:32PM +0100, Geert Uytterhoeven wrote:
> Remove trailing whitespace and break overly long lines.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> .../devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
+
> 2 files changed, 221 insertions(+)
> create mode 100644 include/dt-bindings/memory/mt8186-memory-port.h
>
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On Wed, Jan 19, 2022 at 9:22 AM Arnaud POULIQUEN
wrote:
>
> Hello Rob,
>
> On 1/19/22 2:50 AM, Rob Herring wrote:
> > The 'phandle-array' type is a bit ambiguous. It can be either just an
> > array of phandles or an array of phandles plus args. Many schemas for
> > p
On Wed, Jan 19, 2022 at 4:35 AM Vladimir Oltean wrote:
>
> On Tue, Jan 18, 2022 at 07:50:38PM -0600, Rob Herring wrote:
> > The 'phandle-array' type is a bit ambiguous. It can be either just an
> > array of phandles or an array of phandles plus args. Many schemas for
> >
.@vger.kernel.org
Cc: linux-wirel...@vger.kernel.org
Cc: linux-...@lists.infradead.org
Cc: linux-g...@vger.kernel.org
Cc: linux-ri...@lists.infradead.org
Cc: linux-remotep...@vger.kernel.org
Cc: alsa-de...@alsa-project.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../dev
On Sat, Jan 08, 2022 at 07:41:42PM +0100, David Heidelberg wrote:
> Convert Qualcomm IOMMU v0 implementation to yaml format.
>
> Signed-off-by: David Heidelberg
> ---
> v2:
> - fix wrong path in binding $id
> - comment qcom,mdp4 node example (we don't want to validate it yet)
>
> v3:
> - I
On Sat, Dec 25, 2021 at 08:35:55PM +0100, David Heidelberg wrote:
> Convert Qualcomm IOMMU v0 implementation to yaml format.
>
> Signed-off-by: David Heidelberg
> ---
> v2:
> - fix wrong path in binding $id
> - comment qcom,mdp4 node example (we don't want to validate it yet)
>
>
On Fri, 24 Dec 2021 17:50:14 +0100, David Heidelberg wrote:
> Convert Qualcomm IOMMU v0 implementation to yaml format.
>
> Signed-off-by: David Heidelberg
> ---
> .../bindings/iommu/msm,iommu-v0.txt | 64 -
> .../bindings/iommu/qcom,iommu-v0.yaml | 96
t; ---
> Changes in v2:
> - clarify why the new nvidia,memory-controller property is required
>
> .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +
> 1 file changed, 17 insertions(+)
>
Reviewed-by: Rob Herring
__
; 2 files changed, 6 insertions(+), 1 deletion(-)
>
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On Mon, Dec 13, 2021 at 02:48:52PM +0800, Yong Wu wrote:
> On Fri, 2021-12-03 at 17:34 -0600, Rob Herring wrote:
> > On Fri, 03 Dec 2021 14:40:24 +0800, Yong Wu wrote:
> > > If a platform's larb support gals, there will be some larbs have a
> > > one
> > > more
On Wed, 01 Dec 2021 13:09:42 +0530, Vinod Koul wrote:
> Add the SoC specific compatible for SM8450 implementing
> arm,mmu-500.
>
> Signed-off-by: Vinod Koul
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
On Wed, Dec 1, 2021 at 9:57 AM Jon Hunter wrote:
>
> The dt_binding_check currently issues the following warnings for the
dtbs_check
> Tegra186 and Tegra194 SMMUs ...
>
> arch/arm64/boot/dts/nvidia/tegra186-p2771-.dt.yaml: iommu@1200:
> 'nvidia,memory-controller' does not match any
On Fri, 03 Dec 2021 14:40:24 +0800, Yong Wu wrote:
> If a platform's larb support gals, there will be some larbs have a one
> more "gals" clock while the others still only need "apb"/"smi" clocks.
> then the minItems is 2 and the maxItems is 3.
>
> Fixes: 27bb0e42855a ("dt-bindings: memory:
| 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring
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ff-by: Thierry Reding
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
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On Fri, Nov 12, 2021 at 02:12:28PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> On NVIDIA SoC's the ARM SMMU needs to interact with the memory
> controller in order to map memory clients to the corresponding stream
> IDs. Document how the nvidia,memory-controller property can be used
On Tue, 23 Nov 2021 19:21:03 +0800, Hsin-Yi Wang wrote:
> Add a io-tlb-segsize property that each restricted-dma-pool can set its
> own io_tlb_segsize since some use cases require slabs larger than default
> value (128).
>
> Signed-off-by: Hsin-Yi Wang
> ---
>
On Tue, Nov 16, 2021 at 5:52 AM Jean-Philippe Brucker
wrote:
>
> Add binding for the Arm SMMUv3 PMU. Each node represents a PMCG, and is
> placed as a sibling node of the SMMU. Although the PMCGs registers may
> be within the SMMU MMIO region, they are separate devices, and there can
> be
On Tue, 16 Nov 2021 11:35:36 +, Jean-Philippe Brucker wrote:
> Add binding for the Arm SMMUv3 PMU. Each node represents a PMCG, and is
> placed as a sibling node of the SMMU. Although the PMCGs registers may
> be within the SMMU MMIO region, they are separate devices, and there can
> be
On Thu, Oct 28, 2021 at 04:39:40PM -0500, Rob Herring wrote:
> On Thu, 21 Oct 2021 01:17:00 +0200, David Heidelberg wrote:
> > Add missing compatible for the SDX55 SoC.
> >
> > Signed-off-by: David Heidelberg
> > ---
> > Documentation/devicetree/bindings/iomm
On Thu, 21 Oct 2021 01:17:00 +0200, David Heidelberg wrote:
> Add missing compatible for the SDX55 SoC.
>
> Signed-off-by: David Heidelberg
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Applied, thanks!
ock.
>
> Signed-off-by: Yong Wu
> ---
> change note: add "else mediatek,smi: false".
> ---
> .../mediatek,smi-common.yaml | 28 +++
> 1 file changed, 28 insertions(+)
>
Reviewed-by: Rob Herring
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On Fri, Sep 3, 2021 at 10:36 AM Thierry Reding wrote:
>
> On Fri, Sep 03, 2021 at 09:36:33AM -0500, Rob Herring wrote:
> > On Fri, Sep 3, 2021 at 8:52 AM Thierry Reding
> > wrote:
> > >
> > > On Fri, Sep 03, 2021 at 08:20:55AM -0500, Rob Herring wrote:
&g
On Wed, 01 Sep 2021 19:27:04 +0900, Yoshihiro Shimoda wrote:
> Add support for r8a779a0 (R-Car V3U).
>
> Signed-off-by: Yoshihiro Shimoda
> ---
> Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
On Fri, Sep 3, 2021 at 8:52 AM Thierry Reding wrote:
>
> On Fri, Sep 03, 2021 at 08:20:55AM -0500, Rob Herring wrote:
> > On Wed, Sep 1, 2021 at 9:13 AM Thierry Reding
> > wrote:
> > >
> > > On Fri, Jul 02, 2021 at 05:16:25PM +0300, Dmitry Osipenko wrot
2021 at 06:54:55PM +0200, Thierry Reding wrote:
> > >>> On Thu, May 20, 2021 at 05:03:06PM -0500, Rob Herring wrote:
> > >>>> On Fri, Apr 23, 2021 at 06:32:30PM +0200, Thierry Reding wrote:
> > >>>>> From: Thierry Reding
> > >>
On Fri, 20 Aug 2021 22:29:04 +0200, Konrad Dybcio wrote:
> Add the SoC specific compatible for SM6350 implementing
> arm,mmu-500.
>
> Signed-off-by: Konrad Dybcio
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
ory/mt8195-memory-port.h| 18 ++
> include/dt-bindings/memory/mtk-memory-port.h | 2 ++
> 3 files changed, 32 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring
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On Tue, Aug 10, 2021 at 04:08:48PM +0800, Yong Wu wrote:
> Add the binding for smi-sub-common. The SMI block diagram like this:
>
> IOMMU
> | |
> smi-common
> --
> | |
> larb0 larb7 <-max is 8
>
> The smi-common connects
to of/device.c (Rob)
> * Use IS_ENABLED() instead of 'static inline' stub (Rob)
>
> This applies on Konrad's devel/for-linus-5.15 branch in swiotlb.git
>
> Cheers,
>
> Will
>
> Cc: Claire Chang
> Cc: Konrad Rzeszutek Wilk
> Cc: Christoph Hellwig
> Cc: Rob Herrin
g options off.
> Cc: Claire Chang
> Cc: Konrad Rzeszutek Wilk
> Cc: Robin Murphy
> Cc: Christoph Hellwig
> Cc: Rob Herring
> Signed-off-by: Will Deacon
> ---
> drivers/of/address.c| 8
> drivers/of/device.c | 2 +-
> drivers/of/of_private.
On Fri, Jul 23, 2021 at 3:40 PM Atish Patra wrote:
>
> Currently, linux,dma-default is used to reserve a global non-coherent pool
> to allocate memory for dma operations. This can be useful for RISC-V as
> well as the ISA specification doesn't specify a method to modify PMA
> attributes or page
On Thu, Jul 15, 2021 at 08:12:00PM +0800, Yong Wu wrote:
> Add the binding for smi-sub-common. The SMI block diagram like this:
>
> IOMMU
> | |
> smi-common
> --
> | |
> larb0 larb7 <-max is 8
>
> The smi-common connects
| ...
> larb0 larb2 ...larb1 larb3...
>
> Signed-off-by: Yong Wu
> ---
> .../bindings/memory-controllers/mediatek,smi-common.yaml| 6 +-
> .../bindings/memory-controllers/mediatek,smi-larb.yaml | 3 +++
> 2 files ch
On Fri, Jul 2, 2021 at 8:05 AM Dmitry Osipenko wrote:
>
> 23.04.2021 19:32, Thierry Reding пишет:
> > +void of_iommu_get_resv_regions(struct device *dev, struct list_head *list)
> > +{
> > + struct of_phandle_iterator it;
> > + int err;
> > +
> > + of_for_each_phandle(, err,
On Wed, Jun 30, 2021 at 10:34:42AM +0800, Yong Wu wrote:
> In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters
> mainly are PCIe and USB. Different with MM IOMMU, all these masters
> connect with IOMMU directly, there is no mediatek,larbs property for
> infra IOMMU.
>
> Another
atiable string.
>
> Signed-off-by: Yong Wu
> ---
> .../bindings/iommu/mediatek,iommu.yaml| 7 +
> .../dt-bindings/memory/mt8195-memory-port.h | 390 ++
> 2 files changed, 397 insertions(+)
> create mode 100644 include/dt-bindings/memory/mt8195-me
Pinchart
Cc: linux-...@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-...@lists.infradead.org
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Cc: linux-...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/clock/brcm,iproc-clocks.yaml | 1 -
.../devicetree/bindings/iommu
On Tue, Jun 22, 2021 at 11:56 PM Krzysztof Kozlowski
wrote:
>
> On Mon, 21 Jun 2021 16:00:36 +0200, Thierry Reding wrote:
> > Commit 4287861dca9d ("dt-bindings: arm-smmu: Add Tegra186 compatible
> > string") introduced a jsonschema syntax error as a result of a rebase
> > gone wrong. Fix it.
>
>
; 1 file changed, 1 insertion(+)
>
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On Tue, Jun 22, 2021 at 2:10 PM Doug Anderson wrote:
>
> Hi,
>
> On Tue, Jun 22, 2021 at 1:06 PM Saravana Kannan wrote:
> >
> > On Tue, Jun 22, 2021 at 1:02 PM Rob Herring wrote:
> > >
> > > On Tue, Jun 22, 2021 at 09:06:02AM -0700, Doug Anderson wrot
On Tue, Jun 22, 2021 at 09:06:02AM -0700, Doug Anderson wrote:
> Hi,
>
> On Tue, Jun 22, 2021 at 4:35 AM Robin Murphy wrote:
> >
> > Hi Doug,
> >
> > On 2021-06-22 00:52, Douglas Anderson wrote:
> > >
> > > This patch attempts to put forward a proposal for enabling non-strict
> > > DMA on a
87861dca9d ("dt-bindings: arm-smmu: Add Tegra186 compatible string")
> Reported-by: Rob Herring
> Signed-off-by: Thierry Reding
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
Acked-by: Rob Her
On Tue, Jun 22, 2021 at 2:17 AM Geert Uytterhoeven wrote:
>
> Hi Rob,
>
> On Tue, Jun 15, 2021 at 9:16 PM Rob Herring wrote:
> > If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
> > same size as the list is redundant and can be dropped. No
On Thu, Jun 17, 2021 at 10:06 AM Suman Anna wrote:
>
> Hi Rob,
>
> On 6/15/21 2:15 PM, Rob Herring wrote:
> > If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
> > same size as the list is redundant and can be dropped. Note that is DT
>
Alessandro Zummo
Cc: Alexandre Belloni
Cc: Greg Kroah-Hartman
Cc: Mark Brown
Cc: Zhang Rui
Cc: Daniel Lezcano
Cc: Wim Van Sebroeck
Cc: Guenter Roeck
Signed-off-by: Rob Herring
---
.../devicetree/bindings/ata/nvidia,tegra-ahci.yaml | 1 -
.../devicetree/bindings/clock/allwinner,sun
g = <0x82f8 0x4000>;
> + interrupts = <1 781 4>;
> + #iommu-cells = <1>;
> +};
> +
> +master1 {
> + iommus = <&{/dart1} 0>;
/dart1 is a path, but 'dart1' is a label. You need '' (or
'&{/iommu@82f8}' but that doesn't reall
-Philippe Brucker
Cc: Frank Rowand
Cc: linux-arm-ker...@lists.infradead.org
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Rob Herring
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 -
drivers/iommu/arm/arm-smmu/arm-smmu.c | 1 -
drivers/iommu/arm/arm-smmu/qcom_iommu.c | 1
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Rob Herring
---
drivers/iommu/of_iommu.c | 68
include/linux/of_iommu.h | 17 ++
2 files changed, 3 insertions(+), 82 deletions(-)
diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iom
U linkage")
> Signed-off-by: Xingang Wang
> ---
> drivers/iommu/of_iommu.c | 1 -
> drivers/pci/of.c | 8 +++-
> 2 files changed, 7 insertions(+), 2 deletions(-)
Reviewed-by: Rob Herring
> diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
> index a9d2df0
On Fri, Apr 23, 2021 at 06:32:30PM +0200, Thierry Reding wrote:
> From: Thierry Reding
>
> Reserved memory region phandle references can be accompanied by a
> specifier that provides additional information about how that specific
> reference should be treated.
>
> One use-case is to mark a
On Thu, May 20, 2021 at 2:28 AM Wang Xingang wrote:
>
> From: Xingang Wang
>
> When booting with devicetree, the pci_request_acs() is called after the
> enumeration and initialization of PCI devices, thus the ACS is not
> enabled. And ACS should be enabled when IOMMU is detected for the
> PCI
On Mon, May 17, 2021 at 01:17:05PM +, Wang Xingang wrote:
> From: Xingang Wang
>
> When booting with devicetree, the pci_request_acs() is called after the
> enumeration and initialization of PCI devices, thus the ACS is not
> enabled. This patch add check for IOMMU in of_core_init(), and
rtions(+), 38 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
> create mode 100644
> Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
>
Reviewed-by: Rob Herring
___
iommu mailing list
iommu@
;
> version 2:
> - Add power-domains property
>
> .../devicetree/bindings/iommu/rockchip,iommu.yaml | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring
___
iommu mailing l
On Tue, May 04, 2021 at 10:41:21AM +0200, Benjamin Gaignard wrote:
> Convert Rockchip IOMMU to DT schema
>
> Signed-off-by: Benjamin Gaignard
> ---
> version 2:
> - Change maintainer
> - Change reg maxItems
> - Change interrupt maxItems
>
> .../bindings/iommu/rockchip,iommu.txt | 38
On Thu, Apr 22, 2021 at 04:16:00PM +0200, Benjamin Gaignard wrote:
> Add compatible for the second version of IOMMU hardware block.
> RK356x IOMMU can also be link to a power domain.
>
> Signed-off-by: Benjamin Gaignard
> ---
> version 2:
> - Add power-domains property
>
>
On Thu, Apr 22, 2021 at 02:16:53PM -0300, Ezequiel Garcia wrote:
> (Adding Kever)
>
> Hi Benjamin,
>
> Thanks a lot for working on this, it looks amazing. Together with the great
> work
> that Rockchip is doing, it seems RK3566/RK3568 will have decent support very
> soon.
>
> One comment
On Sun, Mar 21, 2021 at 05:00:50PM +0100, Mark Kettenis wrote:
> > Date: Sat, 20 Mar 2021 15:19:33 +
> > From: Sven Peter
> >
> > Hi,
> >
> > After Hector's initial work [1] to bring up Linux on Apple's M1 it's time to
> > bring up more devices. Most peripherals connected to the SoC are
On Sat, 20 Mar 2021 15:20:08 +, Sven Peter wrote:
> DART (Device Address Resolution Table) is the iommu found on Apple
> ARM SoCs such as the M1.
>
> Signed-off-by: Sven Peter
> ---
> .../bindings/iommu/apple,t8103-dart.yaml | 82 +++
> MAINTAINERS
On Wed, Mar 10, 2021 at 9:08 AM Will Deacon wrote:
>
> Hi Claire,
>
> On Tue, Feb 09, 2021 at 02:21:30PM +0800, Claire Chang wrote:
> > Introduce the new compatible string, restricted-dma-pool, for restricted
> > DMA. One can specify the address and length of the restricted DMA memory
> > region
On Fri, Feb 5, 2021 at 1:21 AM Chunyan Zhang wrote:
>
> Hi Rob,
>
> On Fri, 5 Feb 2021 at 07:25, Rob Herring wrote:
> >
> > On Wed, Feb 03, 2021 at 05:07:26PM +0800, Chunyan Zhang wrote:
> > > From: Chunyan Zhang
> > >
> > > This iomm
On Wed, Feb 03, 2021 at 05:07:26PM +0800, Chunyan Zhang wrote:
> From: Chunyan Zhang
>
> This iommu module can be used by Unisoc's multimedia devices, such as
> display, Image codec(jpeg) and a few signal processors, including
> VSP(video), GSP(graphic), ISP(image), and CPP(camera pixel
On Tue, Feb 02, 2021 at 04:33:56PM -0800, Stephen Boyd wrote:
> Quoting Rob Herring (2021-02-02 12:55:42)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clocks.yaml
> >
> > b/Documentation/devicetree/bindings/clock/al
On Wed, Feb 03, 2021 at 09:01:23AM +0100, Geert Uytterhoeven wrote:
> Hi Rob,
>
> On Tue, Feb 2, 2021 at 9:55 PM Rob Herring wrote:
> > Properties in if/then schemas weren't getting checked by the meta-schemas.
> > Enabling meta-schema checks finds several errors.
> &g
hoeven
Cc: Linus Walleij
Cc: Daniel Lezcano
Cc: linux-cry...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: linux-l...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: linux-g...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/crypto/allwinner,sun8i-ce.
c: linux-g...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-watch...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../bindings/clock/allwinner,sun9i-a80-usb-clocks.yaml| 2 +-
Documentation/devicetree/bindings/clock/arm,syscon-icst
be conditioned on !renesas,ipmmu-vmsa.
Cc: Joerg Roedel
Cc: Will Deacon
Cc: Yoshihiro Shimoda
Cc: iommu@lists.linux-foundation.org
Signed-off-by: Rob Herring
---
.../bindings/iommu/renesas,ipmmu-vmsa.yaml | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git
; consumer devices.
>
> [1]
> https://lore.kernel.org/linux-arm-kernel/5c7946f3-b56e-da00-a750-be097c7ce...@arm.com/
>
> CC: Rob Herring
> CC: Frank Rowand
> Fixes: e0d072782c73 ("dma-mapping: introduce DMA range map, supplanting
> dma_pfn_offset"),
> S
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