-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h
b/drivers/iommu/amd/amd_iommu_types.h
index 30a5d412255a..427484c45589 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b
Move the function to header file to allow inclusion in other files.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 +
drivers/iommu/amd/iommu.c | 10 --
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/amd
Add initial hook up code to implement generic IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/Kconfig | 1 +
drivers/iommu/amd/Makefile | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 32 +
drivers/iommu/amd/io_pgtable.c
. (patch 2/13)
- Move amd_iommu_setup_io_pgtable_ops to iommu.c instead of io_pgtable.c
patch 13/13)
Suravee Suthikulpanit (13):
iommu/amd: Re-define amd_iommu_domain_encode_pgtable as inline
iommu/amd: Prepare for generic IO page table framework
iommu/amd: Move pt_root to to struct
Make use of the new struct amd_io_pgtable in preparation to remove
the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/iommu.c | 25 ++---
2 files changed, 11 insertions(+), 15 deletions(-)
diff
To better organize the data structure since it contains IO page table
related information.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 2 +-
drivers/iommu/amd/iommu.c | 2 +-
3 files changed, 3 insertions
And move declaration to header file so that they can be included across
multiple files. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 3 +++
drivers/iommu/amd/iommu.c | 39 +--
2 files changed, 22
) to
Completion Wait Write-Back (CWWB) Range Limit register
and requires the IOMMU CWWB semaphore base and range to be programmed
in the register offset 0020h and 0028h accordingly.
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 1 +
drivers/iommu/amd
, which is incremented for every completion wait command.
Since this new scheme is also compatible with non-SNP mode,
generalize the driver to use 4K page for completion-wait semaphore in
both modes.
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 3
IOMMU SNP support introduces two new IOMMU events:
* RMP Page Fault event
* RMP Hardware Error event
Hence, add reporting functions for these events.
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 2 +
drivers/iommu/amd/iommu.c
-and-more.pdf
Changes from V1: (https://lkml.org/lkml/2020/9/16/455)
- Patch 2/3: Fix up per Joerg's comments
Thank you,
Suravee
Suravee Suthikulpanit (3):
iommu: amd: Use 4K page for completion wait write-back semaphore
iommu: amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR
iommu: amd: Re
On 9/24/20 5:34 PM, Joerg Roedel wrote:
Hi Suravee,
On Wed, Sep 23, 2020 at 10:14:29AM +, Suravee Suthikulpanit wrote:
The framework allows callable implementation of IO page table.
This allows AMD IOMMU driver to switch between different types
of AMD IOMMU page tables (e.g. v1 vs. v2
On 9/18/20 4:31 PM, Joerg Roedel wrote:
Hi Suravee,
On Wed, Sep 16, 2020 at 01:55:48PM +, Suravee Suthikulpanit wrote:
+static void amd_iommu_report_rmp_hw_error(volatile u32 *event)
+{
+ struct pci_dev *pdev;
+ struct iommu_dev_data *dev_data = NULL;
+ int devid
Robin,
On 9/24/20 7:25 PM, Robin Murphy wrote:
+struct io_pgtable_ops *amd_iommu_setup_io_pgtable_ops(struct iommu_dev_data
*dev_data,
+ struct protection_domain *domain)
+{
+domain->iop.pgtbl_cfg = (struct io_pgtable_cfg) {
+.pgsize_bitmap=
lso be affected if cmpxchg16b
is not supported (which is unprecedented for AMD processors w/ IOMMU).
Cc: sta...@vger.kernel.org
Fixes: 880ac60e2538 ("iommu/amd: Introduce interrupt remapping ops structure")
Reported-by: Sean Osborne
Signed-off-by: Suravee Suthikulpanit
Tested-by: Erik Rockst
Joerg,
On 10/1/20 7:59 PM, Joerg Roedel wrote:
On Thu, Sep 24, 2020 at 05:50:37PM +0700, Suravee Suthikulpanit wrote:
On 9/24/20 5:34 PM, Joerg Roedel wrote:
Hi Suravee,
On Wed, Sep 23, 2020 at 10:14:29AM +, Suravee Suthikulpanit wrote:
The framework allows callable implementation
I found an issue w/ this series. Please ignore. I'll send out V3.
Regards,
Suravee
On 10/2/20 7:28 PM, Suravee Suthikulpanit wrote:
The framework allows callable implementation of IO page table.
This allows AMD IOMMU driver to switch between different types
of AMD IOMMU page tables (e.g. v1 vs
struct iommu_flush_ops. (patch 2/13)
- Move amd_iommu_setup_io_pgtable_ops to iommu.c instead of io_pgtable.c
patch 13/13)
Suravee Suthikulpanit (14):
iommu/amd: Re-define amd_iommu_domain_encode_pgtable as inline
iommu/amd: Prepare for generic IO page table framework
iommu/amd: Move
There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c
index 6c063d2c8bf0
Since the IO page table root and mode parameters have been moved into
the struct amd_io_pg, the function is no longer needed. Therefore,
remove it along with the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 4 ++--
drivers/iommu/amd
Add initial hook up code to implement generic IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/Kconfig | 1 +
drivers/iommu/amd/Makefile | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 35 +++
drivers/iommu/amd
Make use of the new struct amd_io_pgtable in preparation to remove
the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/iommu.c | 25 ++---
2 files changed, 11 insertions(+), 15 deletions(-)
diff
Move the function to header file to allow inclusion in other files.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 +
drivers/iommu/amd/iommu.c | 10 --
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/amd
To better organize the data structure since it contains IO page table
related information.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 2 +-
drivers/iommu/amd/iommu.c | 2 +-
3 files changed, 3 insertions
Preparing to migrate to use IO page table framework.
There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 18 ++
drivers/iommu/amd/io_pgtable.c | 473
drivers/iommu/amd/iommu.c | 476
And move declaration to header file so that they can be included across
multiple files. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 3 +++
drivers/iommu/amd/iommu.c | 39 +--
2 files changed, 22
Introduce amd_iommu_free_pgtable helper function, which consolidates
logic for freeing page table.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/io_pgtable.c | 12 +++-
drivers/iommu/amd/iommu.c | 19 ++-
3 files
This implements iova_to_phys for AMD IOMMU v1 pagetable,
which will be used by the IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 22 ++
drivers/iommu/amd/iommu.c | 16 +---
2 files changed, 23 insertions
These implement map and unmap for AMD IOMMU v1 pagetable, which
will be used by the IO pagetable framework.
Also clean up unused extern function declarations.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 -
drivers/iommu/amd/io_pgtable.c | 25
Switch to using IO page table framework for AMD IOMMU v1 page table.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/iommu.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 77f44b927ae7
To simplify the fetch_pte function. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/io_pgtable.c | 13 +++--
drivers/iommu/amd/iommu.c | 4 +++-
3 files changed, 11 insertions(+), 8 deletions
Add TLB flush callback functions, which are used by the IO
page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd
Preparing to migrate to use IO page table framework.
There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 18 ++
drivers/iommu/amd/io_pgtable.c | 473
drivers/iommu/amd/iommu.c | 476
To better organize the data structure since it contains IO page table
related information.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 2 +-
drivers/iommu/amd/iommu.c | 2 +-
3 files changed, 3 insertions
These implement map and unmap for AMD IOMMU v1 pagetable, which
will be used by the IO pagetable framework.
Also clean up unused extern function declarations.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 -
drivers/iommu/amd/io_pgtable.c | 25
This implements iova_to_phys for AMD IOMMU v1 pagetable,
which will be used by the IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 21 +
drivers/iommu/amd/iommu.c | 16 +---
2 files changed, 22 insertions
And move declaration to header file so that they can be included across
multiple files. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 3 +++
drivers/iommu/amd/iommu.c | 39 +--
2 files changed, 22
be no functional change.
Subsequent series will introduce support for the AMD IOMMU v2 page table.
Thanks,
Suravee
Suravee Suthikulpanit (13):
iommu: amd: Re-define amd_iommu_domain_encode_pgtable as inline
iommu: amd: Prepare for generic IO page table framework
iommu: amd: Move pt_root to to struct
Add initial hook up code to implement generic IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/Kconfig | 1 +
drivers/iommu/amd/Makefile | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 32 +++
drivers/iommu/amd/io_pgtable.c | 89
Make use of the new struct amd_io_pgtable in preparation to remove
the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/iommu.c | 25 ++---
2 files changed, 11 insertions(+), 15 deletions(-)
diff
To simplify the fetch_pte function. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/io_pgtable.c | 13 +++--
drivers/iommu/amd/iommu.c | 4 +++-
3 files changed, 11 insertions(+), 8 deletions
Introduce amd_iommu_free_pgtable helper function, which consolidates
logic for freeing page table.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/io_pgtable.c | 12 +++-
drivers/iommu/amd/iommu.c | 19 ++-
3 files
There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c
index 524c5406ccd6
Since the IO page table root and mode parameters have been moved into
the struct amd_io_pg, the function is no longer needed. Therefore,
remove it along with the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 4 ++--
drivers/iommu/amd
Switch to using IO page table framework for AMD IOMMU v1 page table.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 3 +++
drivers/iommu/amd/iommu.c | 10 ++
2 files changed, 13 insertions(+)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd
Move the function to header file to allow inclusion in other files.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 +
drivers/iommu/amd/iommu.c | 10 --
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/amd
C enabled.
Reported-by: Maxim Levitsky
Tested-by: Maxim Levitsky
Cc: Joao Martins
Fixes: e52d58d54a321 ("iommu/amd: Use cmpxchg_double() when updating 128-bit
IRTE")
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/iommu.c | 4
1 file changed, 4 insertions(+)
e mode 100644 drivers/iommu/amd_iommu.h
Thank you for cleaning up.
Reviewed-by: Suravee Suthikulpanit
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
ze_t instead of int to pass parameter to __unmap_single().
Reported-by: Robert Lippert
Signed-off-by: Suravee Suthikulpanit
---
Note: This patch is intended for stable tree prior 5.5 due to commit
be62dbf554c5 ("iommu/amd: Convert AMD iommu driver to the dma-iommu api"),
where the function
Hi Alexander,
On 5/30/20 3:07 AM, Alexander Monakov wrote:
The driver performs an extra check if the IOMMU's capabilities advertise
presence of performance counters: it verifies that counters are writable
by writing a hard-coded value to a counter and testing that reading that
counter gives
Alexander
On 6/1/20 4:01 PM, Alexander Monakov wrote:
On Mon, 1 Jun 2020, Suravee Suthikulpanit wrote:
Moving init_iommu_perf_ctr just after iommu_flush_all_caches resolves
the issue. This is the earliest point in amd_iommu_init_pci where the
call succeeds on my laptop.
According to your
) to
Completion Wait Write-Back (CWWB) Range Limit register
and requires the IOMMU CWWB semaphore base and range to be programmed
in the register offset 0020h and 0028h accordingly.
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 1 +
drivers/iommu/amd
, which is incremented for every completion wait command.
Since this new scheme is also compatible with non-SNP mode,
generalize the driver to use 4K page for completion-wait semaphore in
both modes.
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 3
-and-more.pdf
Thank you,
Suravee
Suravee Suthikulpanit (3):
iommu: amd: Use 4K page for completion wait write-back semaphore
iommu: amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR
iommu: amd: Re-purpose Exclusion range registers to support SNP CWWB
drivers/iommu/amd/amd_iommu_types.h | 6
IOMMU SNP support introduces two new IOMMU events:
* RMP Page Fault event
* RMP Hardware Error event
Hence, add reporting functions for these events.
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 2 +
drivers/iommu/amd/iommu.c
Hi Joerg,
Do you have any concerns regarding this patch?
Thanks,
Suravee
On 10/15/20 9:50 AM, Suravee Suthikulpanit wrote:
Certain device drivers allocate IO queues on a per-cpu basis.
On AMD EPYC platform, which can support up-to 256 cpu threads,
this can exceed the current MAX_IRQ_PER_TABLE
defaults back to KERN_DEFAULT loglevel.
*/
#define pr_cont(fmt, ...) \
printk(KERN_CONT fmt, ##__VA_ARGS__)
So, remove the line break, so only one line is logged.
Fixes: 3928aa3f57 ("iommu/amd: Detect and enable guest vAPIC support")
Cc: Suravee Suthikulpanit
Cc: iom
atch is not applicable in subsequent
kernel versions.
Cc: sta...@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Reported-by: Robert Lippert
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/amd_i
On 6/16/20 3:48 AM, Alexander Monakov wrote:
Alexander
On 6/1/20 4:01 PM, Alexander Monakov wrote:
On Mon, 1 Jun 2020, Suravee Suthikulpanit wrote:
Moving init_iommu_perf_ctr just after iommu_flush_all_caches resolves
the issue. This is the earliest point in amd_iommu_init_pci where
Reviewed-by: Suravee Suthikulpanit
Thanks,
Suravee
On 6/13/20 6:11 AM, Jerry Snitselaar wrote:
Move AMD Kconfig and Makefile bits down into the amd directory
with the rest of the AMD specific files.
Cc: Joerg Roedel
Cc: Suravee Suthikulpanit
Signed-off-by: Jerry Snitselaar
---
drivers
u/amd: Increase interrupt remapping table limit to
512 entries")
Reported-by: Jerry Snitselaar
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h
b/drivers/iommu/a
of the DTE[IntTabLen] field as
specified in the AMD IOMMU specification. There is no functional change.
Suggested-by: Linus Torvalds
Reviewed-by: Tom Lendacky
Signed-off-by: Suravee Suthikulpanit
Cc: Will Deacon
Cc: Jerry Snitselaar
Cc: Joerg Roedel
---
drivers/iommu/amd/amd_iommu_types.h | 19
To better organize the data structure since it contains IO page table
related information.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 2 +-
drivers/iommu/amd/iommu.c | 2 +-
3 files changed, 3 insertions
Add initial hook up code to implement generic IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/Kconfig | 1 +
drivers/iommu/amd/Makefile | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 35 ++
drivers/iommu/amd/io_pgtable.c
Make use of the new struct amd_io_pgtable in preparation to remove
the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/iommu.c | 25 ++---
2 files changed, 11 insertions(+), 15 deletions(-)
diff
/23/251)
- Do not specify struct io_pgtable_cfg.coherent_walk, since it is
not currently used. (per Robin)
- Remove unused struct iommu_flush_ops. (patch 2/13)
- Move amd_iommu_setup_io_pgtable_ops to iommu.c instead of io_pgtable.c
patch 13/13)
Suravee Suthikulpanit (13):
iommu/amd:
This implements iova_to_phys for AMD IOMMU v1 pagetable,
which will be used by the IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 22 ++
drivers/iommu/amd/iommu.c | 16 +---
2 files changed, 23 insertions
Move the function to header file to allow inclusion in other files.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 +
drivers/iommu/amd/iommu.c | 10 --
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/amd
There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c
index d4d131e43dcd
Preparing to migrate to use IO page table framework.
There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 18 ++
drivers/iommu/amd/io_pgtable.c | 473
drivers/iommu/amd/iommu.c | 476
By consolidate logic into v1_free_pgtable helper function,
which is called from IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 1 -
drivers/iommu/amd/io_pgtable.c | 41 --
drivers/iommu/amd/iommu.c | 21
And move declaration to header file so that they can be included across
multiple files. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 3 +++
drivers/iommu/amd/iommu.c | 39 +--
2 files changed, 22
Since the IO page table root and mode parameters have been moved into
the struct amd_io_pg, the function is no longer needed. Therefore,
remove it along with the struct domain_pgtable.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 4 ++--
drivers/iommu/amd
Switch to using IO page table framework for AMD IOMMU v1 page table.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/init.c | 2 ++
drivers/iommu/amd/iommu.c | 48 ++-
3 files changed, 39 insertions
These implement map and unmap for AMD IOMMU v1 pagetable, which
will be used by the IO pagetable framework.
Also clean up unused extern function declarations.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 -
drivers/iommu/amd/io_pgtable.c | 25
To simplify the fetch_pte function. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 2 +-
drivers/iommu/amd/io_pgtable.c | 13 +++--
drivers/iommu/amd/iommu.c | 4 +++-
3 files changed, 11 insertions(+), 8 deletions
Hi Joerg,
Do you have any update on this series?
Thanks,
Suravee
On 11/2/20 10:16 AM, Suravee Suthikulpanit wrote:
Joerg,
You mentioned to remind you to pull this in to linux-next.
Thanks,
Suravee
On 10/4/20 8:45 AM, Suravee Suthikulpanit wrote:
The framework allows callable
Joerg,
Please ignore to include the V3. I am working on V4 to resubmit.
Thank you,
Suravee
On 11/11/20 10:10 AM, Suravee Suthikulpanit wrote:
Hi Joerg,
Do you have any update on this series?
Thanks,
Suravee
On 11/2/20 10:16 AM, Suravee Suthikulpanit wrote:
Joerg,
You mentioned to remind
Will,
To answer your questions from v1 thread.
On 11/18/20 5:57 AM, Will Deacon wrote:
> On 11/5/20 9:58 PM, Suravee Suthikulpanit wrote:
>> AMD IOMMU requires 4k-aligned pages for the event log, the PPR log,
>> and the completion wait write-back regions. However, when allocati
Will,
I have already submitted v2 of this patch. Let me move the discussion there
instead ...
(https://lore.kernel.org/linux-iommu/20201105145832.3065-1-suravee.suthikulpa...@amd.com/)
Suravee
On 11/18/20 5:57 AM, Will Deacon wrote:
On Wed, Oct 28, 2020 at 11:18:24PM +, Suravee
for these data structures.
So, fix by calling set_memory_4k() on the allocated pages.
Fixes: commit c69d89aff393 ("iommu/amd: Use 4K page for completion wait
write-back semaphore")
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/init.c | 22 +---
Joerg,
You mentioned to remind you to pull this in to linux-next.
Thanks,
Suravee
On 10/4/20 8:45 AM, Suravee Suthikulpanit wrote:
The framework allows callable implementation of IO page table.
This allows AMD IOMMU driver to switch between different types
of AMD IOMMU page tables (e.g. v1 vs
for these data structures.
So, fix by calling set_memory_4k() on the allocated pages.
Fixes: commit c69d89aff393 ("iommu/amd: Use 4K page for completion wait
write-back semaphore")
Cc: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/init.c | 27 ++---
instead.
Fixes: 6d39bdee238f ("iommu/amd: Enforce 4k mapping for certain IOMMU data
structures")
Tested-by: Brijesh Singh
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 3 ++-
drivers/iommu/amd/amd_iommu_types.h | 4 +++
drivers/iommu/amd/init.c
I will send out v2 of this patch. Please ignore this v1.
Thanks,
Suravee
On 1/18/21 12:19 PM, Suravee Suthikulpanit wrote:
IOMMU Extended Feature Register (EFR) is used to communicate
the supported features for each IOMMU to the IOMMU driver.
This is normally read from the PCI MMIO register
Hi Joerg / Will,
Happy New Year!! Just want to follow up on this series.
Thanks,
Suravee
On 12/15/20 2:36 PM, Suravee Suthikulpanit wrote:
The framework allows callable implementation of IO page table.
This allows AMD IOMMU driver to switch between different types
of AMD IOMMU page tables
On 1/27/21 7:06 PM, Joerg Roedel wrote:
Hi Suravee,
On Tue, Dec 15, 2020 at 01:36:52AM -0600, Suravee Suthikulpanit wrote:
Suravee Suthikulpanit (13):
iommu/amd: Re-define amd_iommu_domain_encode_pgtable as inline
iommu/amd: Prepare for generic IO page table framework
iommu/amd
ed=0
From c103d631285cf376420e7f7869837302f2ac38c0 Mon Sep 17 00:00:00 2001
From: Suravee Suthikulpanit
Date: Mon, 1 Feb 2021 18:38:26 -0600
Subject: [RFC PATCH] iommu/amd: Fix performance counter initialization
Certain AMD platforms enable power gating feature for IOMMU PMC,
which prevents the IOMMU driver fro
Suggested-by: Alexander Monakov
Cc: David Coe
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 47 -
1 file changed, 26 insertions(+), 21 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 1c
TJ,
Thanks for testing. I will submit this change upstream w/ you as Tested-by.
On 2/8/21 12:18 AM, Tj (Elloe Linux) wrote:
On 06/02/2021 04:02, Suravee Suthikulpanit wrote:
Would this be in any way related to the following from the same device:
kernel: pci :00:00.2: can't derive routing
bug.cgi?id=201753
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/init.c | 45 ++--
1 file changed, 34 insertions(+), 11 deletions(-)
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 83d8ab2aed9f..01da76dc1caa 100644
--- a/drivers
available in the IVHD header, and is available to
the driver prior to PCI initialization. Therefore, default to using
the IVHD EFR instead.
Fixes: 6d39bdee238f ("iommu/amd: Enforce 4k mapping for certain IOMMU data
structures")
Reviewed-by: Robert Richter
Tested-by: Brijesh Singh
Si
Joerg,
On 3/18/21 10:31 PM, Joerg Roedel wrote:
On Fri, Mar 12, 2021 at 03:04:09AM -0600, Suravee Suthikulpanit wrote:
@@ -519,6 +521,7 @@ struct protection_domain {
spinlock_t lock;/* mostly used to lock the page table*/
u16 id; /* the domain id written
Joerg,
On 3/18/21 10:33 PM, Joerg Roedel wrote:
On Fri, Mar 12, 2021 at 03:04:10AM -0600, Suravee Suthikulpanit wrote:
To allow specification whether to use v1 or v2 IOMMU pagetable for
DMA remapping when calling kernel DMA-API.
Signed-off-by: Suravee Suthikulpanit
---
Documentation/admin
Currently, PPR/ATS can be enabled only if the domain is type
identity mapping. However, when we allow the IOMMU v2 page table
to be used for DMA-API, the sanity check needs to be updated to
only apply for the case when using AMD_IOMMU_V1 page table mode.
Signed-off-by: Suravee Suthikulpanit
.
http://www.amd.com/system/files/TechDocs/48882_IOMMU_3.05_PUB.pdf
Thanks,
Suravee
Suravee Suthikulpanit (7):
iommu/amd: Refactor amd_iommu_domain_enable_v2
iommu/amd: Update sanity check when enable PRI/ATS
iommu/amd: Decouple the logic to enable PPR and GT
iommu/amd: Initial support
Introduce IO page table framework support for AMD IOMMU v2 page table.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/Makefile | 2 +-
drivers/iommu/amd/amd_iommu_types.h | 2 +
drivers/iommu/amd/io_pgtable_v2.c | 239
drivers/iommu/io
The current function to enable IOMMU v2 also lock the domain.
In order to reuse the same code in different code path, in which
the domain has already been locked, refactor the function to separate
the locking from the enabling logic.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd
AMD IOMMU introduces support for Guest I/O protection where the request
from the I/O device without a PASID are treated as if they have PASID 0.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu_types.h | 3 +++
drivers/iommu/amd/init.c| 8
drivers/iommu
To allow specification whether to use v1 or v2 IOMMU pagetable for
DMA remapping when calling kernel DMA-API.
Signed-off-by: Suravee Suthikulpanit
---
Documentation/admin-guide/kernel-parameters.txt | 6 ++
drivers/iommu/amd/init.c| 15 +++
2 files
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