Hi Olav,
Some really minor comments, but this looks good.
On Tue, Aug 19, 2014 at 12:17:38AM +0100, Olav Haugan wrote:
> The number of S2CR registers is not properly set when stream
> matching is not supported. Fix this and add check that we do not try to
> access outside of the number of S2CR re
Hi Varun,
On Tue, Aug 19, 2014 at 01:11:43PM +0100, Varun Sethi wrote:
> > I think there's some confusion here. The ARM architected SMMU does not
> > perform any StreamID translation -- it sees an incoming ID and uses that to
> > lookup a set of translation tables.
>
> I don't completely agree w
Hi Olav,
On Sat, Aug 23, 2014 at 01:12:32AM +0100, Olav Haugan wrote:
> The number of S2CR registers is not properly set when stream
> matching is not supported. Fix this and add check that we do not try to
> access outside of the number of S2CR regisrers.
Sorry for the bother, but could you base
Hi Antonios,
On Fri, Aug 22, 2014 at 10:01:27AM +0100, Antonios Motakis wrote:
> Add support for discovering AMBA devices with VFIO and handle them
> similarly to Linux platform devices.
[...]
> +static struct amba_id pl330_ids[] = {
> + { 0, 0 },
> +};
> +
> +MODULE_DEVICE_TABLE(amba, pl330
Hi Mitch,
On Tue, Aug 19, 2014 at 07:12:41PM +0100, Mitchel Humpherys wrote:
> On Tue, Aug 19 2014 at 05:44:32 AM, Will Deacon wrote:
> > We don't have writeq for arch/arm/.
>
> Ah yes looks like this is an MSM-ism that never made it upstream since
> it wouldn't be g
[adding Mike]
On Tue, Aug 19, 2014 at 08:03:09PM +0100, Olav Haugan wrote:
> Hi Will,
Hi Olav,
> On 8/19/2014 5:58 AM, Will Deacon wrote:
> > On Wed, Aug 13, 2014 at 01:51:34AM +0100, Mitchel Humpherys wrote:
> >> On some platforms with tight power constraints it is poli
On Tue, Aug 26, 2014 at 11:37:30AM +0100, Will Deacon wrote:
> On Sat, Aug 23, 2014 at 01:12:32AM +0100, Olav Haugan wrote:
> > The number of S2CR registers is not properly set when stream
> > matching is not supported. Fix this and add check that we do not try to
> > access
iommu/arm-smmu: remove pgtable_page_{c,d}tor()
Will Deacon (2):
iommu/arm-smmu: fix s2cr and smr teardown on device detach from domain
iommu/arm-smmu: fix corner cases in address size calculations
drivers/iommu/arm-smmu.c | 127 +++
1 file change
present.
This patch fixes the device detach code so that it operates as a
converse of the attach code.
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu
ion. Also, we still don't program the Stream Match Register
until after registering our interrupt handler so we shouldn't be missing
any interrupts.
Signed-off-by: Mitchel Humpherys
[will: code cleanup and fixed request_irq token parameter]
Signed-off-by: Will Deacon
---
driver
[<801f4d78>]
(dmatest_func+0x60c/0x1098)
[<801f4d78>] (dmatest_func) from [<8003f8ac>] (kthread+0xcc/0xe8)
[<8003f8ac>] (kthread) from [<8000e868>] (ret_from_fork+0x14/0x2c)
---[ end trace ce0d27e6f434acf8 ]--
Split page tables lock is not used in the driver. In fact,
limited by the input address size at stage-2).
This patch fixes a few corner cases in our address size handling so that
we correctly deal with 40-bit addresses in TTBCR2 and restrict the IPA
size differently depending on whether or not we have support for nested
translation.
Signed-off-by: Will
From: Olav Haugan
The number of S2CR registers is not properly set when stream
matching is not supported. Fix this and add check that we do not try to
access outside of the number of S2CR regisrers.
Signed-off-by: Olav Haugan
[will: added missing NUMSIDB_* definitions]
Signed-off-by: Will
From: Olav Haugan
Stage-1 context banks do not have the SMMU_CBn_TCR[SL0] field since it
is only applicable to stage-2 context banks.
This patch ensures that we don't set the reserved TCR bits for stage-1
translations.
Signed-off-by: Olav Haugan
Signed-off-by: Will Deacon
---
drivers/
From: Hans Wennborg
The prefix suggests the number should be printed in hex, so use
the %x specifier to do that.
Found by using regex suggested by Joe Perches.
Signed-off-by: Hans Wennborg
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1
potential reuse by
other buses (e.g. PCI) in the future.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 20 ++
drivers/of/platform.c | 42 ++
include/linux/dma-mapping.h| 8 +++-
3 files changed, 30
data on their of_node. This data can then be
passed back to a new add_device function (added in a later patch) to
identify the IOMMU instance in question.
Signed-off-by: Will Deacon
---
drivers/iommu/of_iommu.c | 14 ++
include/asm-generic/vmlinux.lds.h | 2 ++
include/
This patch adds a new function to the iommu_ops structure to allow a
device to be added to a specific IOMMU instance along with a set of
opaque IDs that are used internally by the IOMMU for identifying and
configuring translations.
Signed-off-by: Will Deacon
---
include/linux/iommu.h | 2 ++
1
e comments on the general direction of the
series.
Cheers,
Will
--->8
Will Deacon (7):
iommu: provide early initialisation hook for IOMMU drivers
dma-mapping: replace set_arch_dma_coherent_ops with arch_setup_dma_ops
iommu: add new iommu_ops callback for adding a device with a set of
This patch extends of_dma_configure so that it sets up the IOMMU for a
device, as well as the coherent/non-coherent DMA mapping ops.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 4 +++-
drivers/of/platform.c | 37
The generic IOMMU device-tree bindings can be used to add arbitrary OF
masters to an IOMMU with a compliant binding.
This patch introduces of_iommu_configure, which does exactly that.
Signed-off-by: Will Deacon
---
drivers/iommu/Kconfig| 2 +-
drivers/iommu/of_iommu.c | 36
d out of line into dma-mapping.c. If CONFIG_ARM_DMA_USE_IOMMU
is not set, the iommu paramater is ignored and the normal ops are used
instead.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 22 ++-
arch/arm/mm/dma-mapping.c
We need to ensure that the IOMMUs in the system have a chance to perform
some basic initialisation before we start adding masters to them.
This patch adds a call to of_iommu_init before of_platform_populate.
Signed-off-by: Will Deacon
---
arch/arm/kernel/setup.c | 5 -
1 file changed, 4
Hi Tirumalesh,
On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumal...@gmail.com wrote:
> From: Tirumalesh Chalamarla
>
> This patch modifes output_mask calculation logic for stage 1 and allow
> max possible value supported by SMMU implementaions for translations,
> where stage 2 is bypassed.
>
On Mon, Sep 01, 2014 at 02:49:58PM +0100, tirumalesh chalamarla wrote:
> On Mon, Sep 1, 2014 at 4:42 AM, Will Deacon wrote:
> > Assuming I understand the problem correctly, why not simply remove the
> > truncation from the existing code (untested patch below)? Does that not
&
On Tue, Aug 26, 2014 at 02:54:51PM +0100, Will Deacon wrote:
> On Tue, Aug 19, 2014 at 07:12:41PM +0100, Mitchel Humpherys wrote:
> > On Tue, Aug 19 2014 at 05:44:32 AM, Will Deacon wrote:
> > >> @@ -2005,6 +2073,11 @@ int arm_smmu_device_cfg_probe(struct
> &g
On Mon, Sep 01, 2014 at 03:27:30PM +0100, Arnd Bergmann wrote:
> On Friday 29 August 2014 16:54:25 Will Deacon wrote:
> > set_arch_dma_coherent_ops is called from of_dma_configure in order to
> > swizzle the architectural dma-mapping functions over to a cache-coherent
> > im
On Mon, Sep 01, 2014 at 03:39:16PM +0100, Arnd Bergmann wrote:
> On Monday 01 September 2014 10:13:22 Thierry Reding wrote:
> > On Fri, Aug 29, 2014 at 04:54:26PM +0100, Will Deacon wrote:
> > > diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> > > index
On Mon, Sep 01, 2014 at 03:31:28PM +0100, Arnd Bergmann wrote:
> On Monday 01 September 2014 09:52:19 Thierry Reding wrote:
> > I don't think this is the right direction. We've been preaching that
> > using initcall ordering is a bad thing and people should be using
> > deferred probe instead. Now
On Mon, Sep 01, 2014 at 03:46:18PM +0100, Arnd Bergmann wrote:
> On Monday 01 September 2014 10:29:40 Thierry Reding wrote:
> >
> > I think this could use a bit more formalization. As I said in another
> > reply earlier, there's very little standardization in the IOMMU API.
> > That certainly give
On Tue, Sep 02, 2014 at 07:26:01AM +0100, Marek Szyprowski wrote:
> Hi Will,
Hi Marek,
> On 2014-08-29 17:54, Will Deacon wrote:
> > This patch series is an RFC to implement IOMMU master configuration into
> > of_dma_configure. I haven't yet ported any IOMMU drivers t
VFIO_CHECK_EXTENSION ioctl, in a similar
manner to checking for cache-coherent DMA.
Cc: Joerg Roedel
Cc: Alex Williamson
Signed-off-by: Will Deacon
---
drivers/vfio/vfio_iommu_type1.c | 87 +
include/uapi/linux/vfio.h | 2 +
2 files changed, 82
the support bus_types (currently just PCI) and check that
nesting is actually supported
The corresponding arm-smmu changes are included to show how the new
domain attribute can be used.
All feedback welcome,
Will
-->8
Will Deacon (3):
iommu: introduce domain attribute for nesting IOM
is actually making use of nesting.
Cc: Joerg Roedel
Cc: Alex Williamson
Signed-off-by: Will Deacon
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 20f9a527922a..7b02bcc85b9e 100644
--- a/include/linux/iommu.h
+++ b
hardware.
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 110 ++-
1 file changed, 90 insertions(+), 20 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index d2d8cdaf4f0b..c745296b170f 100644
--- a/drivers/iommu/arm
On Mon, Sep 01, 2014 at 09:18:26PM +0100, Arnd Bergmann wrote:
> On Monday 01 September 2014 17:40:00 Will Deacon wrote:
> > On Mon, Sep 01, 2014 at 03:46:18PM +0100, Arnd Bergmann wrote:
> > > On Monday 01 September 2014 10:29:40 Thierry Reding wrote:
> > > >
> &
On Tue, Sep 02, 2014 at 11:42:13AM +0100, Marek Szyprowski wrote:
> On 2014-09-02 10:56, Arnd Bergmann wrote:
> > On Tuesday 02 September 2014 10:48:02 Marek Szyprowski wrote:
> >>>-- I have concerns that allocating one domain per master might be
> >>> too much, but it's hard to tell without an
On Tue, Sep 02, 2014 at 11:51:54AM +0100, Laurent Pinchart wrote:
> Hi Will,
Hi Laurent,
> On Friday 29 August 2014 16:54:27 Will Deacon wrote:
> > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
> > index dd5112265cc9..6d13f962f156 100644
> > --- a/drivers
On Tue, Sep 02, 2014 at 12:12:20PM +0100, Varun Sethi wrote:
> We would still need a mechanism to distinguish stage1 mapping from stage2
> mapping i.e. for nested translation we should be able to specify whether
> the mapping corresponds to stage1 or stage 2 translation. Also,
> correspondingly we
On Tue, Sep 02, 2014 at 01:15:06PM +0100, Arnd Bergmann wrote:
> On Tuesday 02 September 2014 11:03:42 Will Deacon wrote:
> > On Mon, Sep 01, 2014 at 09:18:26PM +0100, Arnd Bergmann wrote:
> > > I don't mind handling PCI devices separately. They are different in a
>
We need to ensure that the IOMMUs in the system have a chance to perform
some basic initialisation before we start adding masters to them.
This patch adds a call to of_iommu_init before of_platform_populate.
Signed-off-by: Will Deacon
---
arch/arm/kernel/setup.c | 5 -
1 file changed, 4
The generic IOMMU device-tree bindings can be used to add arbitrary OF
masters to an IOMMU with a compliant binding.
This patch introduces of_iommu_configure, which does exactly that.
Signed-off-by: Will Deacon
---
drivers/iommu/Kconfig | 2 +-
drivers/iommu/of_iommu.c| 52
IOMMU and the correspondong IDs for the new master.
Signed-off-by: Will Deacon
---
include/linux/iommu.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index fdddb14cd8f5..3e766b85daa3 100644
--- a/include/linux/iommu.h
+++ b/include/linux
This patch extends of_dma_configure so that it sets up the IOMMU for a
device, as well as the coherent/non-coherent DMA mapping ops.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 5 -
drivers/of/platform.c | 36
nyway, feedback welcome. There are certainly a few different ways of
doing this.
Will
--->8
Will Deacon (7):
iommu: provide early initialisation hook for IOMMU drivers
dma-mapping: replace set_arch_dma_coherent_ops with arch_setup_dma_ops
iommu: add new iommu_ops callback for adding an
d out of line into dma-mapping.c. If CONFIG_ARM_DMA_USE_IOMMU
is not set, the iommu paramater is ignored and the normal ops are used
instead.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 17 +++--
arch/arm/mm/dma-mapping.c
data on their of_node in the form of a new
iommu_data structure. This can later be used when parsing OF masters to
identify the IOMMU instance in question.
Signed-off-by: Will Deacon
---
drivers/iommu/of_iommu.c | 14 ++
include/asm-generic/vmlinux.lds.h | 2 ++
include/
potential reuse by
other buses (e.g. PCI) in the future.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 13
drivers/of/platform.c | 42 ++
include/linux/dma-mapping.h| 8 +++-
3 files changed, 23
On Tue, Sep 02, 2014 at 09:59:41PM +0100, jroe...@suse.de wrote:
> On Tue, Sep 02, 2014 at 04:01:32PM +0200, Arnd Bergmann wrote:
> > This is an artifact of the API being single-instance at the moment.
> > We might not in fact need it, I was just trying to think of things
> > that naturally fit in
iommu/arm-smmu: Do not access non-existing S2CR registers
Vladimir Murzin (1):
iommu/arm-smmu: remove pgtable_page_{c,d}tor()
Will Deacon (2):
iommu/arm-smmu: fix s2cr and smr teardown on device detach from domain
iommu/arm-smmu: fix corner cases in address size calculations
On Wed, Sep 03, 2014 at 04:22:42PM +0100, Joerg Roedel wrote:
> Hi Will,
Hi Joerg,
> On Tue, Sep 02, 2014 at 10:53:36AM +0100, Will Deacon wrote:
> > This is version three of the patches I originally posted here:
> >
> > RFCv1: http://permalink.gmane.org/gmane
whether the device sits on the platform or pci
bus.
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 62 ++--
1 file changed, 34 insertions(+), 28 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 958ae8194afe
the vSMMU code) can be expressed as a simple right shift.
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 7ab3cc4ffbb3..ecad700cd4f4 100644
--- a
ifdef since the dependencies
for CONFIG_ARM_SMMU already imply CONFIG_OF.
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 47 +--
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git a/drivers/iommu/arm-smm
In preparation for nested translation support, stick a pointer to the
iommu_domain in dev->archdata.iommu. This makes it much easier to grab
hold of the physical group configuration (e.g. cbndx) when dealing with
vSMMU accesses from a guest.
Signed-off-by: Will Deacon
---
drivers/iommu/
only the specified stage.
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a83cc2a2a2ca..958ae8194afe 100644
--- a/drivers/iommu/arm-smmu.c
+++ b
From: Robin Murphy
MMU-401 is similar to MMU-400, but updated with limited ARMv8 support.
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon
---
Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
drivers/iommu/arm-smmu.c | 1 +
2 files changed, 2
ction
iommu/arm-smmu: support MMU-401
Will Deacon (5):
iommu/arm-smmu: allow translation stage to be forced on the cmdline
iommu/arm-smmu: add support for multi-master iommu groups
iommu/arm-smmu: put iommu_domain pointer in dev->archdata.iommu
iommu/arm-smmu: use page shift instead
ual SMMU interface only advertise the
supported stage-2 input size.
This patch fixes the problem by treating the stage-1 and stage-2 input
address sizes separately.
Reported-by: Tirumalesh Chalamarla
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smm
On Fri, Sep 05, 2014 at 04:37:41PM +0100, Grygorii Strashko wrote:
> Hi Will,
Hi Grygorii,
> On 09/02/2014 08:56 PM, Will Deacon wrote:
> > set_arch_dma_coherent_ops is called from of_dma_configure in order to
> > swizzle the architectural dma-mapping functions over t
Hi Joerg,
[adding devicetree for the last paragraph]
On Fri, Sep 05, 2014 at 11:52:56AM +0100, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Cc: Will Deacon
> Signed-off-by: Joerg Roedel
> ---
> drivers/iommu/arm-smmu.c | 35 ++-
>
On Wed, Sep 10, 2014 at 12:16:06PM +0100, Marek Szyprowski wrote:
> On 2014-09-02 19:56, Will Deacon wrote:
> > This patch adds a new function to the iommu_ops structure to allow an
> > OF device to be added to a specific IOMMU instance using the recently
> > merged generic d
On Wed, Sep 10, 2014 at 12:22:13PM +0100, Will Deacon wrote:
> On Wed, Sep 10, 2014 at 12:16:06PM +0100, Marek Szyprowski wrote:
> > On 2014-09-02 19:56, Will Deacon wrote:
> > > +#ifdef CONFIG_OF_IOMMU
> > > + int (*of_xlate)(struct device *dev, struct of_phandle
Hi Laurent,
Cheers for the review.
On Wed, Sep 10, 2014 at 02:01:34PM +0100, Laurent Pinchart wrote:
> On Tuesday 02 September 2014 18:56:24 Will Deacon wrote:
> > +struct iommu_dma_mapping *of_iommu_configure(struct device *dev)
> > +{
> > + struct of_phandle_args iommu
On Wed, Sep 10, 2014 at 02:29:42AM +0100, Mitchel Humpherys wrote:
> On Tue, Aug 26 2014 at 07:27:58 AM, Will Deacon wrote:
> > On Tue, Aug 19, 2014 at 08:03:09PM +0100, Olav Haugan wrote:
> >> Clients of the SMMU driver are required to vote for clocks and power
> >>
On Thu, Sep 11, 2014 at 02:37:36PM +0100, Kiran Padwal wrote:
> Make of_device_id array const, because all OF functions handle it as const.
>
> Signed-off-by: Kiran Padwal
> ---
> drivers/iommu/arm-smmu.c |2 +-
> drivers/iommu/omap-iommu.c |2 +-
> drivers/iommu/tegra-gart.c |2 +-
Hi Alex,
On Tue, Sep 02, 2014 at 10:53:36AM +0100, Will Deacon wrote:
> Hello,
>
> This is version three of the patches I originally posted here:
>
> RFCv1: http://permalink.gmane.org/gmane.linux.kernel.iommu/5552
> RFCv2: http://permalink.gmane.org/gmane.linux
We need to ensure that the IOMMUs in the system have a chance to perform
some basic initialisation before we start adding masters to them.
This patch adds a call to of_iommu_init before of_platform_populate.
Signed-off-by: Will Deacon
---
arch/arm/kernel/setup.c | 2 ++
1 file changed, 2
data on their of_node in the form of a new
iommu_data structure. This can later be used when parsing OF masters to
identify the IOMMU instance in question.
Signed-off-by: Will Deacon
---
drivers/iommu/of_iommu.c | 14 ++
include/asm-generic/vmlinux.lds.h | 2 ++
include/
This patch extends of_dma_configure so that it sets up the IOMMU for a
device, as well as the coherent/non-coherent DMA mapping ops.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 4 +++-
drivers/of/platform.c | 24 +---
include/linux/dma
d out of line into dma-mapping.c. If CONFIG_ARM_DMA_USE_IOMMU
is not set, the iommu paramater is ignored and the normal ops are used
instead.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 9 ++---
arch/arm/mm/dma-mapping.c | 68 +---
nting the iommu_dma_mapping
- A bunch of small fixes (_OF_DECLARE, some code shuffling, fix multiple
IOMMU parsing)
All feedback welcome. Hopefully this is now at a point where people can
start looking to port dma-mapping and/or IOMMU drivers to it.
Cheers,
Will
--->8
Will Deacon (7):
IOMMU and the correspondong IDs for the new master.
Signed-off-by: Will Deacon
---
include/linux/iommu.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 4256f3ce1673..821eb0bd9f6c 100644
--- a/include/linux/iommu.h
+++ b/include/linux
replaces the function with a broader
arch_setup_dma_ops callback which will be extended in future.
Signed-off-by: Will Deacon
---
arch/arm/include/asm/dma-mapping.h | 8
drivers/of/platform.c | 31 +--
include/linux/dma-mapping.h| 7
through which the device can
master. The list is protected by a kref count and freed when no users
remain. It is expected that DMA-mapping code will take a reference if it
wishes to make use of the IOMMU information.
Signed-off-by: Will Deacon
---
drivers/iommu/Kconfig | 2 +-
drivers/iommu
Hi Alex,
Thanks for taking a look.
On Thu, Sep 11, 2014 at 08:12:28PM +0100, Alex Williamson wrote:
> On Tue, 2014-09-02 at 10:53 +0100, Will Deacon wrote:
> > diff --git a/drivers/vfio/vfio_iommu_type1.c
> > b/drivers/vfio/vfio_iommu_type1.c
> > index 0734fbe5b651
Hi Joerg,
On Mon, Sep 15, 2014 at 04:22:57PM +0100, Joerg Roedel wrote:
> On Thu, Sep 04, 2014 at 05:50:00PM +0100, Will Deacon wrote:
> > static struct arm_smmu_master_cfg *
> > -find_smmu_master_cfg(struct arm_smmu_device *smmu, struct device *dev)
> > +find_smmu_master_c
On Tue, Sep 16, 2014 at 12:40:27PM +0100, Robin Murphy wrote:
> On 12/09/14 17:34, Will Deacon wrote:
> > Here is version three of the RFC I've previously posted here:
> >
> >RFCv1:
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2014-August/283
On Mon, Sep 15, 2014 at 12:57:38PM +0100, Marek Szyprowski wrote:
> Hello,
Hi Marek,
Thanks for looking again at this -- I'll take at look at your exynos series
when I'm back in the UK next week.
> On 2014-09-12 18:34, Will Deacon wrote:
> > This patch adds a new fun
On Wed, Sep 17, 2014 at 09:53:12AM +0100, Joerg Roedel wrote:
> Hi Will,
Hello Joerg,
> On Mon, Sep 08, 2014 at 05:51:36PM +0100, Will Deacon wrote:
> > On Fri, Sep 05, 2014 at 11:52:56AM +0100, Joerg Roedel wrote:
> > > From: Joerg Roedel
> > >
> > &g
On Wed, Sep 17, 2014 at 09:16:09PM +0100, Mitchel Humpherys wrote:
> ARM SMMUs support memory access control via some bits in the translation
> table descriptor memory attributes. Currently we assume all translations
> are "unprivileged". Add support for privileged mappings, controlled by
> the IOM
On Sun, Sep 21, 2014 at 08:56:28AM +0100, Varun Sethi wrote:
> I have made changes to the arm smmu driver paging support, as a part of
> the huge page support patch. Will is currently reviewing changes made by
> me. I should be able to post my patch in the next couple of weeks.
Yup, but this patch
urphy (2):
iommu/arm-smmu: fix architecture version detection
iommu/arm-smmu: support MMU-401
Will Deacon (5):
iommu/arm-smmu: allow translation stage to be forced on the cmdline
iommu/arm-smmu: add support for multi-master iommu groups
iommu/arm-smmu: put iommu_domain pointe
Hi Mitch, Matt,
On Thu, Sep 11, 2014 at 07:30:43PM +0100, Mitchel Humpherys wrote:
> From: Matt Wagantall
>
> It is sometimes necessary to poll a memory-mapped register until its
> value satisfies some condition. Introduce a family of convenience macros
> that do this. Tight-loop and sleeping ve
Hi Mitch,
On Thu, Sep 11, 2014 at 07:30:44PM +0100, Mitchel Humpherys wrote:
> Currently, we provide the iommu_ops.iova_to_phys service by doing a
> table walk in software to translate IO virtual addresses to physical
> addresses. On SMMUs that support it, it can be useful to ask the SMMU
> itself
On Thu, Sep 18, 2014 at 12:13:13PM +0100, Laurent Pinchart wrote:
> Hi Will,
Hi Laurent,
> Thank you for the patch.
Sorry for the delay in replying, I was at Connect last week and the email
has backed up.
> On Friday 12 September 2014 17:34:52 Will Deacon wrote:
> > The gener
On Thu, Sep 18, 2014 at 03:31:54PM +0100, Robin Murphy wrote:
> After some fun times wondering why on Earth of_iommu_init was trying to
> instantiate a GIC, I think we may need one of these as part of this
> patch, too ;)
Oops, thanks!
Will
___
iommu
Hi Thierry,
On Mon, Sep 22, 2014 at 10:19:35AM +0100, Thierry Reding wrote:
> On Fri, Sep 12, 2014 at 05:34:55PM +0100, Will Deacon wrote:
> [...]
> > +static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64
> > size)
> > +{
> > + str
On Thu, Sep 18, 2014 at 12:17:33PM +0100, Laurent Pinchart wrote:
> Hi Will,
Hello again,
> On Friday 12 September 2014 17:34:53 Will Deacon wrote:
> > @@ -195,7 +197,19 @@ static void of_dma_configure(struct platform_device
> > *pdev) dev_dbg(dev, "de
On Mon, Sep 22, 2014 at 10:29:10AM +0100, Thierry Reding wrote:
> On Thu, Sep 18, 2014 at 02:17:33PM +0300, Laurent Pinchart wrote:
> > On Friday 12 September 2014 17:34:53 Will Deacon wrote:
> > > This patch extends of_dma_configure so that it sets up the IOMMU for a
> >
Hi Antonios,
On Tue, Sep 23, 2014 at 03:46:00PM +0100, Antonios Motakis wrote:
> Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of
> IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support
> the XN flag pages will always be executable.
>
> Signed-off-by: Antonios Mot
hardware.
Signed-off-by: Will Deacon
---
drivers/iommu/arm-smmu.c | 110 ++-
1 file changed, 90 insertions(+), 20 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 37dc3dd0df96..e0cc50ac4574 100644
--- a/drivers/iommu/arm
3.19.
Feedback welcome,
Will
Will Deacon (3):
iommu: introduce domain attribute for nesting IOMMUs
vfio/iommu_type1: add new VFIO_TYPE1_NESTING_IOMMU IOMMU type
iommu/arm-smmu: add support for DOMAIN_ATTR_NESTING attribute
drivers/iommu/arm-smmu.c
is actually making use of nesting.
Cc: Joerg Roedel
Cc: Alex Williamson
Signed-off-by: Will Deacon
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 20f9a527922a..7b02bcc85b9e 100644
--- a/include/linux/iommu.h
+++ b
.
This patch adds a new IOMMU type (VFIO_TYPE1_NESTING_IOMMU) to the VFIO
type-1 driver. The new IOMMU type acts identically to the
VFIO_TYPE1v2_IOMMU type, but additionally sets the DOMAIN_ATTR_NESTING
attribute on its IOMMU domains.
Cc: Joerg Roedel
Cc: Alex Williamson
Signed-off-by: Will Deacon
On Mon, Sep 22, 2014 at 11:28:42PM +0100, Mitchel Humpherys wrote:
> On Fri, Sep 19 2014 at 03:05:36 PM, Will Deacon wrote:
> > On Wed, Sep 17, 2014 at 09:16:09PM +0100, Mitchel Humpherys wrote:
> >> ARM SMMUs support memory access control via some bits in the translation
>
On Tue, Sep 23, 2014 at 08:14:01AM +0100, Thierry Reding wrote:
> On Mon, Sep 22, 2014 at 06:43:37PM +0100, Will Deacon wrote:
> > Yup. In this case, the iommu_dma_mapping passed to arch_setup_dma_ops
> > contains a domain and an allocator for each IOMMU instance in the system.
&g
On Wed, Sep 24, 2014 at 02:12:00AM +0100, Mitchel Humpherys wrote:
> On Mon, Sep 22 2014 at 08:26:14 AM, Will Deacon wrote:
> > On Thu, Sep 11, 2014 at 07:30:44PM +0100, Mitchel Humpherys wrote:
> >> + return arm_smmu_iova_to_phys_soft(domain, iova);
> >&g
Hi Marek,
On Tue, Sep 16, 2014 at 12:54:28PM +0100, Marek Szyprowski wrote:
> If device has no max_seg_size set, we assume that there is no limit and
> force it to DMA_BIT_MASK(32) to always use contiguous mappings in DMA
> address space.
>
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/mm/
On Thu, Sep 25, 2014 at 03:32:33PM +0100, Joerg Roedel wrote:
> On Wed, Sep 24, 2014 at 10:21:23AM +0100, Will Deacon wrote:
> > Some IOMMUs, such as the ARM SMMU, support two stages of translation.
> > The idea behind such a scheme is to allow a guest operating system to
> >
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