er-process page tables.
commit: 213d7368723709cf4567488e63dd667802378202
Best regards,
--
Bjorn Andersson
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
On Mon, 2 May 2022 14:07:45 +0530, Rohit Agarwal wrote:
> Add smem node to support shared memory manager on SDX65 platform.
>
>
Applied, thanks!
[4/4] ARM: dts: qcom: sdx65: Add Shared memory manager support
commit: e378b965330d99e8622eb369021d0dac01591046
Best regards,
Add the Qualcomm SC8280XP platform to the list of compatible for which
the Qualcomm-impl of the ARM SMMU should apply.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
b
This adds the compatible for the Qualcomm SC8280XP platform and associate the
Qualcomm impl in the ARM SMMU driver to it.
Bjorn Andersson (2):
dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP
iommu/arm-smmu-qcom: Add SC8280XP support
Documentation/devicetree/bindings/iommu/arm
Add compatible for the Qualcomm SC8280XP platform to the ARM SMMU
DeviceTree binding.
Signed-off-by: Bjorn Andersson
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
b
On Mon 11 Apr 04:50 CDT 2022, Rohit Agarwal wrote:
> Add smem node to support shared memory manager on SDX65 platform.
>
> Signed-off-by: Rohit Agarwal
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi
>
On Mon 08 Nov 09:17 PST 2021, Rob Clark wrote:
> From: Rob Clark
>
> It is a 64b register, lets not lose the upper bits.
>
> Fixes: ab5df7b953d8 ("iommu/arm-smmu-qcom: Add an adreno-smmu-priv callback
> to get pagefault info")
> Signed-off-by: Rob Clark
SCM to be built on non-Qualcomm
devices. But as Daniel experienced, attempting to boot most Qualcomm
boards without this results in a instant reboot.
I think it's okay if we tinker with CONFIG_ARM_SMMU_QCOM for v5.16, but
we're getting late in v5.15 so I would prefer if we make sure
On Fri 01 Oct 07:00 PDT 2021, Loic Poulain wrote:
> Signed-off-by: Loic Poulain
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index 55690af.
On Tue 28 Sep 02:50 CDT 2021, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Now that SCM can be a loadable module, we have to add another
> dependency to avoid link failures when ipa or adreno-gpu are
> built-in:
>
> aarch64-linux-ld: drivers/net/ipa/ipa_main.o: in function `ipa_probe':
> ipa_
On Wed 29 Sep 05:04 CDT 2021, Arnd Bergmann wrote:
> On Wed, Sep 29, 2021 at 11:51 AM Will Deacon wrote:
> > On Mon, Sep 27, 2021 at 05:22:13PM +0200, Arnd Bergmann wrote:
> > >
> > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
> > > index 124c41adeca1..989c83acbfee 100644
> > > --
On Mon 27 Sep 13:15 PDT 2021, Arnd Bergmann wrote:
> On Mon, Sep 27, 2021 at 9:52 PM Bjorn Andersson
> wrote:
> > On Mon 27 Sep 08:22 PDT 2021, Arnd Bergmann wrote:
> > > From: Arnd Bergmann
> > >
> > > - To avoid a circular dependency chain
On Mon 27 Sep 08:22 PDT 2021, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Now that SCM can be a loadable module, we have to add another
> dependency to avoid link failures when ipa or adreno-gpu are
> built-in:
>
> aarch64-linux-ld: drivers/net/ipa/ipa_main.o: in function `ipa_probe':
> ipa_
On Wed 21 Jul 16:07 CDT 2021, Saravana Kannan wrote:
> On Wed, Jul 21, 2021 at 1:23 PM Bjorn Andersson
> wrote:
> >
> > On Wed 21 Jul 13:00 CDT 2021, Saravana Kannan wrote:
> >
> > > On Wed, Jul 21, 2021 at 10:24 AM John Stultz
> > > wrote:
> >
On Wed 21 Jul 13:00 CDT 2021, Saravana Kannan wrote:
> On Wed, Jul 21, 2021 at 10:24 AM John Stultz wrote:
> >
> > On Wed, Jul 21, 2021 at 4:54 AM Greg Kroah-Hartman
> > wrote:
> > >
> > > On Wed, Jul 07, 2021 at 04:53:20AM +, John Stultz wrote:
> > > > Allow the qcom_scm driver to be loadab
On Mon 19 Jul 16:53 CDT 2021, Saravana Kannan wrote:
> On Mon, Jul 19, 2021 at 12:36 PM Bjorn Andersson
> wrote:
> >
> > On Mon 19 Jul 14:00 CDT 2021, John Stultz wrote:
> >
> > > On Fri, Jul 16, 2021 at 10:01 PM Bjorn Andersson
> > > wrote:
> &g
On Mon 19 Jul 14:00 CDT 2021, John Stultz wrote:
> On Fri, Jul 16, 2021 at 10:01 PM Bjorn Andersson
> wrote:
> > On Tue 06 Jul 23:53 CDT 2021, John Stultz wrote:
> > > Allow the qcom_scm driver to be loadable as a permenent module.
> > >
> > > T
y the idea that some people are
turning the boot process into a lottery)
Regards,
Bjorn
> Cc: Catalin Marinas
> Cc: Will Deacon
> Cc: Andy Gross
> Cc: Bjorn Andersson
> Cc: Joerg Roedel
> Cc: Thomas Gleixner
> Cc: Marc Zyngier
> Cc: Linus Walleij
> Cc: Vinod
On Sun 04 Jul 13:20 CDT 2021, Rob Clark wrote:
> I suspect you are getting a dpu fault, and need:
>
> https://lore.kernel.org/linux-arm-msm/CAF6AEGvTjTUQXqom-xhdh456tdLscbVFPQ+iud1H1gHc8A2=h...@mail.gmail.com/
>
> I suppose Bjorn was expecting me to send that patch
>
No, I left that discussion
On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote:
[..]
> diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
> index 50d881794758..6975b95c3c29 100644
> --- a/drivers/gpu/drm/msm/msm_iommu.c
> +++ b/drivers/gpu/drm/msm/msm_iommu.c
> @@ -211,8 +211,17 @@ static int msm_fault_
>
> This will be used on the GPU side to "freeze" the GPU while we snapshot
> useful state for devcoredump.
>
> Signed-off-by: Rob Clark
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 33
On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote:
> From: Jordan Crouse
>
> Use the new adreno-smmu-priv fault info function to get more SMMU
> debug registers and print the current TTBR0 to debug per-instance
> pagetables and figure out which GPU block generated the request.
>
y: Rob Clark
I presume this implies that more generic options has been discussed.
Regardless, if further conclusions are made in that regard I expect that
this could serve as a base for such efforts.
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm
On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote:
> From: Jordan Crouse
>
> Call report_iommu_fault() to allow upper-level drivers to register their
> own fault handlers.
>
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
> Acked-by: Will Deacon
Reviewed-by: B
On Sun 23 May 16:25 CDT 2021, Martin Botka wrote:
> Add compatible for SM6125 SoC
>
Reviewed-by: Bjorn Andersson
But please, don't forget to update the dt-binding.
Regards,
Bjorn
> Signed-off-by: Martin Botka
> ---
> Changes in V2:
> Add commit description
> driv
On Tue 20 Apr 01:04 CDT 2021, Sai Prakash Ranjan wrote:
> Add compatible for SC7280 SMMU to use the Qualcomm Technologies, Inc.
> specific implementation.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Sai Prakash Ranjan
> ---
> drivers/iommu/arm/arm-sm
On Mon 24 May 07:03 CDT 2021, Lee Jones wrote:
> On Wed, 8 Jan 2020 at 09:16, Will Deacon wrote:
>
> > On Thu, Dec 26, 2019 at 02:17:06PM -0800, Bjorn Andersson wrote:
> > > These patches implements the stream mapping inheritance that's necessary
> > in
&
> Suggested-by: Akhil P Oommen
> Signed-off-by: Sai Prakash Ranjan
Sorry for taking my time thinking about this.
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 12 +---
> 1 file changed, 9 insertions(+), 3 deletions
On Sat 27 Feb 07:53 CST 2021, Sai Prakash Ranjan wrote:
> Hi Bjorn,
>
> On 2021-02-27 00:44, Bjorn Andersson wrote:
> > On Fri 26 Feb 12:23 CST 2021, Rob Clark wrote:
> >
> >
> > The current logic picks one of:
> > 1) is the compatible mentioned in
On Fri 26 Feb 12:23 CST 2021, Rob Clark wrote:
> On Fri, Feb 26, 2021 at 9:24 AM Bjorn Andersson
> wrote:
> >
> > On Fri 26 Feb 03:55 CST 2021, Sai Prakash Ranjan wrote:
> >
> > > Adreno(GPU) SMMU and APSS(Application Processor SubSystem) SMMU
> > > bot
On Fri 26 Feb 03:55 CST 2021, Sai Prakash Ranjan wrote:
> Adreno(GPU) SMMU and APSS(Application Processor SubSystem) SMMU
> both implement "arm,mmu-500" in some QTI SoCs and to run through
> adreno smmu specific implementation such as enabling split pagetables
> support, we need to match the "qcom
The primary SMMU found in Qualcomm SC8180X platform needs to use the
Qualcomm implementation, so add a specific compatible for this.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm
Add compatible for the ARM SMMU found in the Qualcomm SC8180x platform.
Signed-off-by: Bjorn Andersson
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
b/Documentation/devicetree
- the context bank picked to emulate translation
bypass.
Resolve this by explicitly disabling the bypass context already in
cfg_probe.
Fixes: f9081b8ff593 ("iommu/arm-smmu-qcom: Implement S2CR quirk")
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 ++
1
On Mon 14 Dec 07:47 CST 2020, Zheng Yongjun wrote:
> The parameter of kfree function is NULL, so kfree code is useless, delete it.
>
> Signed-off-by: Zheng Yongjun
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/msm_iommu.c | 6 +-
> 1 file changed,
On Thu, Nov 19, 2020 at 11:42 AM Thierry Reding
wrote:
>
> From: Thierry Reding
>
> Commit d0511b5496c0 ("firmware: QCOM_SCM: Allow qcom_scm driver to be
> loadable as a permenent module") causes the ARM SMMU driver to be built
> as a loadable module when using the Aarch64 default configuration.
e not ideal in some cases its the
> only safe way I can find to avoid build errors without having
> those drivers select QCOM_SCM and have to force it on (as
> QCOM_SCM=n can be valid for those drivers).
>
> Cc: Catalin Marinas
> Cc: Will Deacon
> Cc: Andy Gross
> Cc:
ecomes a maintenance
> headache.
>
> We also add PINCTRL_MSM to the arm64 defconfig to avoid
> surprises as otherwise PINCTRL_MSM/IPQ* options previously
> enabled, will be off.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Cc: Catalin Marinas
> Cc: Will Deacon
>
; > a terminated CP read could hang the GPU by returning invalid
> > command-stream data.
> >
> > Signed-off-by: Rob Clark
> > Reviewed-by: Bjorn Andersson
> > Signed-off-by: Jordan Crouse
> > ---
> >
> > drivers/iommu/arm/arm-smmu/arm-smmu-qc
means of
configuring the stream for translation using a reserved and disabled
context bank.
Also circumvent the problem of configuring faulting streams by
configuring the stream as bypass.
Signed-off-by: Bjorn Andersson
---
Changes since v4:
- Made the bypass_cbndx an integer...
- Separated out
-smmu driver maintain the streams in bypass mode.
Signed-off-by: Bjorn Andersson
---
Changes since v4:
- Don't increment s2cr[i]->count, as this is not actually needed to survive
probe deferral
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 23 ++
1 file changed, 23 in
function, to allow the Qualcomm driver to work around this
behavior.
Reviewed-by: Robin Murphy
Signed-off-by: Bjorn Andersson
---
Changes since v4:
- Return early instead of indenting the rest of the function
drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 ++---
drivers/iommu/arm/arm-smmu
of a context bank for bypass
emulation and use of this context bank pretty much isolated to the
Qualcomm specific implementation.
The patchset has been tested to boot DB845c and RB5 (with splash screen)
and Lenovo Yoga C630 (with EFI framebuffer).
Bjorn Andersson (3):
iommu/arm-smmu:
On Mon 19 Oct 09:04 CDT 2020, Robin Murphy wrote:
> On 2020-10-17 05:39, Bjorn Andersson wrote:
> > The firmware found in some Qualcomm platforms intercepts writes to S2CR
> > in order to replace bypass type streams with fault; and ignore S2CR
> > updates of type fault.
On Mon 19 Oct 09:03 CDT 2020, Robin Murphy wrote:
> On 2020-10-17 05:39, Bjorn Andersson wrote:
> > The Qualcomm boot loader configures stream mapping for the peripherals
> > that it accesses and in particular it sets up the stream mapping for the
> > display controller to b
function, to allow the Qualcomm driver to work around this
behavior.
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- New patch
drivers/iommu/arm/arm-smmu/arm-smmu.c | 22 ++
drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 +
2 files changed, 15 insertions(+), 8 deletions
ntext bank for bypass emulation and use of
this context bank pretty much isolated to the Qualcomm specific implementation.
As before the patchset has been tested to boot DB845c (with splash screen) and
Lenovo Yoga C630 (with EFI framebuffer).
Bjorn Andersson (3):
iommu/arm-smmu: Allow implement
-smmu driver maintain the streams in bypass mode.
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- Extracted from different patch in v3.
- Now configures the stream as BYPASS, rather than translate, which should work
for platforms with working S2CR handling as well.
drivers/iommu/arm/arm
means of
configuring the stream for translation using a reserved and disabled
context bank.
Also circumvent the problem of configuring faulting streams by
configuring the stream as bypass.
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- Move the reservation of the "identity context
On Mon 21 Sep 23:08 CEST 2020, Will Deacon wrote:
> On Sat, Sep 12, 2020 at 10:25:59PM -0500, Bjorn Andersson wrote:
> > On Fri 11 Sep 12:13 CDT 2020, Robin Murphy wrote:
> > > On 2020-09-04 16:55, Bjorn Andersson wrote:
> > > > Add a new operation to allow platform
On Mon 21 Sep 16:08 CDT 2020, Will Deacon wrote:
> On Sat, Sep 12, 2020 at 10:25:59PM -0500, Bjorn Andersson wrote:
> > On Fri 11 Sep 12:13 CDT 2020, Robin Murphy wrote:
> > > On 2020-09-04 16:55, Bjorn Andersson wrote:
> > > > Add a new operation to allow platform
ovided a better solution in his
> Hybrid probing patch set, I wanted to re-submit this change.
>
Reviewed-by: Bjorn Andersson
> Cc: Andy Gross
> Cc: Bjorn Andersson
> Cc: Joerg Roedel
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
> Cc: Linus Walleij
On Fri 11 Sep 12:13 CDT 2020, Robin Murphy wrote:
> On 2020-09-04 16:55, Bjorn Andersson wrote:
> > Add a new operation to allow platform implementations to inherit any
> > stream mappings from the boot loader.
>
> Is there a reason we need an explicit step for this? The a
On Tue 01 Sep 11:46 CDT 2020, Rob Clark wrote:
> From: Rob Clark
>
> Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
> split pagetables and per-instance pagetables for drm/msm.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Rob Clark
> ---
>
On Tue 01 Sep 11:46 CDT 2020, Rob Clark wrote:
> From: Jordan Crouse
>
> Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
> split pagetables and per-instance pagetables for drm/msm.
>
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
Reviewe
ings might linger and reference context banks that Linux is
reconfiguring.
Use the fact that BYPASS writes result in FAULT type to force all stream
mappings to FAULT.
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- None
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 18
Some platform implementations needs to be able to allocate a domain for
emulating identity mappings using a context bank without translation.
Provide a helper function to allocate such a domain.
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- Extracted from previous
SMMU.
This adds a Qualcomm specific cfg_probe function, which probes for the
broken behavior of the S2CR registers and implements a custom
alloc_context_bank() that when necessary allocates a context bank
(without translation) for these domains as well.
Signed-off-by: Bjorn Andersson
---
Changes
passed object.
This allows us to not assign smmu_domain->smmu before attempting to
allocate the context bank and as such we don't need to roll back this
assignment on failure.
Signed-off-by: Bjorn Andersson
---
Note that this series applies ontop of:
https://lore.kernel.org/linux
Add a new operation to allow platform implementations to inherit any
stream mappings from the boot loader.
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- New patch/interface
drivers/iommu/arm/arm-smmu/arm-smmu.c | 11 ++-
drivers/iommu/arm/arm-smmu/arm-smmu.h | 6 ++
2
le bit cleaner.
So perhaps you would be interested in squashing
https://lore.kernel.org/linux-arm-msm/20200904155513.282067-2-bjorn.anders...@linaro.org/
into this patch?
Otherwise, feel free to add my:
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm/arm-smmu/arm-
consulted and if
it decides to use a context bank for the identity map, don't enable
translation (i.e. omit ARM_SMMU_SCTLR_M).
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- Tie this to alloc_context_bank rather than carrying a Qualcomm specific quirk
in the generic code.
drivers/
Delay modifications to the domain during arm_smmu_init_domain_context()
until we've allocated a context bank. This will allow us to postpone the
special handling of identity domains until the platform specific context
bank allocator has been executed, in a later patch.
Signed-off-by:
context bank is used and
streams are diverted here during initialization.
This also performs the readback of SMR registers for the Qualcomm
platform, to trigger the mechanism.
This is based on prior work by Thierry Reding and Laurentiu Tudor.
Signed-off-by: Bjorn Andersson
---
Changes since v2
eries, which can be
found at
https://lore.kernel.org/linux-arm-msm/20200901164707.2645413-1-robdcl...@gmail.com/
Bjorn Andersson (8):
iommu/arm-smmu: Refactor context bank allocation
iommu/arm-smmu: Delay modifying domain during init
iommu/arm-smmu: Consult context bank allocator for identify do
vers/iommu/amd/init.c:1938: warning: Function parameter or member
> 'iommu' not described in 'iommu_update_intcapxt'
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/iommu/amd/init.c | 4 ++--
> 1 file changed, 2 insertions(+),
On Tue 28 Jul 12:08 CDT 2020, Krzysztof Kozlowski wrote:
> Fix W=1 compile warnings (invalid kerneldoc):
>
> drivers/iommu/intel/dmar.c:389: warning: Function parameter or member
> 'header' not described in 'dmar_parse_one_drhd'
>
Reviewed-by: Bjorn And
910:34: warning: 'qcom_iommu_of_match' defined
> but not used [-Wunused-const-variable=]
> 910 | static const struct of_device_id qcom_iommu_of_match[] = {
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/iommu/qcom_iommu.c | 4 ++--
>
On Tue 01 Sep 03:42 UTC 2020, Rob Clark wrote:
> On Mon, Aug 31, 2020 at 7:35 PM Bjorn Andersson
> wrote:
> >
> > On Fri 14 Aug 02:40 UTC 2020, Rob Clark wrote:
> >
> > > From: Rob Clark
> > >
> > > Currently it doesn't matter, sin
On Fri 14 Aug 02:40 UTC 2020, Rob Clark wrote:
> From: Rob Clark
>
> Currently it doesn't matter, since we free the ctx immediately. But
> when we start refcnt'ing the ctx, we don't want old dangling list
> entries to hang around.
>
> Signed-off-by: Rob
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote:
> From: Rob Clark
>
> In $debugfs/gem we already show any vma(s) associated with an object.
> Also show process names if the vma's address space is a per-process
> address space.
>
Reviewed-by: Bjorn Andersson
>
gt; command-stream data.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Rob Clark
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 6 ++
> drivers/iommu/arm/arm-smmu/arm-smmu.c | 3 +++
> drivers/iommu/arm/arm-smmu/arm-smmu.h | 3 +++
> 3 files changed, 12 inser
l return a pointer to the global address space.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/msm_drv.c | 13 +++--
> drivers/gpu/drm/msm/msm_drv.h | 5 +
> drivers/gpu/drm/msm/m
ible string and
> split pagetables enabled.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/msm_gpummu.c | 2 +-
> drivers/gpu/drm/msm/msm_iommu.c | 199 ++-
> drivers/gpu/dr
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote:
> From: Jordan Crouse
>
> Use the aperture settings from the IOMMU domain to set up the virtual
> address range for the GPU. This allows us to transparently deal with
> IOMMU side features (like split pagetables).
>
Reviewed-b
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote:
> From: Jordan Crouse
>
> Now that we can get the ctx from the submitqueue, the extra arg is
> redundant.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Jordan Crouse
> [split out of previous patch to reduce churny noise]
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote:
> From: Jordan Crouse
>
> Each submitqueue is attached to a context. Add a pointer to the
> context to the submitqueue at create time and refcount it so
> that it stays around through the life of the queue.
>
Reviewed-by: Bjorn
> (TTBR1) for the domain attached to the GPU device (SID 0) and
> hard code it context bank 0 so the GPU hardware can implement
> per-instance pagetables.
>
Reviewed-by: Bjorn Andersson
> Co-developed-by: Rob Clark
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
with a compatible string so that they can be identified in the
> arm-smmu implementation specific code.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Jordan Crouse
> Reviewed-by: Rob Herring
> Signed-off-by: Rob Clark
> ---
> Documentation/devicetree/bindings/iommu/arm,
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote:
> From: Rob Clark
>
> This will be populated by adreno-smmu, to provide a way for coordinating
> enabling/disabling TTBR0 translation.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Rob Clark
> ---
> dr
On Thu 13 Aug 21:41 CDT 2020, Rob Clark wrote:
> From: Rob Clark
>
> Sprinkle a few `const`s where helpers don't need write access.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Rob Clark
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu.h | 6 +++---
> 1 fil
pu->funcs->gpu_get_freq)
> *freq = gpu->funcs->gpu_get_freq(gpu);
> diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
> index 0db117a7339b..8bda7beaed4b 100644
> --- a/drivers/gpu/drm/msm/msm_gpu.h
> +++ b/drivers/gpu/drm/msm/msm_gpu.h
erface is used to
> avoid adding highly driver specific things to the public iommu
> interface.
>
> Signed-off-by: Rob Clark
Reviewed-by: Bjorn Andersson
> ---
> include/linux/adreno-smmu-priv.h | 36
> 1 file changed, 36 insertions(+)
>
+ cfg->asid);
The old indentation seems more appropriate.
Apart from that this looks sensible.
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> +
> + if (pgtbl_cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1)
> +
able is created.
>
> Signed-off-by: Jordan Crouse
> Signed-off-by: Rob Clark
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3 ++-
> drivers/iommu/arm/arm-smmu/arm-smmu.c | 11 ++-
> drivers/iommu/arm/arm-smmu
On Fri 14 Aug 02:40 UTC 2020, Rob Clark wrote:
> From: Rob Clark
>
> Currently it doesn't matter, since we free the ctx immediately. But
> when we start refcnt'ing the ctx, we don't want old dangling list
> entries to hang around.
>
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/msm_
On Wed 22 Jul 13:11 PDT 2020, Konrad Dybcio wrote:
> >Is the problem on SDM630 that when you write to SMR/S2CR the device
> >reboots? Or that when you start writing out the context bank
> >configuration that trips the display and the device reboots?
>
> I added some debug prints and the phone han
On Mon 20 Jul 08:40 PDT 2020, Jordan Crouse wrote:
> diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c
[..]
> +static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain
> *smmu_domain,
> + struct device *dev, int start, int count)
> +{
> + struc
On Tue 21 Jul 09:20 PDT 2020, Konrad Dybcio wrote:
> >The current
> >focus has been on moving more of the SMMU specific bits into the
> >arm-smmu-qcom
> >implementation [1] and I think that is the right way to go.
>
> Pardon if I overlooked something obvious, but I can't seem to find a
> clean w
translation.
Tested-by: John Stultz
Tested-by: Vinod Koul
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Picked up tested-by
drivers/iommu/arm-smmu-qcom.c | 21 +
drivers/iommu/arm-smmu.c | 14 --
drivers/iommu/arm-smmu.h | 3 +++
3 files changed
: Bjorn Andersson
---
Changes since v1:
- Rebased to avoid conflict
- Picked up tested-by
drivers/iommu/arm-smmu-qcom.c | 11 +
drivers/iommu/arm-smmu.c | 79 +--
drivers/iommu/arm-smmu.h | 3 ++
3 files changed, 89 insertions(+), 4 deletions
Koul
Suggested-by: Robin Murphy
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Mark arm_smmu_setup_identity() static
- Picked up tested-by tags
drivers/iommu/arm-smmu.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-s
ings might linger and reference context banks that Linux is
reconfiguring.
Use the fact that BYPASS writes result in FAULT type to force all stream
mappings to FAULT.
Tested-by: John Stultz
Tested-by: Vinod Koul
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Fixed subject spelling mistak
Expose the SMR and S2CR structs in the header file, to allow platform
specific implementations to populate/initialize the smrs and s2cr
arrays.
Tested-by: John Stultz
Tested-by: Vinod Koul
Signed-off-by: Bjorn Andersson
---
Changes since v1:
- Picked up tested-by
drivers/iommu/arm-smmu.c
shown to allow booting SDM845, SDM850, SM8150,
SM8250 with boot splash screen setup by the bootloader. Specifically it also
allows the Lenovo Yoga C630 to boot with SMMU and efifb enabled.
Bjorn Andersson (5):
iommu/arm-smmu: Make all valid stream mappings BYPASS
iommu/arm-smmu: Emulate bypa
On Thu 09 Jul 08:50 PDT 2020, Laurentiu Tudor wrote:
>
>
> On 7/9/2020 8:01 AM, Bjorn Andersson wrote:
> > With many Qualcomm platforms not having functional S2CR BYPASS a
> > temporary IOMMU domain, without translation, needs to be allocated in
> > order to allo
On Thu 09 Jul 11:55 PDT 2020, Rob Clark wrote:
> On Thu, Jul 9, 2020 at 9:56 AM Rob Clark wrote:
> >
> > On Thu, Jul 9, 2020 at 9:48 AM Bjorn Andersson
> > wrote:
> > >
> > > On Thu 09 Jul 09:17 PDT 2020, Rob Clark wrote:
> > >
> &g
On Thu 09 Jul 09:17 PDT 2020, Rob Clark wrote:
> On Wed, Jul 8, 2020 at 10:01 PM Bjorn Andersson
> wrote:
[..]
> > @@ -678,7 +680,11 @@ static int arm_smmu_init_domain_context(struct
> > iommu_domain *domain,
> > if (smmu_domain->smmu)
> >
ings might linger and reference context banks that Linux is
reconfiguring.
Use the fact that BYPASS writes result in FAULT type to force all stream
mappings to FAULT.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm-smmu-qcom.c | 18 +-
1 file changed, 17 insertions(+),
Expose the SMR and S2CR structs in the header file, to allow platform
specific implementations to populate/initialize the smrs and s2cr
arrays.
Signed-off-by: Bjorn Andersson
---
drivers/iommu/arm-smmu.c | 14 --
drivers/iommu/arm-smmu.h | 15 +++
2 files changed, 15
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