On 2021/9/7 17:43, Robin Murphy wrote:
On 2021-09-07 08:41, Kunkun Jiang wrote:
Hi all,
I am working on VFIO DMA dirty pages tracking based on ARM SMMU HTTU,
and have done a lot of testing.In the test, I found a problem that
greatly affects
performance of VFIO DMA dirty pages tracking
.
Thanks,
Kunkun Jiang
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m really need it. If you remove it, I have to add it back.
Thanks,
Kunkun Jiang
static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data,
struct iommu_iotlb_gather *gather,
- unsigned
Hi Robin,
On 2021/5/19 18:01, Robin Murphy wrote:
On 2021-05-19 10:43, Kunkun Jiang wrote:
Hi all,
This set of patches solves some errors when I tested the SMMU nested
mode.
Test scenario description:
guest kernel: 4KB translation granule
host kernel: 16KB translation granule
errors:
1
ion on the
'size' and 'granule_size' when SMMU supports RIL:
1. Align 'size' with the smallest granule size supported by SMMU upwards.
2. If the granule size isn't supported by SMMU, we set it to the smallest
granule size supported by SMMU
I sent two patches to fix them in the __arm_smmu_tlb_inv_r
-by: Nianyao Tang
Signed-off-by: Kunkun Jiang
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 54b2f27b81d4..8a2cacbb1ef8 100644
--- a/drivers
is supported by the SMMU before set
the 'ttl' value.
Reported-by: Nianyao Tang
Signed-off-by: Kunkun Jiang
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
b/drivers/iommu/arm/arm-smmu-v3/arm
supports RIL
Kunkun Jiang (2):
iommu/arm-smmu-v3: Align invalid range with leaf page size upwards
when support RIL
iommu/arm-smmu-v3: Standardize granule size when support RIL
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 +
1 file changed, 9 insertions(+)
--
2.23.0
f (!(smmu->features & ARM_SMMU_FEAT_RANGE_INV) &&
+ !(granule_size & smmu_domain->domain.pgsize_bitmap)) {
+ tg = __ffs(smmu_domain->domain.pgsize_bitmap);
+ granule_size = 1 << tg;
+ size = size
On 2021/4/9 16:31, Auger Eric wrote:
Hi Kunkun,
On 4/9/21 6:48 AM, Kunkun Jiang wrote:
Hi Eric,
On 2021/4/8 20:30, Auger Eric wrote:
Hi Kunkun,
On 4/1/21 2:37 PM, Kunkun Jiang wrote:
Hi Eric,
On 2021/2/24 4:56, Eric Auger wrote:
With nested stage support, soon we will need to invalidate
Hi Eric,
On 2021/4/8 20:30, Auger Eric wrote:
Hi Kunkun,
On 4/1/21 2:37 PM, Kunkun Jiang wrote:
Hi Eric,
On 2021/2/24 4:56, Eric Auger wrote:
With nested stage support, soon we will need to invalidate
S1 contexts and ranges tagged with an unmanaged asid, this
latter being managed
ain->
domain.pgsize_bitmap). In nested mode, it is determined by host
PAGE_SIZE. If
the host kernel and guest kernel has different translation granule (e.g.
host 16K,
guest 4K), __arm_smmu_tlb_inv_range() will issue an incorrect tlbi command.
Do you have any idea about this is
)
+
The macro *define VFIO_REGION_TYPE_NESTED (2)* is in conflict with
*#define VFIO_REGION_TYPE_CCW (2)*.
Thanks,
Kunkun Jiang.
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Knowing from the code, the macro "iopte_type(pte, l)" doesn't use the
parameter "l" (level). So we'd better to remove it.
Fixes: e1d3c0fd701df(iommu: add ARM LPAE page table allocator)
Signed-off-by: Kunkun Jiang
---
drivers/iommu/io-pgtable-arm.c | 10 +-
1 file c
Knowing from the code, the macro "iopte_type(pte, l)" doesn't use the
parameter "l" (level). So we'd better to remove it.
Fixes: e1d3c0fd701df(iommu: add ARM LPAE page table allocator)
Signed-off-by: Kunkun Jiang
---
drivers/iommu/io-pgtable-arm.c | 2 +-
1 file change
On 2020/12/3 21:01, Auger Eric wrote:
Hi Kunkun,
On 12/3/20 1:32 PM, Kunkun Jiang wrote:
Hi Eric,
On 2020/11/18 19:21, Eric Auger wrote:
When nested stage translation is setup, both s1_cfg and
s2_cfg are set.
We introduce a new smmu domain abort field that will be set
upon guest stage1
D7
#define STRTAB_STE_0_S1FMT GENMASK_ULL(5, 4)
#define STRTAB_STE_0_S1FMT_LINEAR 0
@@ -682,6 +683,7 @@ struct arm_smmu_domain {
enum arm_smmu_domain_stage stage;
struct arm_smmu_s1_cfg s1_cfg;
struct arm_smmu_s2_cfg s2_cfg;
+ b
Hi Will and Robin,
Sorry for the late reply.
On 2020/11/3 18:21, Robin Murphy wrote:
On 2020-11-03 09:11, Will Deacon wrote:
On Tue, Nov 03, 2020 at 11:00:27AM +0800, Kunkun Jiang wrote:
Recently, I have read and learned the code related to io-pgtable-arm.c.
There
are two question
ou please
give me more hints?
Thanks,
Kunkun Jiang
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