Re: [PATCH] iommu/arm-smmu-v3: Set GBPA to abort all transactions

Hi Mark, On 4/12/2018 7:56 AM, Marc Zyngier wrote: On 12/04/18 11:17, Robin Murphy wrote: On 11/04/18 17:54, Marc Zyngier wrote: Hi Sammer, On 11/04/18 16:58, Goel, Sameer wrote: On 3/28/2018 9:00 AM, Marc Zyngier wrote: On 2018-03-28 15:39, Timur Tabi wrote: From: Sameer Goel

[PATCH v2] iommu/arm-smmu-v3: limit reporting of MSI allocation failures

incapable of describing SMMU MSI topology (ACPI IORT prior to rev.C). Remedy this by checking msi_domain before attempting to allocate SMMU MSIs. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> Signed-off-by: Sinan Kaya <ok...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 7 +

[PATCH] iommu/arm-smmu-v3: suppress MSI allocation failure message

arning and is causing support issues. Better reduce the message level. Signed-off-by: Sinan Kaya <ok...@codeaurora.org> Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm-s

Re: [PATCH 2/4] iommu/io-pgtable-arm: Support 52-bit physical address

Hi Robin, On 11/29/2017 6:29 AM, Robin Murphy wrote: Hi Nate, On 29/11/17 07:07, Nate Watterson wrote: Hi Robin, On 11/28/2017 12:27 PM, Robin Murphy wrote: Bring io-pgtable-arm in line with the ARMv8.2-LPA feature allowing 52-bit physical addresses when using the 64KB translation granule

Re: [PATCH v2 0/3] arm-smmu: performance optimization

someone else. Tested-by: Nate Watterson <nwatt...@codeaurora.org> Thanks, Nate iommu/arm-smmu: add support for unmap a memory range with only one tlb sync drivers/iommu/arm-smmu-v3.c| 52 ++ drivers/iommu/arm-smmu.c | 10

Re: [PATCH 1/1] iommu/iova: Make rcache flush optional on IOVA allocation failure

ue I reported in [1]!! Tested-by: Nate Watterson <nwatt...@codeaurora.org> Thanks, Nate Signed-off-by: Tomasz Nowicki <tomasz.nowi...@caviumnetworks.com> --- drivers/iommu/amd_iommu.c | 5 +++-- drivers/iommu/dma-iommu.c | 6 -- drivers/iommu/intel-iommu.c | 5 +++-- drivers/

Re: [PATCH v3 0/4] Optimise 64-bit IOVA allocations

% of passthrough mode. I also got similar results by altogether removing the 32-bit allocation from iommu_dma_alloc_iova() which makes me wonder why we even bother. What (PCIe) workloads have been shown to actually benefit from it? Tested-by: Nate Watterson <nwatt...@codeaurora.org> -Nate

Re: [PATCH 0/3] SMMUv3 CMD_SYNC optimisation

Hi Robin, On 8/18/2017 1:33 PM, Robin Murphy wrote: Hi all, Waiting for the command queue to drain for CMD_SYNC completion is likely a contention hotspot on high-core-count systems. If the SMMU is coherent and supports MSIs, though, we can use this cool feature (as suggested by the

Re: [PATCH v2 3/4] iommu/iova: Extend rbtree node caching

Hi Robin, On 7/31/2017 7:42 AM, Robin Murphy wrote: Hi Nate, On 29/07/17 04:57, Nate Watterson wrote: Hi Robin, I am seeing a crash when performing very basic testing on this series with a Mellanox CX4 NIC. I dug into the crash a bit, and think this patch is the culprit, but this rcache

Re: [PATCH v2 3/4] iommu/iova: Extend rbtree node caching

Hi Robin, I am seeing a crash when performing very basic testing on this series with a Mellanox CX4 NIC. I dug into the crash a bit, and think this patch is the culprit, but this rcache business is still mostly witchcraft to me. # ifconfig eth5 up # ifconfig eth5 down Unable to handle kernel

Re: [PATCH 1/5] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction

Hi Jonathan, [...] Hi All, I'm a bit of late entry to this discussion. Just been running some more detailed tests on our d05 boards and wanted to bring some more numbers to the discussion. All tests against 4.12 with the following additions: * Robin's series removing the io-pgtable

Re: [PATCH 1/5] iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock confliction

Hi Jonathan, On 7/17/2017 10:23 AM, Jonathan Cameron wrote: On Mon, 17 Jul 2017 14:06:42 +0100 John Garry wrote: + On 29/06/2017 03:08, Leizhen (ThunderTown) wrote: On 2017/6/28 17:32, Will Deacon wrote: Hi Zhen Lei, Nate (CC'd), Robin and I have been working on

Re: [PATCH v2] iommu/arm-smmu-v3: Implement shutdown method

I should have removed the '-v3' since this revision of the patch adds shutdown to arm-smmu.c as well. I'll fix that in a subsequent version after waiting to see if there are additional changes that need to be made. On 6/29/2017 6:18 PM, Nate Watterson wrote: The shutdown method disables

[PATCH v2] iommu/arm-smmu-v3: Implement shutdown method

The shutdown method disables the SMMU to avoid corrupting a new kernel started with kexec. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 7 +++ drivers/iommu/arm-smmu.c| 6 ++ 2 files changed, 13 insertions(+) diff --git a/drivers

Re: [PATCH] iommu/arm-smmu-v3: Implement shutdown method

On 6/29/2017 2:34 PM, Will Deacon wrote: On Thu, Jun 29, 2017 at 01:40:15PM -0400, Nate Watterson wrote: The shutdown method disables the SMMU and its interrupts to avoid potentially corrupting a new kernel started with kexec. Signed-off-by: Nate Watterson <nwatt...@codeaurora.

Re: [PATCH 0/8] io-pgtable lock removal

Hi Robin, On 6/8/2017 7:51 AM, Robin Murphy wrote: Hi all, Here's the cleaned up nominally-final version of the patches everybody's keen to see. #1 is just a non-critical thing-I-spotted-in-passing fix, #2-#4 do some preparatory work (and bid farewell to everyone's least favourite bit of code,

Re: [PATCH 0/7] Add PCI ATS support to SMMUv3

Hi Jean-Philippe, On 5/24/2017 2:01 PM, Jean-Philippe Brucker wrote: PCIe devices can implement their own TLB, named Address Translation Cache (ATC). In order to support Address Translation Service (ATS), the following changes are needed in software: * Enable ATS on endpoints when the system

Re: [PATCH V11 08/11] drivers: acpi: Handle IOMMU lookup failure with deferred probing or error

Hi Lorenzo, On 5/23/2017 5:26 AM, Lorenzo Pieralisi wrote: On Tue, May 23, 2017 at 02:31:17PM +0530, Sricharan R wrote: Hi Lorenzo, On 5/23/2017 2:22 PM, Lorenzo Pieralisi wrote: On Tue, May 23, 2017 at 02:26:10AM -0400, Nate Watterson wrote: Hi Sricharan, On 4/10/2017 7:21 AM, Sricharan R

Re: [PATCH] iommu/dma: Setup iova_domain granule for IOMMU_DMA_MSI cookies

On 5/16/2017 3:55 PM, Auger Eric wrote: Hi, On 13/04/2017 21:38, Nate Watterson wrote: Hi Robin, On 4/13/2017 7:21 AM, Robin Murphy wrote: Hi Nate, On 13/04/17 09:55, Nate Watterson wrote: Currently, the __iommu_dma_{map/free} functions call iova_{offset/align} making them unsuitable

Re: [PATCH] iommu/dma: Setup iova_domain granule for IOMMU_DMA_MSI cookies

Hi Robin, On 4/13/2017 7:21 AM, Robin Murphy wrote: Hi Nate, On 13/04/17 09:55, Nate Watterson wrote: Currently, the __iommu_dma_{map/free} functions call iova_{offset/align} making them unsuitable for use with iommu_domains having an IOMMU_DMA_MSI cookie since the cookie's iova_domain member

[PATCH] iommu/dma: Setup iova_domain granule for IOMMU_DMA_MSI cookies

IOVA allocation") Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/dma-iommu.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 8348f366..d7b0816 100644 --- a/drivers/iommu/dma-iommu.c +++

Re: [RESEND,3/3] iommu/dma: Plumb in the per-CPU IOVA caches

Hi Robin, On 4/6/2017 2:56 PM, Robin Murphy wrote: On 06/04/17 19:15, Manoj Iyer wrote: On Fri, 31 Mar 2017, Robin Murphy wrote: With IOVA allocation suitably tidied up, we are finally free to opt in to the per-CPU caching mechanism. The caching alone can provide a modest improvement over

[PATCH] iommu/iova: fix underflow bug in __alloc_and_insert_iova_range

{0, 0} /* Expected */ *good_iova == {2, 3} /* Expected */ *bad_iova == {-2, -1} /* Oh no... */ After the patch, bad_iova is NULL as expected since inadequate space remains between limit_pfn and start_pfn after allocating good_iova. Signed-off-by: Nate Watterson <nwatt...@codeaurora.

Re: [PATCH 0/3] IOVA allocation improvements for iommu-dma

. As you suspected would happen, contention has indeed moved to the io-pgtable lock. I am looking forward to testing with the lock-free io-pgtable implementation, however I suspect that there will still be contention issues acquiring the (SMMUv3) cmdq lock on the unmap path. Reviewed/Tested-by: Nate

Re: [PATCH v2 3/5] iommu/arm-smmu-v3: Make arm_smmu_install_ste_for_dev return void

Hi Will, On 2017-03-10 15:49, Will Deacon wrote: arm_smmu_install_ste_for_dev cannot fail and always returns 0, however the fact that it returns int means that callers end up implementing redundant error handling code which complicates STE tracking and is never executed. This patch changes the

Re: [PATCH v2 4/5] iommu/arm-smmu-v3: Install bypass STEs for IOMMU_DOMAIN_IDENTITY domains

Hi Will, On 2017-03-10 15:49, Will Deacon wrote: In preparation for allowing the default domain type to be overridden, this patch adds support for IOMMU_DOMAIN_IDENTITY domains to the ARM SMMUv3 driver. An identity domain is created by placing the corresponding stream table entries into

Re: [PATCH V7 08/11] drivers: acpi: Handle IOMMU lookup failure with deferred probing or error

On 2017-02-01 13:52, Lorenzo Pieralisi wrote: I debugged the issue and Nate's fix is correct, the fact that you can't it hit it with mainline is just a matter of timing because it has to do with the CTX pointer value (we OR it with the existing value), so it may work or not depending on how the

Re: [PATCH V7 08/11] drivers: acpi: Handle IOMMU lookup failure with deferred probing or error

On 2017-01-30 09:38, Will Deacon wrote: On Mon, Jan 30, 2017 at 09:33:50AM -0500, Sinan Kaya wrote: On 1/30/2017 9:23 AM, Nate Watterson wrote: > On 2017-01-30 08:59, Sinan Kaya wrote: >> On 1/30/2017 7:22 AM, Robin Murphy wrote: >>> On 29/01/17 17:53, Sinan Kaya wrote: >

Re: [PATCH V7 08/11] drivers: acpi: Handle IOMMU lookup failure with deferred probing or error

On 2017-01-30 08:59, Sinan Kaya wrote: On 1/30/2017 7:22 AM, Robin Murphy wrote: On 29/01/17 17:53, Sinan Kaya wrote: On 1/24/2017 7:37 AM, Lorenzo Pieralisi wrote: [+hanjun, tomasz, sinan] It is quite a key patchset, I would be glad if they can test on their respective platforms with

[PATCH] iommu/arm-smmu-v3: limit use of 2-level stream tables

the feature and whose first level table can possibly contain more than a single entry. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 21 ++--- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/d

[PATCH] iommu/arm-smmu-v3: Clear prior settings when updating STEs

To prevent corruption of the stage-1 context pointer field when updating STEs, rebuild the entire containing dword instead of clearing individual fields. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 10 ++ 1 file changed, 2 insertions

[PATCH] iommu/arm-smmu-v3: prevent corruption of ste stage-1 context ptr

To ensure that the stage-1 context ptr for an ste points to the intended context descriptor, this patch adds code to clear away the stale context ptr value prior to or'ing in the new one. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 2 ++

[PATCH] iommu/arm-smmu-v3: avoid over allocating for l2 stream tables

e smmu to which it belongs. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4d6ec44..5dca671 100644 --- a/drivers/io

Re: [PATCH v5 14/14] drivers: acpi: iort: introduce iort_iommu_configure

On 2016-09-09 10:23, Lorenzo Pieralisi wrote: DT based systems have a generic kernel API to configure IOMMUs for devices (ie of_iommu_configure()). On ARM based ACPI systems, the of_iommu_configure() equivalent can be implemented atop ACPI IORT kernel API, with the corresponding functions to

[PATCH] iommu/iova: validate iova_domain input to put_iova_domain

. The granule can be used to check if the domain was properly initialized because calling init_iova_domain with a granule of zero would have already triggered a BUG statement crashing the kernel. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/iova.c | 4 1 file c

[PATCH] iommu/dma-iommu: respect established iova region limits

, this patch adds logic in __alloc_iova to clip input dma_limit values that are out of bounds. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/dma-iommu.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iom

[PATCH v2] iommu/arm-smmu-v3: limit use of 2-level stream tables

the feature and whose first level table can possibly contain more than a single entry. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 21 ++--- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/d

[PATCH] iommu/arm-smmu-v3: limit use of 2-level stream tables

the feature and whose first level table can possibly contain more than a single entry. Signed-off-by: Nate Watterson <nwatt...@codeaurora.org> --- drivers/iommu/arm-smmu-v3.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c