[PATCH] iommu/vt-d: Handle domain agaw being less than iommu agaw
The Intel IOMMU driver opportunistically skips a few top level page
tables from the domain paging directory while programming the IOMMU
context entry. However there is an implicit assumption in the code that
domain's adjusted guest address width (agaw) would always be greater
than IOMMU's agaw.
The IOMMU capabilities in an upcoming platform cause the domain's agaw
to be lower than IOMMU's agaw. The issue is seen when the IOMMU supports
both 4-level and 5-level paging. The domain builds a 4-level page table
based on agaw of 2. However the IOMMU's agaw is set as 3 (5-level). In
this case the code incorrectly tries to skip page page table levels.
This causes the IOMMU driver to avoid programming the context entry. The
fix handles this case and programs the context entry accordingly.
Fixes: de24e55395698 ("iommu/vt-d: Simplify domain_context_mapping_one")
Cc:
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Lu Baolu
Reviewed-by: Lu Baolu
Reported-by: Ramos Falcon, Ernesto R
Tested-by: Ricardo Neri
Signed-off-by: Sohil Mehta
---
drivers/iommu/intel-iommu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index f3ccf025108b..fdf79baf1d79 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -2044,7 +2044,7 @@ static int domain_context_mapping_one(struct dmar_domain
*domain,
* than default. Unnecessary for PT mode.
*/
if (translation != CONTEXT_TT_PASS_THROUGH) {
- for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
+ for (agaw = domain->agaw; agaw > iommu->agaw; agaw--) {
ret = -ENOMEM;
pgd = phys_to_virt(dma_pte_addr(pgd));
if (!dma_pte_present(pgd))
@@ -2058,7 +2058,7 @@ static int domain_context_mapping_one(struct dmar_domain
*domain,
translation = CONTEXT_TT_MULTI_LEVEL;
context_set_address_root(context, virt_to_phys(pgd));
- context_set_address_width(context, iommu->agaw);
+ context_set_address_width(context, agaw);
} else {
/*
* In pass through mode, AW must be programmed to
--
2.19.0
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[PATCH v8 5/6] iommu/vt-d: Add debugfs support for Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/iommu/intel/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the IRTE values for entries with the present bit set, in the format
shown.
Remapped Interrupt supported on IOMMU: dmar1
IR table address:85e50
Entry SrcID DstIDVct IRTE_high IRTE_low
2401:00.0 0001 24 0004010000010024000d
2501:00.0 0004 22 0004010000040022000d
Posted Interrupt supported on IOMMU: dmar5
IR table address:85ec0
Entry SrcID PDA_high PDA_low Vct IRTE_high IRTE_low
4 43:00.0 000f ff765980 41 000f00044300 ff76598000418001
5 43:00.0 000f ff765980 51 000f00044300 ff76598000518001
Cc: Lu Baolu
Cc: Jacob Pan
Cc: Fenghua Yu
Cc: Ashok Raj
Co-Developed-by: Gayatri Kammela
Signed-off-by: Gayatri Kammela
Reviewed-by: Andy Shevchenko
Signed-off-by: Sohil Mehta
---
v8: Improve IR table formatting
Use irq lock to proctect IRTE access
v7: Print the IR table physical base address
Simplify IR table formatting
v6: Change a couple of seq_puts to seq_putc
v5: Fix seq_puts formatting and remove leading '\n's
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_interrupt_remap file name to ir_translation_struct
v2: Handle the case when IR is not enabled. Fix seq_printf formatting
drivers/iommu/intel-iommu-debugfs.c | 108
1 file changed, 108 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debugfs.c
b/drivers/iommu/intel-iommu-debugfs.c
index 57af2f774312..2becbd78620f 100644
--- a/drivers/iommu/intel-iommu-debugfs.c
+++ b/drivers/iommu/intel-iommu-debugfs.c
@@ -131,6 +131,110 @@ static int iommu_regset_show(struct seq_file *m, void
*unused)
}
DEFINE_SHOW_ATTRIBUTE(iommu_regset);
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m,
+ struct intel_iommu *iommu)
+{
+ struct irte *ri_entry;
+ unsigned long flags;
+ int idx;
+
+ seq_puts(m, " Entry SrcID DstIDVct IRTE_high\t\tIRTE_low\n");
+
+ raw_spin_lock_irqsave(_2_ir_lock, flags);
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+
+ seq_printf(m, " %-5d %02x:%02x.%01x %08x %02x
%016llx\t%016llx\n",
+ idx, PCI_BUS_NUM(ri_entry->sid),
+ PCI_SLOT(ri_entry->sid), PCI_FUNC(ri_entry->sid),
+ ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+ raw_spin_unlock_irqrestore(_2_ir_lock, flags);
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m,
+struct intel_iommu *iommu)
+{
+ struct irte *pi_entry;
+ unsigned long flags;
+ int idx;
+
+ seq_puts(m, " Entry SrcID PDA_high PDA_low Vct
IRTE_high\t\tIRTE_low\n");
+
+ raw_spin_lock_irqsave(_2_ir_lock, flags);
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+
+ seq_printf(m, " %-5d %02x:%02x.%01x %08x %08x %02x
%016llx\t%016llx\n",
+ idx, PCI_BUS_NUM(pi_entry->sid),
+ PCI_SLOT(pi_entry->sid), PCI_FUNC(pi_entry->sid),
+ pi_entry->pda_h, pi_entry->pda_l << 6,
+ pi_entry->vector, pi_entry->high,
+ pi_entry->low);
+ }
+ raw_spin_unlock_irqrestore(_2_ir_lock, flags);
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int ir_translation_struct_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ u64 irta;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!ecap_ir_support(iommu->ecap))
+ continue;
+
+ seq_printf(m, "Remapped Interrupt supported on IOMMU: %s\n",
+ iommu->name);
+
+ if (iommu->ir_table) {
+ irta = virt_to_phys(iommu-
[PATCH v8 6/6] iommu/vt-d: Add debugfs support to show context internals
Export Intel IOMMU DMA remapping internal states, such as root and
context table entries in debugfs.
Example of such dump in Kabylake:
/sys/kernel/debug/iommu/intel/dmar_translation_struct
IOMMU dmar0: Root Table Address:45699c000
Root Table Entries:
Bus: 0 H: 0 L: 45699f001
Context Table Entries for Bus: 0
Entry B:D.F HighLow
1600:02.0 102 45699e005
IOMMU dmar1: Root Table Address:45699d000
Root Table Entries:
Bus: 0 H: 0 L: 45644f001
Context Table Entries for Bus: 0
Entry B:D.F HighLow
160 00:14.0 102 45644e001
184 00:17.0 302 456310001
248 00:1f.0 202 4564bf001
Cc: Lu Baolu
Cc: Fenghua Yu
Cc: Ashok Raj
Cc: Jacob Pan
Co-Developed-by: Gayatri Kammela
Signed-off-by: Gayatri Kammela
Reviewed-by: Andy Shevchenko
Reviewed-by: Lu Baolu
Signed-off-by: Sohil Mehta
---
v8: Remove extended context support since it is deprecated in the new spec
Use iommu lock to protect context table access
Simplify and split the patches differently
v7: Split patch 1/5 and 2/5 differently
Update commit message and copyright year
Fix typo in a comment
Simplify code
v6: Change the order of includes to an alphabetical order
Change seq_printf formatting
v5: Change to a SPDX license tag
Fix seq_printf formatting
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Fix unnecessary reprogramming of the context entries
Simplify and merge the show context and extended context patch into one
Remove redundant IOMMU null check under for_each_active_iommu
v3: Add a macro for seq file operations
Change the intel_iommu_ctx file name to dmar_translation_struct
v2: No change
drivers/iommu/intel-iommu-debugfs.c | 65 +
1 file changed, 65 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debugfs.c
b/drivers/iommu/intel-iommu-debugfs.c
index 2becbd78620f..7fabf9b1c2dc 100644
--- a/drivers/iommu/intel-iommu-debugfs.c
+++ b/drivers/iommu/intel-iommu-debugfs.c
@@ -131,6 +131,69 @@ static int iommu_regset_show(struct seq_file *m, void
*unused)
}
DEFINE_SHOW_ATTRIBUTE(iommu_regset);
+static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
+ int bus)
+{
+ struct context_entry *context;
+ int devfn;
+
+ seq_printf(m, " Context Table Entries for Bus: %d\n", bus);
+ seq_puts(m, " Entry\tB:D.F\tHigh\tLow\n");
+
+ for (devfn = 0; devfn < 256; devfn++) {
+ context = iommu_context_addr(iommu, bus, devfn, 0);
+ if (!context)
+ return;
+
+ if (!context_present(context))
+ continue;
+
+ seq_printf(m, " %-5d\t%02x:%02x.%x\t%-6llx\t%llx\n", devfn,
+ bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
+ context[0].hi, context[0].lo);
+ }
+}
+
+static void root_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+ unsigned long flags;
+ int bus;
+
+ spin_lock_irqsave(>lock, flags);
+ seq_printf(m, "IOMMU %s: Root Table Address:%llx\n", iommu->name,
+ (u64)virt_to_phys(iommu->root_entry));
+ seq_puts(m, "Root Table Entries:\n");
+
+ for (bus = 0; bus < 256; bus++) {
+ if (!(iommu->root_entry[bus].lo & 1))
+ continue;
+
+ seq_printf(m, " Bus: %d H: %llx L: %llx\n", bus,
+ iommu->root_entry[bus].hi,
+ iommu->root_entry[bus].lo);
+
+ ctx_tbl_entry_show(m, iommu, bus);
+ seq_putc(m, '\n');
+ }
+ spin_unlock_irqrestore(>lock, flags);
+}
+
+static int dmar_translation_struct_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ root_tbl_entry_show(m, iommu);
+ seq_putc(m, '\n');
+ }
+ rcu_read_unlock();
+
+ return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(dmar_translation_struct);
+
#ifdef CONFIG_IRQ_REMAP
static void ir_tbl_remap_entry_show(struct seq_file *m,
struct intel_iommu *iommu)
@@ -242,6 +305,8 @@ void __init intel_iommu_debugfs_init(void)
debugfs_create_file("iommu_regset", 0444, intel_iommu_debug, NULL,
_regset_fops);
+ debugfs_create_file("dmar_translation_struct", 0444, intel_iommu_debug,
+ NULL, _translation_struct_fops);
#ifdef CONFIG_IRQ_REMAP
debugfs_create_file("ir_translation_struct", 0444, intel_iommu_debug,
NULL, _translation_struct_fops);
--
2.18.0
[PATCH v8 3/6] iommu/vt-d: Enable base Intel IOMMU debugfs support
Add a new config option CONFIG_INTEL_IOMMU_DEBUGFS and do the base
enabling for Intel IOMMU debugfs.
Cc: Lu Baolu
Cc: Fenghua Yu
Cc: Ashok Raj
Cc: Jacob Pan
Co-Developed-by: Gayatri Kammela
Signed-off-by: Gayatri Kammela
Reviewed-by: Andy Shevchenko
Reviewed-by: Lu Baolu
Signed-off-by: Sohil Mehta
---
v8: Move to the common iommu debugfs directory
Simplify and split the patches differently
Change filename to intel-iommu-debugfs.c
drivers/iommu/Kconfig | 13 +
drivers/iommu/Makefile | 1 +
drivers/iommu/intel-iommu-debugfs.c | 20
drivers/iommu/intel-iommu.c | 1 +
include/linux/intel-iommu.h | 6 ++
5 files changed, 41 insertions(+)
create mode 100644 drivers/iommu/intel-iommu-debugfs.c
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index c60395b7470f..51ba19c8847b 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -186,6 +186,19 @@ config INTEL_IOMMU
and include PCI device scope covered by these DMA
remapping devices.
+config INTEL_IOMMU_DEBUGFS
+ bool "Export Intel IOMMU internals in Debugfs"
+ depends on INTEL_IOMMU && IOMMU_DEBUGFS
+ help
+ !!!WARNING!!!
+
+ DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!!
+
+ Expose Intel IOMMU internals in Debugfs.
+
+ This option is -NOT- intended for production environments, and should
+ only be enabled for debugging Intel IOMMU.
+
config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index ab5eba6edf82..a158a68c8ea8 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o intel-pasid.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUGFS) += intel-iommu-debugfs.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debugfs.c
b/drivers/iommu/intel-iommu-debugfs.c
new file mode 100644
index ..33e0a6c12d92
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debugfs.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2018 Intel Corporation.
+ *
+ * Authors: Gayatri Kammela
+ * Sohil Mehta
+ * Jacob Pan
+ */
+
+#include
+#include
+#include
+#include
+
+#include
+
+void __init intel_iommu_debugfs_init(void)
+{
+ debugfs_create_dir("intel", iommu_debugfs_dir);
+}
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index b5868c757995..b9cf7c8c1616 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -4837,6 +4837,7 @@ int __init intel_iommu_init(void)
cpuhp_setup_state(CPUHP_IOMMU_INTEL_DEAD, "iommu/intel:dead", NULL,
intel_iommu_cpu_dead);
intel_iommu_enabled = 1;
+ intel_iommu_debugfs_init();
return 0;
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 3bdb9aa198af..b0ae25837361 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -621,6 +621,12 @@ extern int intel_iommu_enable_pasid(struct intel_iommu
*iommu, struct intel_svm_
extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
#endif
+#ifdef CONFIG_INTEL_IOMMU_DEBUGFS
+void intel_iommu_debugfs_init(void);
+#else
+static inline void intel_iommu_debugfs_init(void) {}
+#endif /* CONFIG_INTEL_IOMMU_DEBUGFS */
+
extern const struct attribute_group *intel_iommu_groups[];
bool context_present(struct context_entry *context);
struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
--
2.18.0
___
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[PATCH v8 4/6] iommu/vt-d: Add debugfs support to show register contents
From: Gayatri Kammela
Add Intel IOMMU debugfs extension to dump all the register contents for
each IOMMU device.
Example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/iommu/intel/iommu_regset
IOMMU: dmar0 Register Base Address: fed9
NameOffset Contents
VER 0x000x0010
CAP 0x080x01cc40660462
ECAP0x100x00f0101a
GCMD0x180x
GSTS0x1c0xc700
RTADDR 0x200x0004071d3800
CCMD0x280x0800
FSTS0x340x
FECTL 0x380x
FEDATA 0x3c0xfee010044021
Cc: Lu Baolu
Cc: Fenghua Yu
Cc: Jacob Pan
Cc: Ashok Raj
Signed-off-by: Gayatri Kammela
Reviewed-by: Andy Shevchenko
Reviewed-by: Lu Baolu
Co-Developed-by: Sohil Mehta
Signed-off-by: Sohil Mehta
---
v8: Add MTRR and Virtual command register support
Use the iommu register lock to protect register access
v7: Use macro for register set definitions
Fix compiler warning for readq with 32bit architecture
Remove leading '\n'
v6: No change
v5: No change
v4: Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_regset file name to iommu_regset
Add information for MTRR registers
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debugfs.c | 123 +++-
1 file changed, 122 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/intel-iommu-debugfs.c
b/drivers/iommu/intel-iommu-debugfs.c
index 33e0a6c12d92..57af2f774312 100644
--- a/drivers/iommu/intel-iommu-debugfs.c
+++ b/drivers/iommu/intel-iommu-debugfs.c
@@ -14,7 +14,128 @@
#include
+struct iommu_regset {
+ int offset;
+ const char *regs;
+};
+
+#define IOMMU_REGSET_ENTRY(_reg_) \
+ { DMAR_##_reg_##_REG, __stringify(_reg_) }
+static const struct iommu_regset iommu_regs[] = {
+ IOMMU_REGSET_ENTRY(VER),
+ IOMMU_REGSET_ENTRY(CAP),
+ IOMMU_REGSET_ENTRY(ECAP),
+ IOMMU_REGSET_ENTRY(GCMD),
+ IOMMU_REGSET_ENTRY(GSTS),
+ IOMMU_REGSET_ENTRY(RTADDR),
+ IOMMU_REGSET_ENTRY(CCMD),
+ IOMMU_REGSET_ENTRY(FSTS),
+ IOMMU_REGSET_ENTRY(FECTL),
+ IOMMU_REGSET_ENTRY(FEDATA),
+ IOMMU_REGSET_ENTRY(FEADDR),
+ IOMMU_REGSET_ENTRY(FEUADDR),
+ IOMMU_REGSET_ENTRY(AFLOG),
+ IOMMU_REGSET_ENTRY(PMEN),
+ IOMMU_REGSET_ENTRY(PLMBASE),
+ IOMMU_REGSET_ENTRY(PLMLIMIT),
+ IOMMU_REGSET_ENTRY(PHMBASE),
+ IOMMU_REGSET_ENTRY(PHMLIMIT),
+ IOMMU_REGSET_ENTRY(IQH),
+ IOMMU_REGSET_ENTRY(IQT),
+ IOMMU_REGSET_ENTRY(IQA),
+ IOMMU_REGSET_ENTRY(ICS),
+ IOMMU_REGSET_ENTRY(IRTA),
+ IOMMU_REGSET_ENTRY(PQH),
+ IOMMU_REGSET_ENTRY(PQT),
+ IOMMU_REGSET_ENTRY(PQA),
+ IOMMU_REGSET_ENTRY(PRS),
+ IOMMU_REGSET_ENTRY(PECTL),
+ IOMMU_REGSET_ENTRY(PEDATA),
+ IOMMU_REGSET_ENTRY(PEADDR),
+ IOMMU_REGSET_ENTRY(PEUADDR),
+ IOMMU_REGSET_ENTRY(MTRRCAP),
+ IOMMU_REGSET_ENTRY(MTRRDEF),
+ IOMMU_REGSET_ENTRY(MTRR_FIX64K_0),
+ IOMMU_REGSET_ENTRY(MTRR_FIX16K_8),
+ IOMMU_REGSET_ENTRY(MTRR_FIX16K_A),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_C),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_C8000),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_D),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_D8000),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_E),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_E8000),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_F),
+ IOMMU_REGSET_ENTRY(MTRR_FIX4K_F8000),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE0),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK0),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE1),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK1),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE2),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK2),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE3),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK3),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE4),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK4),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE5),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK5),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE6),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK6),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE7),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK7),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE8),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK8),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSBASE9),
+ IOMMU_REGSET_ENTRY(MTRR_PHYSMASK9),
+ IOMMU_REGSET_ENTRY(VCCAP),
+ IOMMU_REGSET_ENTRY(VCMD),
+ IOMMU_REGSET_ENTRY(VCRSP),
+};
+
+static int iommu_regset_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu
[PATCH v8 2/6] iommu/vt-d: Update register definitions to VT-d 3.0 specification
Add new register definitions added in the VT-d 3.0 specification. Also include registers that were missing previously. Cc: Lu Baolu Cc: Fenghua Yu Cc: Jacob Pan Cc: Ashok Raj Cc: Gayatri Kammela Signed-off-by: Sohil Mehta --- v8: Simplify and split the patches differently include/linux/intel-iommu.h | 36 1 file changed, 36 insertions(+) diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index b7cf32e8ae1f..3bdb9aa198af 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -72,6 +72,42 @@ #defineDMAR_PEDATA_REG 0xe4/* Page request event interrupt data register */ #defineDMAR_PEADDR_REG 0xe8/* Page request event interrupt addr register */ #defineDMAR_PEUADDR_REG 0xec /* Page request event Upper address register */ +#define DMAR_MTRRCAP_REG 0x100 /* MTRR capability register */ +#define DMAR_MTRRDEF_REG 0x108 /* MTRR default type register */ +#define DMAR_MTRR_FIX64K_0_REG 0x120 /* MTRR Fixed range registers */ +#define DMAR_MTRR_FIX16K_8_REG 0x128 +#define DMAR_MTRR_FIX16K_A_REG 0x130 +#define DMAR_MTRR_FIX4K_C_REG 0x138 +#define DMAR_MTRR_FIX4K_C8000_REG 0x140 +#define DMAR_MTRR_FIX4K_D_REG 0x148 +#define DMAR_MTRR_FIX4K_D8000_REG 0x150 +#define DMAR_MTRR_FIX4K_E_REG 0x158 +#define DMAR_MTRR_FIX4K_E8000_REG 0x160 +#define DMAR_MTRR_FIX4K_F_REG 0x168 +#define DMAR_MTRR_FIX4K_F8000_REG 0x170 +#define DMAR_MTRR_PHYSBASE0_REG 0x180 /* MTRR Variable range registers */ +#define DMAR_MTRR_PHYSMASK0_REG 0x188 +#define DMAR_MTRR_PHYSBASE1_REG 0x190 +#define DMAR_MTRR_PHYSMASK1_REG 0x198 +#define DMAR_MTRR_PHYSBASE2_REG 0x1a0 +#define DMAR_MTRR_PHYSMASK2_REG 0x1a8 +#define DMAR_MTRR_PHYSBASE3_REG 0x1b0 +#define DMAR_MTRR_PHYSMASK3_REG 0x1b8 +#define DMAR_MTRR_PHYSBASE4_REG 0x1c0 +#define DMAR_MTRR_PHYSMASK4_REG 0x1c8 +#define DMAR_MTRR_PHYSBASE5_REG 0x1d0 +#define DMAR_MTRR_PHYSMASK5_REG 0x1d8 +#define DMAR_MTRR_PHYSBASE6_REG 0x1e0 +#define DMAR_MTRR_PHYSMASK6_REG 0x1e8 +#define DMAR_MTRR_PHYSBASE7_REG 0x1f0 +#define DMAR_MTRR_PHYSMASK7_REG 0x1f8 +#define DMAR_MTRR_PHYSBASE8_REG 0x200 +#define DMAR_MTRR_PHYSMASK8_REG 0x208 +#define DMAR_MTRR_PHYSBASE9_REG 0x210 +#define DMAR_MTRR_PHYSMASK9_REG 0x218 +#define DMAR_VCCAP_REG 0xe00 /* Virtual command capability register */ +#define DMAR_VCMD_REG 0xe10 /* Virtual command register */ +#define DMAR_VCRSP_REG 0xe20 /* Virtual command response register */ #define OFFSET_STRIDE (9) -- 2.18.0 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v8 1/6] iommu/vt-d: Relocate struct/function declarations to its header files
To reuse the static functions and the struct declarations, move them to
corresponding header files and export the needed functions.
Cc: Lu Baolu
Cc: Fenghua Yu
Cc: Jacob Pan
Cc: Ashok Raj
Reviewed-by: Andy Shevchenko
Signed-off-by: Gayatri Kammela
Signed-off-by: Sohil Mehta
---
v8: Remove pasid table related changes
Add Interrupt remapping related changes
Remove redundant extern type from functions
v7: Split patch 1/5 and 2/5 differently
Update the commit message
v6: No change
v5: No change
v4: No change
v3: No change
v2: No change
arch/x86/include/asm/irq_remapping.h | 2 ++
drivers/iommu/intel-iommu.c | 31 +++-
drivers/iommu/intel_irq_remapping.c | 2 +-
include/linux/intel-iommu.h | 30 +++
4 files changed, 36 insertions(+), 29 deletions(-)
diff --git a/arch/x86/include/asm/irq_remapping.h
b/arch/x86/include/asm/irq_remapping.h
index 5f26962eff42..67ed72f31cc2 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -45,6 +45,8 @@ struct vcpu_data {
#ifdef CONFIG_IRQ_REMAP
+extern raw_spinlock_t irq_2_ir_lock;
+
extern bool irq_remapping_cap(enum irq_remap_cap cap);
extern void set_irq_remapping_broken(void);
extern int irq_remapping_prepare(void);
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 5f3f10cf9d9d..b5868c757995 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -185,16 +185,6 @@ static int rwbf_quirk;
static int force_on = 0;
int intel_iommu_tboot_noforce;
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
- u64 lo;
- u64 hi;
-};
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
/*
@@ -220,21 +210,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
return re->hi & VTD_PAGE_MASK;
}
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
- u64 lo;
- u64 hi;
-};
static inline void context_clear_pasid_enable(struct context_entry *context)
{
@@ -261,7 +236,7 @@ static inline bool __context_present(struct context_entry
*context)
return (context->lo & 1);
}
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
{
return context_pasid_enabled(context) ?
__context_present(context) :
@@ -788,8 +763,8 @@ static void domain_update_iommu_cap(struct dmar_domain
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
}
-static inline struct context_entry *iommu_context_addr(struct intel_iommu
*iommu,
- u8 bus, u8 devfn, int
alloc)
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
+u8 devfn, int alloc)
{
struct root_entry *root = >root_entry[bus];
struct context_entry *context;
diff --git a/drivers/iommu/intel_irq_remapping.c
b/drivers/iommu/intel_irq_remapping.c
index 967450bd421a..c2d6c11431de 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -76,7 +76,7 @@ static struct hpet_scope ir_hpet[MAX_HPET_TBS];
* in single-threaded environment with interrupt disabled, so no need to tabke
* the dmar_global_lock.
*/
-static DEFINE_RAW_SPINLOCK(irq_2_ir_lock);
+DEFINE_RAW_SPINLOCK(irq_2_ir_lock);
static const struct irq_domain_ops intel_ir_domain_ops;
static void iommu_disable_irq_remapping(struct intel_iommu *iommu);
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 28004d74ae04..b7cf32e8ae1f 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -389,6 +389,33 @@ struct pasid_entry;
struct pasid_state_entry;
struct page_req_dsc;
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+ u64 lo;
+ u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+ u64 lo;
+ u64 hi;
+};
+
struct dmar_domain {
int nid;/* node id */
@@ -559,5 +586,8 @@ extern struct intel_iommu *intel_svm_device_to_iommu(struct
device *dev);
#endif
extern const struct attribute_group *intel_iommu_groups[];
+bool context_present(struct context_entry *context);
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
+u8 devfn, int alloc);
[PATCH v8 0/6] Add Intel IOMMU debugfs support
Hi All, This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU registers, internal context and dumps individual table entries to help debug Intel IOMMUs. Patches 1-3 do the ground work for the following patches by reorganizing some Intel IOMMU data structures, creating a new config option - INTEL_IOMMU_DEBUGFS and adding an Intel IOMMU debugfs directory. The following patches add debugfs support for IOMMU resigter contents, Interrupt remapping and context internals in that order. The information can be accessed in sysfs at '/sys/kernel/debug/iommu/intel/'. This series is based on the new VT-d 3.0 specification [1]. The scalable mode and PASID table debugfs patches are not part of this series. They would be submitted later once the IOMMU driver patches for the same are accepted and merged upstream. Regards, Sohil [1] https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf Changes since v7: - Move to the common iommu directory approach suggested by Joerg - Remove ECS debugfs support that has been deprecated with the new VT-d spec - Change filename to intel-iommu-debugfs.c - Remove the pasid table debugfs patch - Add MTRR and Virtual command register support - Use locks to protect register and table access - Improve seq_printf formatting - Simplify and split the patches differently Changes since v6: - Split patch 1/5 and 2/5 differently - Simplify and improve code formatting - Use macro for register set definitions - Fix compiler warning for readq - Add Co-Developed-by tag to commit messages Changes since v5: - Change the order of includes to an alphabetical order - Change seq_printf and seq_puts formatting Changes since v4: - Change to a SPDX license tag - Fix seq_printf formatting and remove leading '\n's Changes since v3: - Remove an unused function parameter from some of the functions - Fix checkpatch.pl warnings - Remove error reporting for debugfs_create_file functions - Fix unnecessary reprogramming of the context entries - Simplify and merge the show context and extended context patch into one - Remove redundant IOMMU null check under for_each_active_iommu - Update the commit title to be consistent Changes since v2: - Added a macro for seq file operations based on recommendation by Andy Shevchenko. The marco can be moved to seq_file.h at a future point - Changed the debugfs file names to more relevant ones - Added information for MTRR registers in the regset file Changes since v1: - Fixed seq_printf formatting - Handled the case when Interrupt remapping is not enabled Gayatri Kammela (1): iommu/vt-d: Add debugfs support to show register contents Sohil Mehta (5): iommu/vt-d: Relocate struct/function declarations to its header files iommu/vt-d: Update register definitions to VT-d 3.0 specification iommu/vt-d: Enable base Intel IOMMU debugfs support iommu/vt-d: Add debugfs support for Interrupt remapping iommu/vt-d: Add debugfs support to show context internals arch/x86/include/asm/irq_remapping.h | 2 + drivers/iommu/Kconfig| 13 ++ drivers/iommu/Makefile | 1 + drivers/iommu/intel-iommu-debugfs.c | 314 +++ drivers/iommu/intel-iommu.c | 32 +-- drivers/iommu/intel_irq_remapping.c | 2 +- include/linux/intel-iommu.h | 72 ++ 7 files changed, 407 insertions(+), 29 deletions(-) create mode 100644 drivers/iommu/intel-iommu-debugfs.c -- 2.18.0 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v7 3/5] iommu/vt-d: Add debugfs support to show register contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
Example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset
DMAR: dmar0: Register Base Address fed9
NameOffset Contents
VER 0x000x0010
CAP 0x080x01cc40660462
ECAP0x100x00f0101a
GCMD0x180x
GSTS0x1c0xc700
RTADDR 0x200x0004071d3800
CCMD0x280x0800
FSTS0x340x
FECTL 0x380x
FEDATA 0x3c0xfee010044021
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Co-Developed-by: Sohil Mehta <sohil.me...@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v7: Use macro for register set definitions
Fix compiler warning for readq with 32bit architecture
Remove leading '\n'
v6: No change
v5: No change
v4: Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_regset file name to iommu_regset
Add information for MTRR registers
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 84 +++
include/linux/intel-iommu.h | 2 +
2 files changed, 86 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 8253503..38651ad 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -38,6 +38,49 @@ static const struct file_operations __name ## _fops =
\
.owner = THIS_MODULE, \
}
+struct iommu_regset {
+ int offset;
+ const char *regs;
+};
+
+#define IOMMU_REGSET_ENTRY(_reg_) \
+ { DMAR_##_reg_##_REG, __stringify(_reg_) }
+static const struct iommu_regset iommu_regs[] = {
+ IOMMU_REGSET_ENTRY(VER),
+ IOMMU_REGSET_ENTRY(CAP),
+ IOMMU_REGSET_ENTRY(ECAP),
+ IOMMU_REGSET_ENTRY(GCMD),
+ IOMMU_REGSET_ENTRY(GSTS),
+ IOMMU_REGSET_ENTRY(RTADDR),
+ IOMMU_REGSET_ENTRY(CCMD),
+ IOMMU_REGSET_ENTRY(FSTS),
+ IOMMU_REGSET_ENTRY(FECTL),
+ IOMMU_REGSET_ENTRY(FEDATA),
+ IOMMU_REGSET_ENTRY(FEADDR),
+ IOMMU_REGSET_ENTRY(FEUADDR),
+ IOMMU_REGSET_ENTRY(AFLOG),
+ IOMMU_REGSET_ENTRY(PMEN),
+ IOMMU_REGSET_ENTRY(PLMBASE),
+ IOMMU_REGSET_ENTRY(PLMLIMIT),
+ IOMMU_REGSET_ENTRY(PHMBASE),
+ IOMMU_REGSET_ENTRY(PHMLIMIT),
+ IOMMU_REGSET_ENTRY(IQH),
+ IOMMU_REGSET_ENTRY(IQT),
+ IOMMU_REGSET_ENTRY(IQA),
+ IOMMU_REGSET_ENTRY(ICS),
+ IOMMU_REGSET_ENTRY(IRTA),
+ IOMMU_REGSET_ENTRY(PQH),
+ IOMMU_REGSET_ENTRY(PQT),
+ IOMMU_REGSET_ENTRY(PQA),
+ IOMMU_REGSET_ENTRY(PRS),
+ IOMMU_REGSET_ENTRY(PECTL),
+ IOMMU_REGSET_ENTRY(PEDATA),
+ IOMMU_REGSET_ENTRY(PEADDR),
+ IOMMU_REGSET_ENTRY(PEUADDR),
+ IOMMU_REGSET_ENTRY(MTRRCAP),
+ IOMMU_REGSET_ENTRY(MTRRDEF)
+};
+
static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
int bus, bool ext)
{
@@ -116,6 +159,45 @@ static int dmar_translation_struct_show(struct seq_file
*m, void *unused)
}
DEFINE_SHOW_ATTRIBUTE(dmar_translation_struct);
+static int iommu_regset_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ unsigned long long base;
+ int i, ret = 0;
+ u64 value;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!drhd->reg_base_addr) {
+ seq_puts(m, "IOMMU: Invalid base address\n");
+ ret = -EINVAL;
+ goto out;
+ }
+
+ base = drhd->reg_base_addr;
+ seq_printf(m, "DMAR: %s: Register Base Address %llx\n",
+ iommu->name, base);
+ seq_puts(m, "Name\t\t\tOffset\t\tContents\n");
+ /*
+* Publish the contents of the 64-bit hardware registers
+* by adding the offset to the pointer (virtual address).
+*/
+ for (i = 0 ; i < ARRAY_SIZE(iommu_regs); i++) {
+ value = dmar_readq(iommu->reg + iommu_regs[i].offset);
+ seq_printf(m,
[PATCH v7 4/5] iommu/vt-d: Add debugfs support to show Pasid table contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar1: Extended Root Table Address:4071d3800
Extended Root Table Entries:
Bus 0 L: 4071d7001 H: 0
Lower Context Table Entries for Bus: 0
[entry] Device B:D.FLow High
[16]:00:02.04071d6005 102
Higher Context Table Entries for Bus: 0
[16]:00:02.00 0
Pasid Table Address: 746cb0af
Pasid Table Entries for domain 0:
[Entry] Contents
[0] 12c409801
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Co-Developed-by: Sohil Mehta <sohil.me...@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v7: Improve code indentation and formatting
v6: No change
v5: No change
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
v3: No change
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 31 +++
drivers/iommu/intel-svm.c | 8
include/linux/intel-svm.h | 8
3 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 38651ad..a9a99aa 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -81,6 +81,36 @@ static const struct iommu_regset iommu_regs[] = {
IOMMU_REGSET_ENTRY(MTRRDEF)
};
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+ int pasid_size = 0, i;
+
+ if (!ecap_pasid(iommu->ecap))
+ return;
+
+ pasid_size = intel_iommu_get_pts(iommu);
+ seq_printf(m, "Pasid Table Address: %p\n", iommu->pasid_table);
+
+ if (!iommu->pasid_table)
+ return;
+
+ seq_printf(m, "Pasid Table Entries for domain %d:\n", iommu->segment);
+ seq_puts(m, "[Entry]\t\tContents\n");
+
+ /* Publish the pasid table entries here */
+ for (i = 0; i < pasid_size; i++) {
+ if (!iommu->pasid_table[i].val)
+ continue;
+
+ seq_printf(m, "[%d]\t\t%04llx\n", i, iommu->pasid_table[i].val);
+ }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static inline void
+pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu) {}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
int bus, bool ext)
{
@@ -116,6 +146,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, struct
intel_iommu *iommu,
iommu->segment, bus, PCI_SLOT(ctx), PCI_FUNC(ctx),
context[1].lo, context[1].hi);
}
+ pasid_tbl_entry_show(m, iommu);
out:
spin_unlock_irqrestore(>lock, flags);
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index ed1cf7c..c646724 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
static irqreturn_t prq_event_thread(int irq, void *d);
-struct pasid_entry {
- u64 val;
-};
-
-struct pasid_state_entry {
- u64 val;
-};
-
int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
{
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
struct device;
+struct pasid_entry {
+ u64 val;
+};
+
+struct pasid_state_entry {
+ u64 val;
+};
+
struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
u32 private, int rwxp, int response);
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v7 2/5] iommu/vt-d: Enable debugfs support to show context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Add a new config option CONFIG_INTEL_IOMMU_DEBUG and export Intel IOMMU
internals states, such as root and context in debugfs to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar1: Extended Root Table Address:4071d3800
Extended Root Table Entries:
Bus 0 L: 4071d7001 H: 0
Lower Context Table Entries for Bus: 0
[entry] Device B:D.FLow High
[16]:00:02.04071d6005 102
Higher Context Table Entries for Bus: 0
[16]:00:02.00 0
IOMMU dmar0: Extended Root Table Address:4071d4800
IOMMU dmar2: Root Table Address:4071d5000
Root Table Entries:
Bus 0 L: 406d13001 H: 0
Context Table Entries for Bus: 0
[entry] Device B:D.FLow High
[160] :00:14.0406d12001 102
[184] :00:17.0405756001 302
[248] :00:1f.0406d3b001 202
[251] :00:1f.3405497001 402
[254] :00:1f.640662e001 502
Root Table Entries:
Bus 1 L: 401e03001 H: 0
Context Table Entries for Bus: 1
[entry] Device B:D.FLow High
[0] :01:00.0401e04001 602
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Co-Developed-by: Sohil Mehta <sohil.me...@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v7: Split patch 1/5 and 2/5 differently
Update commit message and copyright year
Fix typo in a comment
Simplify code
v6: Change the order of includes to an alphabetical order
Change seq_printf formatting
v5: Change to a SPDX license tag
Fix seq_printf formatting
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Fix unnecessary reprogramming of the context entries
Simplify and merge the show context and extended context patch into one
Remove redundant IOMMU null check under for_each_active_iommu
v3: Add a macro for seq file operations
Change the intel_iommu_ctx file name to dmar_translation_struct
v2: No change
drivers/iommu/Kconfig | 8 +++
drivers/iommu/Makefile| 1 +
drivers/iommu/intel-iommu-debug.c | 129 ++
drivers/iommu/intel-iommu.c | 1 +
include/linux/intel-iommu.h | 6 ++
5 files changed, 145 insertions(+)
create mode 100644 drivers/iommu/intel-iommu-debug.c
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a2134..332648f 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -152,6 +152,14 @@ config INTEL_IOMMU
and include PCI device scope covered by these DMA
remapping devices.
+config INTEL_IOMMU_DEBUG
+ bool "Export Intel IOMMU internals in Debugfs"
+ depends on INTEL_IOMMU && DEBUG_FS
+ help
+ Debugfs support to export IOMMU context internals, register contents,
+ PASID internals and interrupt remapping. To access this information in
+ sysfs, say Y.
+
config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 1fb6958..fdbaf46 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUG) += intel-iommu-debug.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
new file mode 100644
index 000..8253503
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2018 Intel Corporation.
+ *
+ * Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
+ * Jacob Pan <jacob.jun@linux.intel.com>
+ * Sohil Mehta <sohil.me...@intel.com>
+ */
+
+#define pr_fmt(fmt) "INTEL_IOMMU: " fmt
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "irq_remapping.h"
+
+#define TOTAL_BUS_NR 256 /* full bus range */
+#define DEFINE_SHOW_ATTRIBUTE(__name) \
+static int __name ## _open(struct inode *inode, struct file *file) \
+{ \
+ return single_open(file, __name ## _show, inode->i_privat
[PATCH v7 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the IRTE values for entries with the present bit set, in the format
shown.
Remapped Interrupt supported on IOMMU: dmar7
IR table address:85e50
Index SrcID DstIDVct IRTE_highIRTE_low
1 f0f8 0100 30 0004f0f8 013d
7 f0f8 0400 22 0004f0f8 0422000d
Posted Interrupt supported on IOMMU: dmar5
IR table address:85ec0
Index SrcID PDA_high PDA_low Vct IRTE_high IRTE_low
4 4300 000f ff765980 41 000f00044300ff76598000418001
5 4300 000f ff765980 51 000f00044300ff76598000518001
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Co-Developed-by: Gayatri Kammela <gayatri.kamm...@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
v7: Print the IR table physical base address
Simplify IR table formatting
v6: Change a couple of seq_puts to seq_putc
v5: Fix seq_puts formatting and remove leading '\n's
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_interrupt_remap file name to ir_translation_struct
v2: Handle the case when IR is not enabled. Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 94 +++
1 file changed, 94 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index a9a99aa..b66a073 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -229,6 +229,96 @@ static int iommu_regset_show(struct seq_file *m, void
*unused)
}
DEFINE_SHOW_ATTRIBUTE(iommu_regset);
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m,
+ struct intel_iommu *iommu)
+{
+ struct irte *ri_entry;
+ int idx;
+
+ seq_puts(m, " Index SrcID DstIDVct IRTE_high\t\tIRTE_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+
+ seq_printf(m, " %d\t%04x %08x %02x %016llx\t%016llx\n", idx,
+ ri_entry->sid, ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m,
+struct intel_iommu *iommu)
+{
+ struct irte *pi_entry;
+ int idx;
+
+ seq_puts(m, " Index SrcID PDA_high PDA_low Vct
IRTE_high\t\tIRTE_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+
+ seq_printf(m, " %d\t%04x %08x %08x %02x %016llx\t%016llx\n",
+ idx, pi_entry->sid, pi_entry->pda_h,
+ pi_entry->pda_l << 6, pi_entry->vector,
+ pi_entry->high, pi_entry->low);
+ }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int ir_translation_struct_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ u64 irta;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!ecap_ir_support(iommu->ecap))
+ continue;
+
+ irta = dmar_readq(iommu->reg + DMAR_IRTA_REG) & VTD_PAGE_MASK;
+ seq_printf(m, "Remapped Interrupt supported on IOMMU: %s\n"
+ " IR table address:%llx\n", iommu->name, irta);
+
+ if (iommu->ir_table && irta)
+ ir_tbl_remap_entry_show(m, iommu);
+ else
+ seq_puts(m, "Interrupt Remapping is not enabled\n");
+ seq_putc(m, '\n');
+ }
+
+ seq_puts(m, "\n\n");
+
+ for_each_active_iommu(iommu, drhd) {
+ if (!cap_pi_support(iommu->cap))
+ continue
[PATCH v7 1/5] iommu/vt-d: Relocate struct/function declarations to its header files
From: Gayatri Kammela <gayatri.kamm...@intel.com>
To reuse the static functions and the struct declarations, move them to
corresponding header files and export the needed functions.
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v7: Split patch 1/5 and 2/5 differently
Update the commit message
v6: No change
v5: No change
v4: No change
v3: No change
v2: No change
drivers/iommu/intel-iommu.c | 33 -
include/linux/intel-iommu.h | 31 +++
include/linux/intel-svm.h | 2 +-
3 files changed, 36 insertions(+), 30 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4a2de34..f6241f6 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -183,16 +183,6 @@ static int rwbf_quirk;
static int force_on = 0;
int intel_iommu_tboot_noforce;
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
- u64 lo;
- u64 hi;
-};
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
/*
@@ -218,21 +208,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
return re->hi & VTD_PAGE_MASK;
}
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
- u64 lo;
- u64 hi;
-};
static inline void context_clear_pasid_enable(struct context_entry *context)
{
@@ -259,7 +234,7 @@ static inline bool __context_present(struct context_entry
*context)
return (context->lo & 1);
}
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
{
return context_pasid_enabled(context) ?
__context_present(context) :
@@ -819,8 +794,8 @@ static void domain_update_iommu_cap(struct dmar_domain
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
}
-static inline struct context_entry *iommu_context_addr(struct intel_iommu
*iommu,
- u8 bus, u8 devfn, int
alloc)
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
+u8 devfn, int alloc)
{
struct root_entry *root = >root_entry[bus];
struct context_entry *context;
@@ -5208,7 +5183,7 @@ static void intel_iommu_put_resv_regions(struct device
*dev,
#ifdef CONFIG_INTEL_IOMMU_SVM
#define MAX_NR_PASID_BITS (20)
-static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
+unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
{
/*
* Convert ecap_pss to extend context entry pts encoding, also
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index f3274d9..78ec85a 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -383,6 +383,33 @@ struct pasid_entry;
struct pasid_state_entry;
struct page_req_dsc;
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+ u64 lo;
+ u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+ u64 lo;
+ u64 hi;
+};
+
struct intel_iommu {
void __iomem*reg; /* Pointer to hardware regs, virtual addr */
u64 reg_phys; /* physical address of hw register set */
@@ -488,8 +515,12 @@ struct intel_svm {
extern int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct
intel_svm_dev *sdev);
extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
+extern unsigned long intel_iommu_get_pts(struct intel_iommu *iommu);
#endif
extern const struct attribute_group *intel_iommu_groups[];
+extern bool context_present(struct context_entry *context);
+extern struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
+ u8 bus, u8 devfn, int alloc);
#endif
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 99bc5b3..733eaf9 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -130,7 +130,7 @@ static inline int intel_svm_unbind_mm(struct device *dev,
int pasid)
BUG();
}
-static int intel_svm_is_pasid_valid(struct device *dev, int pasid)
+static inline int intel_svm_is_pasid_valid(struct device
[PATCH v7 0/5] Add Intel IOMMU debugfs support
Hi All, This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU registers, internal context and dumps individual table entries to help debug Intel IOMMUs. The first patch does the ground work for the following patches by reorganizing some Intel IOMMU data structures. The following patches create a new Kconfig option - INTEL_IOMMU_DEBUG and add debugfs support for IOMMU context internals, register contents, PASID internals, and Interrupt remapping in that order. The information can be accessed in sysfs at '/sys/kernel/debug/intel_iommu/'. Regards, Sohil Changes since v6: - Split patch 1/5 and 2/5 differently - Simplify and improve code formatting - Use macro for register set definitions - Fix compiler warning for readq - Add Co-Developed-by tag to commit messages Changes since v5: - Change the order of includes to an alphabetical order - Change seq_printf and seq_puts formatting Changes since v4: - Change to a SPDX license tag - Fix seq_printf formatting and remove leading '\n's Changes since v3: - Remove an unused function parameter from some of the functions - Fix checkpatch.pl warnings - Remove error reporting for debugfs_create_file functions - Fix unnecessary reprogramming of the context entries - Simplify and merge the show context and extended context patch into one - Remove redundant IOMMU null check under for_each_active_iommu - Update the commit title to be consistent Changes since v2: - Added a macro for seq file operations based on recommendation by Andy Shevchenko. The marco can be moved to seq_file.h at a future point - Changed the debugfs file names to more relevant ones - Added information for MTRR registers in the regset file Changes since v1: - Fixed seq_printf formatting - Handled the case when Interrupt remapping is not enabled Gayatri Kammela (4): iommu/vt-d: Relocate struct/function declarations to its header files iommu/vt-d: Enable debugfs support to show context internals iommu/vt-d: Add debugfs support to show register contents iommu/vt-d: Add debugfs support to show Pasid table contents Sohil Mehta (1): iommu/vt-d: Add debugfs support for Interrupt remapping drivers/iommu/Kconfig | 8 + drivers/iommu/Makefile| 1 + drivers/iommu/intel-iommu-debug.c | 338 ++ drivers/iommu/intel-iommu.c | 34 +--- drivers/iommu/intel-svm.c | 8 - include/linux/intel-iommu.h | 39 + include/linux/intel-svm.h | 10 +- 7 files changed, 400 insertions(+), 38 deletions(-) create mode 100644 drivers/iommu/intel-iommu-debug.c -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v6 4/5] iommu/vt-d: Add debugfs support to show Pasid table contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 40214fa05 102
Higher Context table entries for Bus: 0
[80]:00:0a.00 4026c 0
Pasid Table Addr : 8e2d4260
Pasid table entries for domain 0:
[Entry] Contents
[0] 12c409801
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v6: No change
v5: No change
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
v3: No change
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 31 +++
drivers/iommu/intel-svm.c | 8
include/linux/intel-svm.h | 8
3 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 9ee9a50..d25f7c99 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -38,6 +38,36 @@ static const struct file_operations __name ## _fops =
\
.owner = THIS_MODULE, \
}
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+ int pasid_size = 0, i;
+
+ if (ecap_pasid(iommu->ecap)) {
+ pasid_size = intel_iommu_get_pts(iommu);
+ seq_printf(m, "Pasid Table Addr : %p\n", iommu->pasid_table);
+
+ if (iommu->pasid_table) {
+ seq_printf(m, "Pasid table entries for domain %d:\n",
+ iommu->segment);
+ seq_puts(m, "[Entry]\t\tContents\n");
+
+ /* Publish the pasid table entries here */
+ for (i = 0; i < pasid_size; i++) {
+ if (!iommu->pasid_table[i].val)
+ continue;
+ seq_printf(m, "[%d]\t\t%04llx\n", i,
+ iommu->pasid_table[i].val);
+ }
+ }
+ }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
int bus, bool ext, bool new_ext)
{
@@ -71,6 +101,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, struct
intel_iommu *iommu,
}
}
}
+ pasid_tbl_entry_show(m, iommu);
out:
spin_unlock_irqrestore(>lock, flags);
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index ed1cf7c..c646724 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
static irqreturn_t prq_event_thread(int irq, void *d);
-struct pasid_entry {
- u64 val;
-};
-
-struct pasid_state_entry {
- u64 val;
-};
-
int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
{
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
struct device;
+struct pasid_entry {
+ u64 val;
+};
+
+struct pasid_state_entry {
+ u64 val;
+};
+
struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
u32 private, int rwxp, int response);
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v6 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the raw values for entries with the present bit set, in the format
shown.
Remapped Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
---
Index SID Dest_ID Vct Raw_value_high Raw_value_low
1 3a00 0600 2c 00043a00 062c0009
1114301 0900 a2 00044301 09a20009
Posted Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
Index SID PDA_high PDA_low Vct Raw_value_high Raw_value_low
4 4300 0010 40c7c880 41 00144300 40c7c88000418001
5 4300 0010 40c7c880 51 00144300 40c7c88000518001
Cc: Gayatri Kammela <gayatri.kamm...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
v6: Change a couple of seq_puts to seq_putc
v5: Fix seq_puts formatting and remove leading '\n's
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_interrupt_remap file name to ir_translation_struct
v2: Handle the case when IR is not enabled. Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 98 +++
1 file changed, 98 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index d25f7c99..b714c6f 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -4,6 +4,7 @@
*
* Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
* Jacob Pan <jacob.jun....@linux.intel.com>
+ * Sohil Mehta <sohil.me...@intel.com>
*
*/
@@ -231,6 +232,98 @@ static int iommu_regset_show(struct seq_file *m, void
*unused)
DEFINE_SHOW_ATTRIBUTE(iommu_regset);
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *ri_entry;
+
+ /* Print the header only once */
+ seq_puts(m, " Index SID Dest_ID Vct Raw_value_high
Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+ seq_printf(m, " %d\t%04x %08x %02x %016llx %016llx\n", idx,
+ ri_entry->sid, ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m,
+struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *pi_entry;
+
+ /* Print the header only once */
+ seq_puts(m, " Index SID PDA_high PDA_low Vct Raw_value_high
Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+ seq_printf(m, " %d\t%04x %08x %08x %02x %016llx %016llx\n",
+ idx, pi_entry->sid, pi_entry->pda_h,
+ (pi_entry->pda_l)<<6, pi_entry->vector,
+ pi_entry->high, pi_entry->low);
+ }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int ir_translation_struct_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!ecap_ir_support(iommu->ecap))
+ continue;
+
+ seq_printf(m, "Remapped Interrupt supported on IOMMU: %s\n"
+ " IR table address:%p\n", iommu->name,
+ iommu->ir_table);
+ seq_puts(m,
"---\n");
+
+ if (iommu->ir_table)
+ ir_tbl_remap_entry_show(m, iommu);
+
[PATCH v6 3/5] iommu/vt-d: Add debugfs support to show register contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00 0x0010
CAP 0x08 0x01cc40660462
ECAP 0x10 0x019e2ff0505e
GCMD 0x18 0x
GSTS 0x1c 0xc700
RTADDR 0x20 0x0004558d6800
CCMD 0x28 0x0800
FSTS 0x34 0x
FECTL0x38 0x
FEDATA 0x3c 0xfee0100c4141
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v6: No change
v5: No change
v4: Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_regset file name to iommu_regset
Add information for MTRR registers
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 78 +++
include/linux/intel-iommu.h | 2 +
2 files changed, 80 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index d5b0eea..9ee9a50 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -125,6 +125,81 @@ static int dmar_translation_struct_show(struct seq_file
*m, void *unused)
DEFINE_SHOW_ATTRIBUTE(dmar_translation_struct);
+static int iommu_regset_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ unsigned long long base;
+ int i;
+ struct regset {
+ int offset;
+ char *regs;
+ };
+
+ static const struct regset regstr[] = {{DMAR_VER_REG, "VER"},
+ {DMAR_CAP_REG, "CAP"},
+ {DMAR_ECAP_REG, "ECAP"},
+ {DMAR_GCMD_REG, "GCMD"},
+ {DMAR_GSTS_REG, "GSTS"},
+ {DMAR_RTADDR_REG, "RTADDR"},
+ {DMAR_CCMD_REG, "CCMD"},
+ {DMAR_FSTS_REG, "FSTS"},
+ {DMAR_FECTL_REG, "FECTL"},
+ {DMAR_FEDATA_REG, "FEDATA"},
+ {DMAR_FEADDR_REG, "FEADDR"},
+ {DMAR_FEUADDR_REG, "FEUADDR"},
+ {DMAR_AFLOG_REG, "AFLOG"},
+ {DMAR_PMEN_REG, "PMEN"},
+ {DMAR_PLMBASE_REG, "PLMBASE"},
+ {DMAR_PLMLIMIT_REG, "PLMLIMIT"},
+ {DMAR_PHMBASE_REG, "PHMBASE"},
+ {DMAR_PHMLIMIT_REG, "PHMLIMIT"},
+ {DMAR_IQH_REG, "IQH"},
+ {DMAR_IQT_REG, "IQT"},
+ {DMAR_IQ_SHIFT, "IQ"},
+ {DMAR_IQA_REG, "IQA"},
+ {DMAR_ICS_REG, "ICS"},
+ {DMAR_IRTA_REG, "IRTA"},
+ {DMAR_PQH_REG, "PQH"},
+ {DMAR_PQT_REG, "PQT"},
+ {DMAR_PQA_REG, "PQA"},
+ {DMAR_PRS_REG, "PRS"},
+ {DMAR_PECTL_REG, "PECTL"},
+ {DMAR_PEDATA_REG, "PEDATA"},
+ {DMAR_PEADDR_REG, "PEADDR"},
+ {DMAR_PEUADDR_REG, "PEUADDR"},
+ {DMAR_MTRRCAP_REG, "MTRRCAP"},
+ {DMAR_MTRRDEF_REG, "MTRRDEF"} };
+
+ rcu
[PATCH v6 2/5] iommu/vt-d: Add debugfs support to show context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
IOMMU internals states such as root and context can be exported to the
userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 40214fa05 102
Higher Context table entries for Bus: 0
[80]:00:0a.00 4026c 0
IOMMU dmar1:Root Table Addr:4558a3000
Root tbl entries:
Bus 0 L: 4558aa001 H: 0
Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[160] :00:14.00 4558a9001 102
[184] :00:17.00 400eac001 302
[248] :00:1f.00 4558af001 202
[251] :00:1f.03 40070e001 502
[254] :00:1f.06 4467c9001 602
Root tbl entries:
Bus 1 L: 3fc8c2001 H: 0
Context table entries for Bus: 1
[entry] DID :B :D .FLow High
[0] :01:00.00 3fc8c3001 402
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v6: Change the order of includes to an alphabetical order
Change seq_printf formatting
v5: Change to a SPDX license tag
Fix seq_printf formatting
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Fix unnecessary reprogramming of the context entries
Simplify and merge the show context and extended context patch into one
Remove redundant IOMMU null check under for_each_active_iommu
v3: Add a macro for seq file operations
Change the intel_iommu_ctx file name to dmar_translation_struct
v2: No change
drivers/iommu/Makefile| 1 +
drivers/iommu/intel-iommu-debug.c | 139 ++
drivers/iommu/intel-iommu.c | 4 ++
3 files changed, 144 insertions(+)
create mode 100644 drivers/iommu/intel-iommu-debug.c
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 1fb6958..fdbaf46 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUG) += intel-iommu-debug.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
new file mode 100644
index 000..d5b0eea
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2017 Intel Corporation.
+ *
+ * Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
+ * Jacob Pan <jacob.jun@linux.intel.com>
+ *
+ */
+
+#define pr_fmt(fmt) "INTEL_IOMMU: " fmt
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "irq_remapping.h"
+
+#define TOTAL_BUS_NR (256) /* full bus range 256 */
+#define DEFINE_SHOW_ATTRIBUTE(__name) \
+static int __name ## _open(struct inode *inode, struct file *file) \
+{ \
+ return single_open(file, __name ## _show, inode->i_private);\
+} \
+static const struct file_operations __name ## _fops = \
+{ \
+ .open = __name ## _open, \
+ .read = seq_read, \
+ .llseek = seq_lseek,\
+ .release= single_release, \
+ .owner = THIS_MODULE, \
+}
+
+static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
+ int bus, bool ext, bool new_ext)
+{
+ struct context_entry *context;
+ int ctx;
+ unsigned long flags;
+
+ seq_printf(m, "%s Context table entries for Bus: %d\n",
+ ext ? "Lower" : "", bus);
+ seq_puts(m, "[entry]\tDID :B :D .F\tLow\t\tHigh\n");
+
+ spin_lock_irqsave(>lock, flags);
+
+ /* Publish either context entries or extended contenxt entries */
+ for (ctx = 0; ctx < (ext
[PATCH v6 1/5] iommu/vt-d: Add debugfs support for Intel IOMMU internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v6: No change
v5: No change
v4: No change
v3: No change
v2: No change
drivers/iommu/Kconfig | 10 ++
drivers/iommu/intel-iommu.c | 31 +++
include/linux/intel-iommu.h | 32
include/linux/intel-svm.h | 2 +-
4 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a2134..d7588ee 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -152,6 +152,16 @@ config INTEL_IOMMU
and include PCI device scope covered by these DMA
remapping devices.
+config INTEL_IOMMU_DEBUG
+ bool "Export Intel IOMMU internals in DebugFS"
+ depends on INTEL_IOMMU && DEBUG_FS
+ default n
+ help
+ IOMMU internal states such as context, PASID tables can be seen via
+ debugfs. Select this option if you want to export these internals.
+
+ Say Y if you need this.
+
config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4a2de34..e05b8e0 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -183,16 +183,6 @@ static int rwbf_quirk;
static int force_on = 0;
int intel_iommu_tboot_noforce;
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
- u64 lo;
- u64 hi;
-};
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
/*
@@ -218,21 +208,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
return re->hi & VTD_PAGE_MASK;
}
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
- u64 lo;
- u64 hi;
-};
static inline void context_clear_pasid_enable(struct context_entry *context)
{
@@ -259,7 +234,7 @@ static inline bool __context_present(struct context_entry
*context)
return (context->lo & 1);
}
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
{
return context_pasid_enabled(context) ?
__context_present(context) :
@@ -819,7 +794,7 @@ static void domain_update_iommu_cap(struct dmar_domain
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
}
-static inline struct context_entry *iommu_context_addr(struct intel_iommu
*iommu,
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
u8 bus, u8 devfn, int
alloc)
{
struct root_entry *root = >root_entry[bus];
@@ -5208,7 +5183,7 @@ static void intel_iommu_put_resv_regions(struct device
*dev,
#ifdef CONFIG_INTEL_IOMMU_SVM
#define MAX_NR_PASID_BITS (20)
-static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
+unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
{
/*
* Convert ecap_pss to extend context entry pts encoding, also
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index f3274d9..b8591dc 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -383,6 +383,33 @@ struct pasid_entry;
struct pasid_state_entry;
struct page_req_dsc;
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+ u64 lo;
+ u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+ u64 lo;
+ u64 hi;
+};
+
struct intel_iommu {
void __iomem*reg; /* Pointer to hardware regs, virtual addr */
u64 reg_phys; /* physical address of hw register set */
@@ -488,8 +515,13 @@ struct intel_svm {
extern int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct
intel_svm_dev *sdev);
extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
+extern unsigned long intel_iommu_get_pts(struct intel_iommu *iommu);
#endif
extern const struct attribute_group *intel_iommu_groups[];
+extern void intel_iommu_debugfs_init(void);
+extern bool context_present(struct context
[PATCH v6 0/5] Add Intel IOMMU debugfs support
Hi All, This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU registers, internal context and dumps individual table entries to help debug Intel IOMMUs. The first patch does the ground work for the following patches by creating a new Kconfig option - INTEL_IOMMU_DEBUG. It also reorganizes some Intel IOMMU data structures. The next four patches add debugfs support for IOMMU context internals, register contents, PASID internals, and Interrupt remapping in that order. The information can be accessed in sysfs at '/sys/kernel/debug/intel_iommu/'. Regards, Sohil Changes since v5: - Change the order of includes to an alphabetical order - Change seq_printf and seq_puts formatting Changes since v4: - Change to a SPDX license tag - Fix seq_printf formatting and remove leading '\n's Changes since v3: - Remove an unused function parameter from some of the functions - Fix checkpatch.pl warnings - Remove error reporting for debugfs_create_file functions - Fix unnecessary reprogramming of the context entries - Simplify and merge the show context and extended context patch into one - Remove redundant IOMMU null check under for_each_active_iommu - Update the commit title to be consistent Changes since v2: - Added a macro for seq file operations based on recommendation by Andy Shevchenko. The marco can be moved to seq_file.h at a future point - Changed the debugfs file names to more relevant ones - Added information for MTRR registers in the regset file Changes since v1: - Fixed seq_printf formatting - Handled the case when Interrupt remapping is not enabled Gayatri Kammela (4): iommu/vt-d: Add debugfs support for Intel IOMMU internals iommu/vt-d: Add debugfs support to show context internals iommu/vt-d: Add debugfs support to show register contents iommu/vt-d: Add debugfs support to show Pasid table contents Sohil Mehta (1): iommu/vt-d: Add debugfs support for Interrupt remapping drivers/iommu/Kconfig | 10 ++ drivers/iommu/Makefile| 1 + drivers/iommu/intel-iommu-debug.c | 346 ++ drivers/iommu/intel-iommu.c | 35 +--- drivers/iommu/intel-svm.c | 8 - include/linux/intel-iommu.h | 34 include/linux/intel-svm.h | 10 +- 7 files changed, 407 insertions(+), 37 deletions(-) create mode 100644 drivers/iommu/intel-iommu-debug.c -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v5 4/5] iommu/vt-d: Add debugfs support to show Pasid table contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 40214fa05 102
Higher Context table entries for Bus: 0
[80]:00:0a.00 4026c 0
Pasid Table Addr : 8e2d4260
Pasid table entries for domain 0:
[Entry] Contents
[0] 12c409801
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v5: No change
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
v3: No change
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 31 +++
drivers/iommu/intel-svm.c | 8
include/linux/intel-svm.h | 8
3 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index a62862e..218d767 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -38,6 +38,36 @@ static const struct file_operations __name ## _fops =
\
.owner = THIS_MODULE, \
}
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+ int pasid_size = 0, i;
+
+ if (ecap_pasid(iommu->ecap)) {
+ pasid_size = intel_iommu_get_pts(iommu);
+ seq_printf(m, "Pasid Table Addr : %p\n", iommu->pasid_table);
+
+ if (iommu->pasid_table) {
+ seq_printf(m, "Pasid table entries for domain %d:\n",
+ iommu->segment);
+ seq_puts(m, "[Entry]\t\tContents\n");
+
+ /* Publish the pasid table entries here */
+ for (i = 0; i < pasid_size; i++) {
+ if (!iommu->pasid_table[i].val)
+ continue;
+ seq_printf(m, "[%d]\t\t%04llx\n", i,
+ iommu->pasid_table[i].val);
+ }
+ }
+ }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
int bus, bool ext, bool new_ext)
{
@@ -71,6 +101,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, struct
intel_iommu *iommu,
}
}
}
+ pasid_tbl_entry_show(m, iommu);
out:
spin_unlock_irqrestore(>lock, flags);
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index ed1cf7c..c646724 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
static irqreturn_t prq_event_thread(int irq, void *d);
-struct pasid_entry {
- u64 val;
-};
-
-struct pasid_state_entry {
- u64 val;
-};
-
int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
{
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
struct device;
+struct pasid_entry {
+ u64 val;
+};
+
+struct pasid_state_entry {
+ u64 val;
+};
+
struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
u32 private, int rwxp, int response);
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v5 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the raw values for entries with the present bit set, in the format
shown.
Remapped Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
---
Index SID Dest_ID Vct Raw_value_high Raw_value_low
1 3a00 0600 2c 00043a00 062c0009
1114301 0900 a2 00044301 09a20009
Posted Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
Index SID PDA_high PDA_low Vct Raw_value_high Raw_value_low
4 4300 0010 40c7c880 41 00144300 40c7c88000418001
5 4300 0010 40c7c880 51 00144300 40c7c88000518001
Cc: Gayatri Kammela <gayatri.kamm...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
v5: Fix seq_puts formatting and remove leading '\n's
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_interrupt_remap file name to ir_translation_struct
v2: Handle the case when IR is not enabled. Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 98 +++
1 file changed, 98 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 218d767..5019835 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -4,6 +4,7 @@
*
* Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
* Jacob Pan <jacob.jun....@linux.intel.com>
+ * Sohil Mehta <sohil.me...@intel.com>
*
*/
@@ -230,6 +231,98 @@ static int iommu_regset_show(struct seq_file *m, void
*unused)
DEFINE_SHOW_ATTRIBUTE(iommu_regset);
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *ri_entry;
+
+ /* Print the header only once */
+ seq_puts(m, " Index SID Dest_ID Vct Raw_value_high
Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+ seq_printf(m, " %d\t%04x %08x %02x %016llx %016llx\n", idx,
+ ri_entry->sid, ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m,
+struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *pi_entry;
+
+ /* Print the header only once */
+ seq_puts(m, " Index SID PDA_high PDA_low Vct Raw_value_high
Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+ seq_printf(m, " %d\t%04x %08x %08x %02x %016llx %016llx\n",
+ idx, pi_entry->sid, pi_entry->pda_h,
+ (pi_entry->pda_l)<<6, pi_entry->vector,
+ pi_entry->high, pi_entry->low);
+ }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int ir_translation_struct_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!ecap_ir_support(iommu->ecap))
+ continue;
+
+ seq_printf(m, "Remapped Interrupt supported on IOMMU: %s\n"
+ " IR table address:%p\n", iommu->name,
+ iommu->ir_table);
+ seq_puts(m,
"---\n");
+
+ if (iommu->ir_table)
+ ir_tbl_remap_entry_show(m, iommu);
+ else
+ seq_puts(m, "
[PATCH v5 1/5] iommu/vt-d: Add debugfs support for Intel IOMMU internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v5: No change
v4: No change
v3: No change
v2: No change
drivers/iommu/Kconfig | 10 ++
drivers/iommu/intel-iommu.c | 31 +++
include/linux/intel-iommu.h | 32
include/linux/intel-svm.h | 2 +-
4 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a2134..d7588ee 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -152,6 +152,16 @@ config INTEL_IOMMU
and include PCI device scope covered by these DMA
remapping devices.
+config INTEL_IOMMU_DEBUG
+ bool "Export Intel IOMMU internals in DebugFS"
+ depends on INTEL_IOMMU && DEBUG_FS
+ default n
+ help
+ IOMMU internal states such as context, PASID tables can be seen via
+ debugfs. Select this option if you want to export these internals.
+
+ Say Y if you need this.
+
config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4a2de34..e05b8e0 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -183,16 +183,6 @@ static int rwbf_quirk;
static int force_on = 0;
int intel_iommu_tboot_noforce;
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
- u64 lo;
- u64 hi;
-};
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
/*
@@ -218,21 +208,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
return re->hi & VTD_PAGE_MASK;
}
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
- u64 lo;
- u64 hi;
-};
static inline void context_clear_pasid_enable(struct context_entry *context)
{
@@ -259,7 +234,7 @@ static inline bool __context_present(struct context_entry
*context)
return (context->lo & 1);
}
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
{
return context_pasid_enabled(context) ?
__context_present(context) :
@@ -819,7 +794,7 @@ static void domain_update_iommu_cap(struct dmar_domain
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
}
-static inline struct context_entry *iommu_context_addr(struct intel_iommu
*iommu,
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
u8 bus, u8 devfn, int
alloc)
{
struct root_entry *root = >root_entry[bus];
@@ -5208,7 +5183,7 @@ static void intel_iommu_put_resv_regions(struct device
*dev,
#ifdef CONFIG_INTEL_IOMMU_SVM
#define MAX_NR_PASID_BITS (20)
-static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
+unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
{
/*
* Convert ecap_pss to extend context entry pts encoding, also
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index f3274d9..b8591dc 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -383,6 +383,33 @@ struct pasid_entry;
struct pasid_state_entry;
struct page_req_dsc;
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+ u64 lo;
+ u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+ u64 lo;
+ u64 hi;
+};
+
struct intel_iommu {
void __iomem*reg; /* Pointer to hardware regs, virtual addr */
u64 reg_phys; /* physical address of hw register set */
@@ -488,8 +515,13 @@ struct intel_svm {
extern int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct
intel_svm_dev *sdev);
extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
+extern unsigned long intel_iommu_get_pts(struct intel_iommu *iommu);
#endif
extern const struct attribute_group *intel_iommu_groups[];
+extern void intel_iommu_debugfs_init(void);
+extern bool context_present(struct context
[PATCH v5 3/5] iommu/vt-d: Add debugfs support to show register contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00 0x0010
CAP 0x08 0x01cc40660462
ECAP 0x10 0x019e2ff0505e
GCMD 0x18 0x
GSTS 0x1c 0xc700
RTADDR 0x20 0x0004558d6800
CCMD 0x28 0x0800
FSTS 0x34 0x
FECTL0x38 0x
FEDATA 0x3c 0xfee0100c4141
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v5: No change
v4: Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_regset file name to iommu_regset
Add information for MTRR registers
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 78 +++
include/linux/intel-iommu.h | 2 +
2 files changed, 80 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 94d710c..a62862e 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -124,6 +124,81 @@ static int dmar_translation_struct_show(struct seq_file
*m, void *unused)
DEFINE_SHOW_ATTRIBUTE(dmar_translation_struct);
+static int iommu_regset_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ unsigned long long base;
+ int i;
+ struct regset {
+ int offset;
+ char *regs;
+ };
+
+ static const struct regset regstr[] = {{DMAR_VER_REG, "VER"},
+ {DMAR_CAP_REG, "CAP"},
+ {DMAR_ECAP_REG, "ECAP"},
+ {DMAR_GCMD_REG, "GCMD"},
+ {DMAR_GSTS_REG, "GSTS"},
+ {DMAR_RTADDR_REG, "RTADDR"},
+ {DMAR_CCMD_REG, "CCMD"},
+ {DMAR_FSTS_REG, "FSTS"},
+ {DMAR_FECTL_REG, "FECTL"},
+ {DMAR_FEDATA_REG, "FEDATA"},
+ {DMAR_FEADDR_REG, "FEADDR"},
+ {DMAR_FEUADDR_REG, "FEUADDR"},
+ {DMAR_AFLOG_REG, "AFLOG"},
+ {DMAR_PMEN_REG, "PMEN"},
+ {DMAR_PLMBASE_REG, "PLMBASE"},
+ {DMAR_PLMLIMIT_REG, "PLMLIMIT"},
+ {DMAR_PHMBASE_REG, "PHMBASE"},
+ {DMAR_PHMLIMIT_REG, "PHMLIMIT"},
+ {DMAR_IQH_REG, "IQH"},
+ {DMAR_IQT_REG, "IQT"},
+ {DMAR_IQ_SHIFT, "IQ"},
+ {DMAR_IQA_REG, "IQA"},
+ {DMAR_ICS_REG, "ICS"},
+ {DMAR_IRTA_REG, "IRTA"},
+ {DMAR_PQH_REG, "PQH"},
+ {DMAR_PQT_REG, "PQT"},
+ {DMAR_PQA_REG, "PQA"},
+ {DMAR_PRS_REG, "PRS"},
+ {DMAR_PECTL_REG, "PECTL"},
+ {DMAR_PEDATA_REG, "PEDATA"},
+ {DMAR_PEADDR_REG, "PEADDR"},
+ {DMAR_PEUADDR_REG, "PEUADDR"},
+ {DMAR_MTRRCAP_REG, "MTRRCAP"},
+ {DMAR_MTRRDEF_REG, "MTRRDEF"} };
+
+ rcu_read_lock();
+
[PATCH v5 2/5] iommu/vt-d: Add debugfs support to show context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
IOMMU internals states such as root and context can be exported to the
userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 40214fa05 102
Higher Context table entries for Bus: 0
[80]:00:0a.00 4026c 0
IOMMU dmar1:Root Table Addr:4558a3000
Root tbl entries:
Bus 0 L: 4558aa001 H: 0
Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[160] :00:14.00 4558a9001 102
[184] :00:17.00 400eac001 302
[248] :00:1f.00 4558af001 202
[251] :00:1f.03 40070e001 502
[254] :00:1f.06 4467c9001 602
Root tbl entries:
Bus 1 L: 3fc8c2001 H: 0
Context table entries for Bus: 1
[entry] DID :B :D .FLow High
[0] :01:00.00 3fc8c3001 402
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v5: Change to a SPDX license tag
Fix seq_printf formatting
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Fix unnecessary reprogramming of the context entries
Simplify and merge the show context and extended context patch into one
Remove redundant IOMMU null check under for_each_active_iommu
v3: Add a macro for seq file operations
Change the intel_iommu_ctx file name to dmar_translation_struct
v2: No change
drivers/iommu/Makefile| 1 +
drivers/iommu/intel-iommu-debug.c | 138 ++
drivers/iommu/intel-iommu.c | 4 ++
3 files changed, 143 insertions(+)
create mode 100644 drivers/iommu/intel-iommu-debug.c
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 1fb6958..fdbaf46 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUG) += intel-iommu-debug.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
new file mode 100644
index 000..94d710c
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2017 Intel Corporation.
+ *
+ * Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
+ * Jacob Pan <jacob.jun@linux.intel.com>
+ *
+ */
+
+#define pr_fmt(fmt) "INTEL_IOMMU: " fmt
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "irq_remapping.h"
+
+#define TOTAL_BUS_NR (256) /* full bus range 256 */
+#define DEFINE_SHOW_ATTRIBUTE(__name) \
+static int __name ## _open(struct inode *inode, struct file *file) \
+{ \
+ return single_open(file, __name ## _show, inode->i_private);\
+} \
+static const struct file_operations __name ## _fops = \
+{ \
+ .open = __name ## _open, \
+ .read = seq_read, \
+ .llseek = seq_lseek,\
+ .release= single_release, \
+ .owner = THIS_MODULE, \
+}
+
+static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
+ int bus, bool ext, bool new_ext)
+{
+ struct context_entry *context;
+ int ctx;
+ unsigned long flags;
+
+ seq_printf(m, "%s Context table entries for Bus: %d\n",
+ ext ? "Lower" : "", bus);
+ seq_puts(m, "[entry]\tDID :B :D .F\tLow\t\tHigh\n");
+
+ spin_lock_irqsave(>lock, flags);
+
+ /* Publish either context entries or extended contenxt entries */
+ for (ctx = 0; ctx < (ext ? 128 : 256); ctx++) {
+ context = iommu_context_addr(iommu, bus,
[PATCH v5 0/5] Add Intel IOMMU debugfs support
Hi All, This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU registers, internal context and dumps individual table entries to help debug Intel IOMMUs. The first patch does the ground work for the following patches by creating a new Kconfig option - INTEL_IOMMU_DEBUG. It also reorganizes some Intel IOMMU data structures. The next four patches add debugfs support for IOMMU context internals, register contents, PASID internals, and Interrupt remapping in that order. The information can be accessed in sysfs at '/sys/kernel/debug/intel_iommu/'. Regards, Sohil Changes since v4: - Change to a SPDX license tag - Fix seq_printf formatting and remove leading '\n's Changes since v3: - Remove an unused function parameter from some of the functions - Fix checkpatch.pl warnings - Remove error reporting for debugfs_create_file functions - Fix unnecessary reprogramming of the context entries - Simplify and merge the show context and extended context patch into one - Remove redundant IOMMU null check under for_each_active_iommu - Update the commit title to be consistent Changes since v2: - Added a macro for seq file operations based on recommendation by Andy Shevchenko. The marco can be moved to seq_file.h at a future point - Changed the debugfs file names to more relevant ones - Added information for MTRR registers in the regset file Changes since v1: - Fixed seq_printf formatting - Handled the case when Interrupt remapping is not enabled Gayatri Kammela (4): iommu/vt-d: Add debugfs support for Intel IOMMU internals iommu/vt-d: Add debugfs support to show context internals iommu/vt-d: Add debugfs support to show register contents iommu/vt-d: Add debugfs support to show Pasid table contents Sohil Mehta (1): iommu/vt-d: Add debugfs support for Interrupt remapping drivers/iommu/Kconfig | 10 ++ drivers/iommu/Makefile| 1 + drivers/iommu/intel-iommu-debug.c | 345 ++ drivers/iommu/intel-iommu.c | 35 +--- drivers/iommu/intel-svm.c | 8 - include/linux/intel-iommu.h | 34 include/linux/intel-svm.h | 10 +- 7 files changed, 406 insertions(+), 37 deletions(-) create mode 100644 drivers/iommu/intel-iommu-debug.c -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH 4/4] iommu/vt-d: Enable 5-level paging mode in the PASID entry
If the CPU has support for 5-level paging enabled and the IOMMU also
supports 5-level paging then enable the 5-level paging mode for first-
level translations - used when SVM is enabled.
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
drivers/iommu/intel-svm.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index 4072a18..d7095dd 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -26,6 +26,10 @@
#include
#include
+#define PASID_ENTRY_P BIT_ULL(0)
+#define PASID_ENTRY_FLPM_5LP BIT_ULL(9)
+#define PASID_ENTRY_SREBIT_ULL(11)
+
static irqreturn_t prq_event_thread(int irq, void *d);
struct pasid_entry {
@@ -297,6 +301,7 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int
flags, struct svm_dev_
struct intel_svm_dev *sdev;
struct intel_svm *svm = NULL;
struct mm_struct *mm = NULL;
+ u64 pasid_entry_val;
int pasid_max;
int ret;
@@ -403,9 +408,15 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int
flags, struct svm_dev_
kfree(sdev);
goto out;
}
- iommu->pasid_table[svm->pasid].val = (u64)__pa(mm->pgd)
| 1;
+ pasid_entry_val = (u64)__pa(mm->pgd) | PASID_ENTRY_P;
} else
- iommu->pasid_table[svm->pasid].val =
(u64)__pa(init_mm.pgd) | 1 | (1ULL << 11);
+ pasid_entry_val = (u64)__pa(init_mm.pgd) |
+ PASID_ENTRY_P | PASID_ENTRY_SRE;
+ if (cpu_feature_enabled(X86_FEATURE_LA57))
+ pasid_entry_val |= PASID_ENTRY_FLPM_5LP;
+
+ iommu->pasid_table[svm->pasid].val = pasid_entry_val;
+
wmb();
/* In caching mode, we still have to flush with PASID 0 when
* a PASID table entry becomes present. Not entirely clear
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH 3/4] iommu/vt-d: Add a check for 5-level paging support
Add a check to verify IOMMU 5-level paging support. If the CPU supports supports 5-level paging but the IOMMU does not support it then disable SVM by not allocating PASID tables. Signed-off-by: Sohil Mehta <sohil.me...@intel.com> --- drivers/iommu/intel-svm.c | 4 include/linux/intel-iommu.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index fcab440..4072a18 100644 --- a/drivers/iommu/intel-svm.c +++ b/drivers/iommu/intel-svm.c @@ -45,6 +45,10 @@ int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu) !cap_fl1gp_support(iommu->cap)) return -EINVAL; + if (cpu_feature_enabled(X86_FEATURE_LA57) && + !cap_5lp_support(iommu->cap)) + return -EINVAL; + /* Start at 2 because it's defined as 2^(1+PSS) */ iommu->pasid_max = 2 << ecap_pss(iommu->ecap); diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index a56bab1..8dad3dd 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -83,6 +83,7 @@ /* * Decoding Capability Register */ +#define cap_5lp_support(c) (((c) >> 60) & 1) #define cap_pi_support(c) (((c) >> 59) & 1) #define cap_fl1gp_support(c) (((c) >> 56) & 1) #define cap_read_drain(c) (((c) >> 55) & 1) -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH 1/4] iommu/vt-d: Enable upto 57 bits of domain address width
Update the IOMMU default domain address width to 57 bits. This would enable the IOMMU to do upto 5-levels of paging for second level translations - IOVA translation requests without PASID. Even though the maximum supported address width is being increased to 57, __iommu_calculate_agaw() would set the actual supported address width to the maximum support available in IOMMU hardware. Signed-off-by: Sohil Mehta <sohil.me...@intel.com> --- drivers/iommu/intel-iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 4a2de34..457795b 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -64,7 +64,7 @@ #define IOAPIC_RANGE_END (0xfeef) #define IOVA_START_ADDR(0x1000) -#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48 +#define DEFAULT_DOMAIN_ADDRESS_WIDTH 57 #define MAX_AGAW_WIDTH 64 #define MAX_AGAW_PFN_WIDTH (MAX_AGAW_WIDTH - VTD_PAGE_SHIFT) -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH 0/4] Add support for Intel IOMMU 5-level paging
Hi All, Upcoming hardware plans to introduce support for 5-level paging[1]. The support for CPU 5-level paging has already been merged in kernel v4.14. The following patches add support for Intel IOMMU 5-level paging. The patches are based on the Intel Virtualization Technology for Directed I/O spec revision - 2.5 [2] Intel IOMMU Extended-context entries support two levels of translation, referred to as first-level translation and second-level translation. The first level page table points to CPU page table when IOMMU is using Shared virtual memory(SVM). The second level page tables are built by IOMMU driver for IOVA translations when functions like dma_map/iommu_map are called. Use of 5-level paging for first-level translation is controlled through programming of the new paging mode field in the PASID entry for the IOMMU PASID (Process Address space ID) table. Use of 5-level paging for second-level translation is controlled through the programming of already existing Address Width (AW) field in the context/extended-context entry. The first patch adds 5-level paging support for second level translations by increasing the supported domain address width. The following patches add the necessary checks before enabling SVM. The last patch programs the 5-level paging mode in the PASID entry. Regards, Sohil [1] https://software.intel.com/sites/default/files/managed/2b/80/5-level_paging_white_paper.pdf [2] https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf Sohil Mehta (4): iommu/vt-d: Enable upto 57 bits of domain address width iommu/vt-d: Add a check for 1GB page support iommu/vt-d: Add a check for 5-level paging support iommu/vt-d: Enable 5-level paging mode in the PASID entry drivers/iommu/intel-iommu.c | 2 +- drivers/iommu/intel-svm.c | 23 +-- include/linux/intel-iommu.h | 2 ++ 3 files changed, 24 insertions(+), 3 deletions(-) -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH 2/4] iommu/vt-d: Add a check for 1GB page support
Add a check to verify IOMMU 1GB page support. If the CPU supports 1GB pages but the IOMMU does not support it then disable SVM by not allocating PASID tables. Signed-off-by: Sohil Mehta <sohil.me...@intel.com> --- drivers/iommu/intel-svm.c | 4 include/linux/intel-iommu.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index ed1cf7c..fcab440 100644 --- a/drivers/iommu/intel-svm.c +++ b/drivers/iommu/intel-svm.c @@ -41,6 +41,10 @@ int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu) struct page *pages; int order; + if (cpu_feature_enabled(X86_FEATURE_GBPAGES) && + !cap_fl1gp_support(iommu->cap)) + return -EINVAL; + /* Start at 2 because it's defined as 2^(1+PSS) */ iommu->pasid_max = 2 << ecap_pss(iommu->ecap); diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index f3274d9..a56bab1 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -84,6 +84,7 @@ * Decoding Capability Register */ #define cap_pi_support(c) (((c) >> 59) & 1) +#define cap_fl1gp_support(c) (((c) >> 56) & 1) #define cap_read_drain(c) (((c) >> 55) & 1) #define cap_write_drain(c) (((c) >> 54) & 1) #define cap_max_amask_val(c) (((c) >> 48) & 0x3f) -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v4 1/5] iommu/vt-d: Add debugfs support for Intel IOMMU internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v4: No change
v3: No change
v2: No change
drivers/iommu/Kconfig | 10 ++
drivers/iommu/intel-iommu.c | 31 +++
include/linux/intel-iommu.h | 32
include/linux/intel-svm.h | 2 +-
4 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a2134..d7588ee 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -152,6 +152,16 @@ config INTEL_IOMMU
and include PCI device scope covered by these DMA
remapping devices.
+config INTEL_IOMMU_DEBUG
+ bool "Export Intel IOMMU internals in DebugFS"
+ depends on INTEL_IOMMU && DEBUG_FS
+ default n
+ help
+ IOMMU internal states such as context, PASID tables can be seen via
+ debugfs. Select this option if you want to export these internals.
+
+ Say Y if you need this.
+
config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4a2de34..e05b8e0 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -183,16 +183,6 @@ static int rwbf_quirk;
static int force_on = 0;
int intel_iommu_tboot_noforce;
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
- u64 lo;
- u64 hi;
-};
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
/*
@@ -218,21 +208,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
return re->hi & VTD_PAGE_MASK;
}
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
- u64 lo;
- u64 hi;
-};
static inline void context_clear_pasid_enable(struct context_entry *context)
{
@@ -259,7 +234,7 @@ static inline bool __context_present(struct context_entry
*context)
return (context->lo & 1);
}
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
{
return context_pasid_enabled(context) ?
__context_present(context) :
@@ -819,7 +794,7 @@ static void domain_update_iommu_cap(struct dmar_domain
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
}
-static inline struct context_entry *iommu_context_addr(struct intel_iommu
*iommu,
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
u8 bus, u8 devfn, int
alloc)
{
struct root_entry *root = >root_entry[bus];
@@ -5208,7 +5183,7 @@ static void intel_iommu_put_resv_regions(struct device
*dev,
#ifdef CONFIG_INTEL_IOMMU_SVM
#define MAX_NR_PASID_BITS (20)
-static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
+unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
{
/*
* Convert ecap_pss to extend context entry pts encoding, also
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index f3274d9..b8591dc 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -383,6 +383,33 @@ struct pasid_entry;
struct pasid_state_entry;
struct page_req_dsc;
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+ u64 lo;
+ u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+ u64 lo;
+ u64 hi;
+};
+
struct intel_iommu {
void __iomem*reg; /* Pointer to hardware regs, virtual addr */
u64 reg_phys; /* physical address of hw register set */
@@ -488,8 +515,13 @@ struct intel_svm {
extern int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct
intel_svm_dev *sdev);
extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
+extern unsigned long intel_iommu_get_pts(struct intel_iommu *iommu);
#endif
extern const struct attribute_group *intel_iommu_groups[];
+extern void intel_iommu_debugfs_init(void);
+extern bool context_present(struct context
[PATCH v4 3/5] iommu/vt-d: Add debugfs support to show register contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00 0x0010
CAP 0x08 0x01cc40660462
ECAP 0x10 0x019e2ff0505e
GCMD 0x18 0x
GSTS 0x1c 0xc700
RTADDR 0x20 0x0004558d6800
CCMD 0x28 0x0800
FSTS 0x34 0x
FECTL0x38 0x
FEDATA 0x3c 0xfee0100c4141
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v4: Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_regset file name to iommu_regset
Add information for MTRR registers
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 78 +++
include/linux/intel-iommu.h | 2 +
2 files changed, 80 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index fa458904..c45c0f6 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -132,6 +132,81 @@ static int dmar_translation_struct_show(struct seq_file
*m, void *unused)
DEFINE_SHOW_ATTRIBUTE(dmar_translation_struct);
+static int iommu_regset_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ unsigned long long base;
+ int i;
+ struct regset {
+ int offset;
+ char *regs;
+ };
+
+ static const struct regset regstr[] = {{DMAR_VER_REG, "VER"},
+ {DMAR_CAP_REG, "CAP"},
+ {DMAR_ECAP_REG, "ECAP"},
+ {DMAR_GCMD_REG, "GCMD"},
+ {DMAR_GSTS_REG, "GSTS"},
+ {DMAR_RTADDR_REG, "RTADDR"},
+ {DMAR_CCMD_REG, "CCMD"},
+ {DMAR_FSTS_REG, "FSTS"},
+ {DMAR_FECTL_REG, "FECTL"},
+ {DMAR_FEDATA_REG, "FEDATA"},
+ {DMAR_FEADDR_REG, "FEADDR"},
+ {DMAR_FEUADDR_REG, "FEUADDR"},
+ {DMAR_AFLOG_REG, "AFLOG"},
+ {DMAR_PMEN_REG, "PMEN"},
+ {DMAR_PLMBASE_REG, "PLMBASE"},
+ {DMAR_PLMLIMIT_REG, "PLMLIMIT"},
+ {DMAR_PHMBASE_REG, "PHMBASE"},
+ {DMAR_PHMLIMIT_REG, "PHMLIMIT"},
+ {DMAR_IQH_REG, "IQH"},
+ {DMAR_IQT_REG, "IQT"},
+ {DMAR_IQ_SHIFT, "IQ"},
+ {DMAR_IQA_REG, "IQA"},
+ {DMAR_ICS_REG, "ICS"},
+ {DMAR_IRTA_REG, "IRTA"},
+ {DMAR_PQH_REG, "PQH"},
+ {DMAR_PQT_REG, "PQT"},
+ {DMAR_PQA_REG, "PQA"},
+ {DMAR_PRS_REG, "PRS"},
+ {DMAR_PECTL_REG, "PECTL"},
+ {DMAR_PEDATA_REG, "PEDATA"},
+ {DMAR_PEADDR_REG, "PEADDR"},
+ {DMAR_PEUADDR_REG, "PEUADDR"},
+ {DMAR_MTRRCAP_REG, "MTRRCAP"},
+ {DMAR_MTRRDEF_REG, "MTRRDEF"} };
+
+ rcu_read_lock();
+
[PATCH v4 2/5] iommu/vt-d: Add debugfs support to show context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
IOMMU internals states such as root and context can be exported to the
userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 40214fa05 102
Higher Context table entries for Bus: 0
[80]:00:0a.00 4026c 0
IOMMU dmar1:Root Table Addr:4558a3000
Root tbl entries:
Bus 0 L: 4558aa001 H: 0
Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[160] :00:14.00 4558a9001 102
[184] :00:17.00 400eac001 302
[248] :00:1f.00 4558af001 202
[251] :00:1f.03 40070e001 502
[254] :00:1f.06 4467c9001 602
Root tbl entries:
Bus 1 L: 3fc8c2001 H: 0
Context table entries for Bus: 1
[entry] DID :B :D .FLow High
[0] :01:00.00 3fc8c3001 402
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Fix unnecessary reprogramming of the context entries
Simplify and merge the show context and extended context patch into one
Remove redundant IOMMU null check under for_each_active_iommu
v3: Add a macro for seq file operations
Change the intel_iommu_ctx file name to dmar_translation_struct
v2: No change
drivers/iommu/Makefile| 1 +
drivers/iommu/intel-iommu-debug.c | 146 ++
drivers/iommu/intel-iommu.c | 4 ++
3 files changed, 151 insertions(+)
create mode 100644 drivers/iommu/intel-iommu-debug.c
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 1fb6958..fdbaf46 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUG) += intel-iommu-debug.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
new file mode 100644
index 000..fa458904
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright © 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
+ * Jacob Pan <jacob.jun@linux.intel.com>
+ *
+ */
+
+#define pr_fmt(fmt) "INTEL_IOMMU: " fmt
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "irq_remapping.h"
+
+#define TOTAL_BUS_NR (256) /* full bus range 256 */
+#define DEFINE_SHOW_ATTRIBUTE(__name) \
+static int __name ## _open(struct inode *inode, struct file *file) \
+{ \
+ return single_open(file, __name ## _show, inode->i_private);\
+} \
+static const struct file_operations __name ## _fops = \
+{ \
+ .open = __name ## _open, \
+ .read = seq_read, \
+ .llseek = seq_lseek,\
+ .release= single_release, \
+ .owner = THIS_MODULE, \
+}
+
+static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
+ int bus, bool ext, bool new_ext)
+{
+ struct context_entry *context;
+ int ctx;
+ unsigned long flags;
+
+ seq_printf(m, "%s Context table entries for Bus: %d\n",
+ ex
[PATCH v4 5/5] iommu/vt-d: Add debugfs support for Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the raw values for entries with the present bit set, in the format
shown.
Remapped Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
---
Index SID Dest_ID Vct Raw_value_high Raw_value_low
1 3a00 0600 2c 00043a00 062c0009
1114301 0900 a2 00044301 09a20009
Posted Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
Index SID PDA_high PDA_low Vct Raw_value_high Raw_value_low
4 4300 0010 40c7c880 41 00144300 40c7c88000418001
5 4300 0010 40c7c880 51 00144300 40c7c88000518001
Cc: Gayatri Kammela <gayatri.kamm...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
Remove error reporting for debugfs_create_file function
Remove redundant IOMMU null check under for_each_active_iommu
v3: Use a macro for seq file operations
Change the intel_iommu_interrupt_remap file name to ir_translation_struct
v2: Handle the case when IR is not enabled. Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 100 ++
1 file changed, 100 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index c751d53..12a7c04 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -12,6 +12,7 @@
*
* Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
* Jacob Pan <jacob.jun....@linux.intel.com>
+ * Sohil Mehta <sohil.me...@intel.com>
*
*/
@@ -238,6 +239,100 @@ static int iommu_regset_show(struct seq_file *m, void
*unused)
DEFINE_SHOW_ATTRIBUTE(iommu_regset);
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *ri_entry;
+
+ /* Print the header only once */
+ seq_puts(m, " Index SID Dest_ID Vct Raw_value_high
Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+ seq_printf(m, " %d\t%04x %08x %02x %016llx %016llx\n", idx,
+ ri_entry->sid, ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m,
+struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *pi_entry;
+
+ /* Print the header only once */
+ seq_puts(m, " Index SID PDA_high PDA_low Vct Raw_value_high
Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+ seq_printf(m, " %d\t%04x %08x %08x %02x %016llx %016llx\n",
+ idx, pi_entry->sid, pi_entry->pda_h,
+ (pi_entry->pda_l)<<6, pi_entry->vector,
+ pi_entry->high, pi_entry->low);
+ }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int ir_translation_struct_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!ecap_ir_support(iommu->ecap))
+ continue;
+
+ seq_printf(m, "\nRemapped Interrupt supported on IOMMU: %s\n"
+ " IR table address:%p\n", iommu->name,
+ iommu->ir_table);
+
+ seq_puts(m, "---"
+"\n");
+
+ if (iommu->ir_table)
+ ir_tbl_remap_entry_show(m, iommu);
+ else
+ seq_puts(m, "Interr
[PATCH v4 4/5] iommu/vt-d: Add debugfs support to show Pasid table contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:402b9e800
Extended Root table entries:
Bus 0 L: 402150001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 40214fa05 102
Higher Context table entries for Bus: 0
[80]:00:0a.00 4026c 0
Pasid Table Addr : 8e2d4260
Pasid table entries for domain 0:
[Entry] Contents
[0] 12c409801
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v4: Remove the unused function parameter
Fix checkpatch.pl warnings
v3: No change
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 31 +++
drivers/iommu/intel-svm.c | 8
include/linux/intel-svm.h | 8
3 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index c45c0f6..c751d53 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -46,6 +46,36 @@ static const struct file_operations __name ## _fops =
\
.owner = THIS_MODULE, \
}
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+ int pasid_size = 0, i;
+
+ if (ecap_pasid(iommu->ecap)) {
+ pasid_size = intel_iommu_get_pts(iommu);
+ seq_printf(m, "Pasid Table Addr : %p\n", iommu->pasid_table);
+
+ if (iommu->pasid_table) {
+ seq_printf(m, "Pasid table entries for domain %d:\n",
+ iommu->segment);
+ seq_puts(m, "[Entry]\t\tContents\n");
+
+ /* Publish the pasid table entries here */
+ for (i = 0; i < pasid_size; i++) {
+ if (!iommu->pasid_table[i].val)
+ continue;
+ seq_printf(m, "[%d]\t\t%04llx\n", i,
+ iommu->pasid_table[i].val);
+ }
+ }
+ }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static void pasid_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu)
+{
+}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
static void ctx_tbl_entry_show(struct seq_file *m, struct intel_iommu *iommu,
int bus, bool ext, bool new_ext)
{
@@ -79,6 +109,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, struct
intel_iommu *iommu,
}
}
}
+ pasid_tbl_entry_show(m, iommu);
out:
spin_unlock_irqrestore(>lock, flags);
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index ed1cf7c..c646724 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
static irqreturn_t prq_event_thread(int irq, void *d);
-struct pasid_entry {
- u64 val;
-};
-
-struct pasid_state_entry {
- u64 val;
-};
-
int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
{
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
struct device;
+struct pasid_entry {
+ u64 val;
+};
+
+struct pasid_state_entry {
+ u64 val;
+};
+
struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
u32 private, int rwxp, int response);
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v3 6/6] iommu/vt-d: Add debugfs support for Intel IOMMU Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/ir_translation_struct provides
detailed information, such as Index, Source Id, Destination Id, Vector
and the raw values for entries with the present bit set, in the format
shown.
Remapped Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
---
Index SID Dest_ID Vct Raw_value_high Raw_value_low
1 3a00 0600 2c 00043a00 062c0009
1114301 0900 a2 00044301 09a20009
Posted Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
Index SID PDA_high PDA_low Vct Raw_value_high Raw_value_low
4 4300 0010 40c7c880 41 00144300 40c7c88000418001
5 4300 0010 40c7c880 51 00144300 40c7c88000518001
Cc: Gayatri Kammela <gayatri.kamm...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
v3: Use a macro for seq file operations
Change the intel_iommu_interrupt_remap file name to ir_translation_struct
v2: Handle the case when IR is not enabled. Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 112 ++
1 file changed, 112 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 66a99f5..8803277 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -12,6 +12,7 @@
*
* Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
* Jacob Pan <jacob.jun....@linux.intel.com>
+ * Sohil Mehta <sohil.me...@intel.com>
*
*/
@@ -273,6 +274,108 @@ static int iommu_regset_show(struct seq_file *m, void
*unused)
DEFINE_SHOW_ATTRIBUTE(iommu_regset);
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *ri_entry;
+
+ /* Print the header only once */
+ seq_printf(m, " Index SID Dest_ID Vct"
+ " Raw_value_high Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+ seq_printf(m,
+ " %d\t%04x %08x %02x %016llx %016llx\n",
+ idx, ri_entry->sid,
+ ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m, void *unused,
+struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *pi_entry;
+
+ /* Print the header only once */
+ seq_printf(m, " Index SID PDA_high PDA_low Vct"
+ " Raw_value_high Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+ seq_printf(m,
+ " %d\t%04x %08x %08x %02x %016llx %016llx\n",
+ idx, pi_entry->sid,
+ pi_entry->pda_h, (pi_entry->pda_l)<<6,
+ pi_entry->vector, pi_entry->high,
+ pi_entry->low);
+ }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int ir_translation_struct_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!iommu || !ecap_ir_support(iommu->ecap))
+ continue;
+
+ seq_printf(m,
+ "\nRemapped Interrupt supported on IOMMU: %s\n"
+ " IR table address:%p\n",
+ iommu->name, iommu->ir_table);
+
+ seq_printf(m, "---"
+ "\n");
+
+ if (iommu->ir_table)
+ ir_tbl_remap_entry_show(m, unused, iommu);
+ else
+
[PATCH v3 2/6] iommu/vt-d: Add Intel IOMMU debugfs to show context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
IOMMU internals states such as root and context can be exported to the
userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar2:Root Table Addr:4558a3000
Root tbl entries:
Bus 0 L: 4558aa001 H: 0
Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[160] :00:14.00 4558a9001 102
[184] :00:17.00 400eac001 302
[248] :00:1f.00 4558af001 202
[251] :00:1f.03 40070e001 502
[254] :00:1f.06 4467c9001 602
Root tbl entries:
Bus 1 L: 3fc8c2001 H: 0
Context table entries for Bus: 1
[entry] DID :B :D .FLow High
[0] :01:00.00 3fc8c3001 402
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v3: Add a macro for seq file operations
Change the intel_iommu_ctx file name to dmar_translation_struct
v2: No change
drivers/iommu/Makefile| 1 +
drivers/iommu/intel-iommu-debug.c | 152 ++
drivers/iommu/intel-iommu.c | 4 +
3 files changed, 157 insertions(+)
create mode 100644 drivers/iommu/intel-iommu-debug.c
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 1fb6958..fdbaf46 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUG) += intel-iommu-debug.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
new file mode 100644
index 000..8ae0c4d
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -0,0 +1,152 @@
+/*
+ * Copyright © 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
+ * Jacob Pan <jacob.jun@linux.intel.com>
+ *
+ */
+
+#define pr_fmt(fmt) "INTEL_IOMMU: " fmt
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "irq_remapping.h"
+
+#define TOTAL_BUS_NR (256) /* full bus range 256 */
+#define DEFINE_SHOW_ATTRIBUTE(__name) \
+static int __name ## _open(struct inode *inode, struct file *file) \
+{ \
+ return single_open(file, __name ## _show, inode->i_private);\
+} \
+static const struct file_operations __name ## _fops = \
+{ \
+ .open = __name ## _open, \
+ .read = seq_read, \
+ .llseek = seq_lseek,\
+ .release= single_release, \
+ .owner = THIS_MODULE, \
+}
+
+static void ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, bool ext,
+ bool new_ext)
+{
+ struct context_entry *context;
+ int ctx;
+ unsigned long flags;
+
+ seq_printf(m, "%s Context table entries for Bus: %d\n",
+ ext ? "Lower" : "", bus);
+ seq_printf(m, "[entry]\tDID :B :D .F\tLow\t\tHigh\n");
+
+ spin_lock_irqsave(>lock, flags);
+
+ /* Publish either context entries or extended contenxt entries */
+ for (ctx = 0; ctx < (ext ? 128 : 256); ctx++) {
+ context = iommu_context_addr(iommu, bus, ctx, 0);
+ if (!context)
+ goto out;
+ if (context_present(context)) {
+ seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n",
+
[PATCH v3 4/6] iommu/vt-d: Add debugfs extension to show register contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00 0x0010
CAP 0x08 0x01cc40660462
ECAP 0x10 0x019e2ff0505e
GCMD 0x18 0x
GSTS 0x1c 0xc700
RTADDR 0x20 0x0004558d6800
CCMD 0x28 0x0800
FSTS 0x34 0x
FECTL0x38 0x
FEDATA 0x3c 0xfee0100c4141
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v3: Use a macro for seq file operations
Change the intel_iommu_regset file name to iommu_regset
Add information for MTRR registers
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 86 +++
include/linux/intel-iommu.h | 2 +
2 files changed, 88 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 8e7f5d2..0951d58 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -163,6 +163,84 @@ static int dmar_translation_struct_show(struct seq_file
*m, void *unused)
DEFINE_SHOW_ATTRIBUTE(dmar_translation_struct);
+static int iommu_regset_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ unsigned long long base;
+ int i;
+ struct regset {
+ int offset;
+ char *regs;
+ };
+
+ static const struct regset regstr[] = {{DMAR_VER_REG, "VER"},
+ {DMAR_CAP_REG, "CAP"},
+ {DMAR_ECAP_REG, "ECAP"},
+ {DMAR_GCMD_REG, "GCMD"},
+ {DMAR_GSTS_REG, "GSTS"},
+ {DMAR_RTADDR_REG, "RTADDR"},
+ {DMAR_CCMD_REG, "CCMD"},
+ {DMAR_FSTS_REG, "FSTS"},
+ {DMAR_FECTL_REG, "FECTL"},
+ {DMAR_FEDATA_REG, "FEDATA"},
+ {DMAR_FEADDR_REG, "FEADDR"},
+ {DMAR_FEUADDR_REG, "FEUADDR"},
+ {DMAR_AFLOG_REG, "AFLOG"},
+ {DMAR_PMEN_REG, "PMEN"},
+ {DMAR_PLMBASE_REG, "PLMBASE"},
+ {DMAR_PLMLIMIT_REG, "PLMLIMIT"},
+ {DMAR_PHMBASE_REG, "PHMBASE"},
+ {DMAR_PHMLIMIT_REG, "PHMLIMIT"},
+ {DMAR_IQH_REG, "IQH"},
+ {DMAR_IQT_REG, "IQT"},
+ {DMAR_IQ_SHIFT, "IQ"},
+ {DMAR_IQA_REG, "IQA"},
+ {DMAR_ICS_REG, "ICS"},
+ {DMAR_IRTA_REG, "IRTA"},
+ {DMAR_PQH_REG, "PQH"},
+ {DMAR_PQT_REG, "PQT"},
+ {DMAR_PQA_REG, "PQA"},
+ {DMAR_PRS_REG, "PRS"},
+ {DMAR_PECTL_REG, "PECTL"},
+ {DMAR_PEDATA_REG, "PEDATA"},
+ {DMAR_PEADDR_REG, "PEADDR"},
+ {DMAR_PEUADDR_REG, "PEUADDR"},
+ {DMAR_MTRRCAP_REG, "MTRRCAP"},
+ {DMAR_MTRRDEF_REG, "MTRRDEF"} };
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (iommu) {
+ if (!drhd->reg_base_addr) {
+ seq_printf(m,
[PATCH v3 0/6] Intel IOMMU debugfs support
Hi all, This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU registers, internal context and dumps individual table entries to help debug Intel IOMMUs. The first patch does the ground work for the following patches by creating a new Kconfig option - INTEL_IOMMU_DEBUG. It also reorganizes some Intel IOMMU data structures. The next five patches add debugfs support for IOMMU context internals, extended context, register contents, PASID internals, and Interrupt remapping in that order. The information can be accessed in sysfs at '/sys/kernel/debug/intel_iommu/'. Regards, Sohil Changes since v2: - Added a macro for seq file operations based on recommendation by Andy Shevchenko. The marco can be moved to seq_file.h at a future point - Changed the debugfs file names to more relevant ones - Added information for MTRR registers in the regset file Changes since v1: - Fixed seq_printf formatting - Handled the case when Interrupt remapping is not enabled Gayatri Kammela (5): iommu/vt-d: Add debugfs support for Intel IOMMU internals iommu/vt-d: Add Intel IOMMU debugfs to show context internals iommu/vt-d: Add Intel IOMMU debugfs to show extended context internals iommu/vt-d: Add debugfs extension to show register contents iommu/vt-d: Add debugfs extension to show Pasid table contents Sohil Mehta (1): iommu/vt-d: Add debugfs support for Intel IOMMU Interrupt remapping drivers/iommu/Kconfig | 10 + drivers/iommu/Makefile| 1 + drivers/iommu/intel-iommu-debug.c | 417 ++ drivers/iommu/intel-iommu.c | 35 +--- drivers/iommu/intel-svm.c | 8 - include/linux/intel-iommu.h | 34 include/linux/intel-svm.h | 10 +- 7 files changed, 478 insertions(+), 37 deletions(-) create mode 100644 drivers/iommu/intel-iommu-debug.c -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v3 5/6] iommu/vt-d: Add debugfs extension to show Pasid table contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar0: Extended Root Table Addr:4310c4800
Extended Root tbl entries:
Bus 0 L: 3ff5a8001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 3ff5a9a05 102
Higher Context tbl entries for Bus: 0
[80]:00:0a.00 4016c 72514000
Pasid Table Addr : 8db2c160
Pasid table entries for domain:
[Entry] Contents
[0] 26a609801
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v3: No change
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 32
drivers/iommu/intel-svm.c | 8
include/linux/intel-svm.h | 8
3 files changed, 40 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 0951d58..66a99f5 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -47,6 +47,31 @@ static const struct file_operations __name ## _fops =
\
}
#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, void *unused,
+struct intel_iommu *iommu)
+{
+ int pasid_size = 0, i;
+
+ if (ecap_pasid(iommu->ecap)) {
+ pasid_size = intel_iommu_get_pts(iommu);
+ seq_printf(m, "Pasid Table Addr : %p\n", iommu->pasid_table);
+
+ if (iommu->pasid_table) {
+ seq_printf(m, "Pasid table entries for domain %d:\n",
+ iommu->segment);
+ seq_printf(m, "[Entry]\t\tContents\n");
+
+ /* Publish the pasid table entries here */
+ for (i = 0; i < pasid_size; i++) {
+ if (!iommu->pasid_table[i].val)
+ continue;
+ seq_printf(m, "[%d]\t\t%04llx\n", i,
+ iommu->pasid_table[i].val);
+ }
+ }
+ }
+}
+
static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, int ctx,
struct context_entry *context, bool new_ext)
@@ -70,6 +95,12 @@ static void ext_ctx_tbl_entry_show(struct seq_file *m, void
*unused,
}
}
#else /* CONFIG_INTEL_IOMMU_SVM */
+static void pasid_tbl_entry_show(struct seq_file *m, void *unused,
+struct intel_iommu *iommu)
+{
+ return;
+}
+
static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, int ctx,
struct context_entry *context, bool new_ext)
@@ -106,6 +137,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, void
*unused,
context, new_ext);
}
}
+ pasid_tbl_entry_show(m, unused, iommu);
out:
spin_unlock_irqrestore(>lock, flags);
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index f6697e5..2003f23 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
static irqreturn_t prq_event_thread(int irq, void *d);
-struct pasid_entry {
- u64 val;
-};
-
-struct pasid_state_entry {
- u64 val;
-};
-
int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
{
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
struct device;
+struct pasid_entry {
+ u64 val;
+};
+
+struct pasid_state_entry {
+ u64 val;
+};
+
struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
u32 private, int rwxp, int response);
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v3 3/6] iommu/vt-d: Add Intel IOMMU debugfs to show extended context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump internals such as extended context table
entries for each IOMMU to the userspace.
root@OTC-KBLH-01:~# cat
/sys/kernel/debug/intel_iommu/dmar_translation_struct
IOMMU dmar1: Extended Root Table Addr:4558a1800
Extended Root tbl entries:
Bus 0 L: 4558a6001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[16]:00:02.00 4558a5005 102
Higher Context tbl entries for Bus: 0
[16]:00:02.00 401bc 40140
IOMMU dmar0: Extended Root Table Addr:4558a2800
Extended Root tbl entries:
Bus 0 L: 4016f4001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 4016f3a05 102
Higher Context tbl entries for Bus: 0
[80]:00:0a.00 4015c 671b8000
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v3: No change
v2: No change
drivers/iommu/intel-iommu-debug.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 8ae0c4d..8e7f5d2 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -46,6 +46,38 @@ static const struct file_operations __name ## _fops =
\
.owner = THIS_MODULE, \
}
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, int ctx,
+ struct context_entry *context, bool new_ext)
+{
+ u64 ctx_lo;
+
+ if (new_ext) {
+ seq_printf(m, "Higher Context tbl entries for Bus: %d\n", bus);
+ ctx_lo = context[0].lo;
+
+ if (!(ctx_lo & CONTEXT_PASIDE)) {
+ context[1].hi = (u64)virt_to_phys(
+ iommu->pasid_state_table);
+ context[1].lo = (u64)virt_to_phys(iommu->pasid_table) |
+ intel_iommu_get_pts(iommu);
+ }
+
+ seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n", ctx,
+ iommu->segment, bus, PCI_SLOT(ctx), PCI_FUNC(ctx),
+ context[1].lo, context[1].hi);
+ }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, int ctx,
+ struct context_entry *context, bool new_ext)
+{
+ return;
+}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
static void ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, bool ext,
bool new_ext)
@@ -69,6 +101,9 @@ static void ctx_tbl_entry_show(struct seq_file *m, void
*unused,
seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n",
ctx, iommu->segment, bus, PCI_SLOT(ctx),
PCI_FUNC(ctx), context[0].lo, context[0].hi);
+
+ ext_ctx_tbl_entry_show(m, unused, iommu, bus, ctx,
+ context, new_ext);
}
}
out:
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v3 1/6] iommu/vt-d: Add debugfs support for Intel IOMMU internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v3: No change
v2: No change
drivers/iommu/Kconfig | 10 ++
drivers/iommu/intel-iommu.c | 31 +++
include/linux/intel-iommu.h | 32
include/linux/intel-svm.h | 2 +-
4 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a2134..d7588ee 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -152,6 +152,16 @@ config INTEL_IOMMU
and include PCI device scope covered by these DMA
remapping devices.
+config INTEL_IOMMU_DEBUG
+ bool "Export Intel IOMMU internals in DebugFS"
+ depends on INTEL_IOMMU && DEBUG_FS
+ default n
+ help
+ IOMMU internal states such as context, PASID tables can be seen via
+ debugfs. Select this option if you want to export these internals.
+
+ Say Y if you need this.
+
config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 6784a05..419a559 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -185,16 +185,6 @@ static int rwbf_quirk;
static int force_on = 0;
int intel_iommu_tboot_noforce;
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
- u64 lo;
- u64 hi;
-};
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
/*
@@ -220,21 +210,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
return re->hi & VTD_PAGE_MASK;
}
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
- u64 lo;
- u64 hi;
-};
static inline void context_clear_pasid_enable(struct context_entry *context)
{
@@ -261,7 +236,7 @@ static inline bool __context_present(struct context_entry
*context)
return (context->lo & 1);
}
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
{
return context_pasid_enabled(context) ?
__context_present(context) :
@@ -821,7 +796,7 @@ static void domain_update_iommu_cap(struct dmar_domain
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
}
-static inline struct context_entry *iommu_context_addr(struct intel_iommu
*iommu,
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
u8 bus, u8 devfn, int
alloc)
{
struct root_entry *root = >root_entry[bus];
@@ -5200,7 +5175,7 @@ static void intel_iommu_put_resv_regions(struct device
*dev,
#ifdef CONFIG_INTEL_IOMMU_SVM
#define MAX_NR_PASID_BITS (20)
-static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
+unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
{
/*
* Convert ecap_pss to extend context entry pts encoding, also
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 485a5b4..defbc32 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -382,6 +382,33 @@ struct pasid_entry;
struct pasid_state_entry;
struct page_req_dsc;
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+ u64 lo;
+ u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+ u64 lo;
+ u64 hi;
+};
+
struct intel_iommu {
void __iomem*reg; /* Pointer to hardware regs, virtual addr */
u64 reg_phys; /* physical address of hw register set */
@@ -487,8 +514,13 @@ struct intel_svm {
extern int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct
intel_svm_dev *sdev);
extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
+extern unsigned long intel_iommu_get_pts(struct intel_iommu *iommu);
#endif
extern const struct attribute_group *intel_iommu_groups[];
+extern void intel_iommu_debugfs_init(void);
+extern bool context_present(struct context
[PATCH v2 4/6] iommu/vt-d: Add debugfs extension to show register contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00 0x0010
CAP 0x08 0x01cc40660462
ECAP 0x10 0x019e2ff0505e
GCMD 0x18 0x
GSTS 0x1c 0xc700
RTADDR 0x20 0x0004558d6800
CCMD 0x28 0x0800
FSTS 0x34 0x
FECTL0x38 0x
FEDATA 0x3c 0xfee0100c4141
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 96 +++
1 file changed, 96 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index ef46820..3e1ce7d 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -161,6 +161,93 @@ static const struct file_operations intel_iommu_debug_fops
= {
.owner = THIS_MODULE,
};
+static int intel_iommu_debugfs_regs_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ unsigned long long base;
+ int i;
+ struct regset {
+ int offset;
+ char *regs;
+ };
+
+ static const struct regset regstr[] = {{DMAR_VER_REG, "VER"},
+ {DMAR_CAP_REG, "CAP"},
+ {DMAR_ECAP_REG, "ECAP"},
+ {DMAR_GCMD_REG, "GCMD"},
+ {DMAR_GSTS_REG, "GSTS"},
+ {DMAR_RTADDR_REG, "RTADDR"},
+ {DMAR_CCMD_REG, "CCMD"},
+ {DMAR_FSTS_REG, "FSTS"},
+ {DMAR_FECTL_REG, "FECTL"},
+ {DMAR_FEDATA_REG, "FEDATA"},
+ {DMAR_FEADDR_REG, "FEADDR"},
+ {DMAR_FEUADDR_REG, "FEUADDR"},
+ {DMAR_AFLOG_REG, "AFLOG"},
+ {DMAR_PMEN_REG, "PMEN"},
+ {DMAR_PLMBASE_REG, "PLMBASE"},
+ {DMAR_PLMLIMIT_REG, "PLMLIMIT"},
+ {DMAR_PHMBASE_REG, "PHMBASE"},
+ {DMAR_PHMLIMIT_REG, "PHMLIMIT"},
+ {DMAR_IQH_REG, "IQH"},
+ {DMAR_IQT_REG, "IQT"},
+ {DMAR_IQ_SHIFT, "IQ"},
+ {DMAR_IQA_REG, "IQA"},
+ {DMAR_ICS_REG, "ICS"},
+ {DMAR_IRTA_REG, "IRTA"},
+ {DMAR_PQH_REG, "PQH"},
+ {DMAR_PQT_REG, "PQT"},
+ {DMAR_PQA_REG, "PQA"},
+ {DMAR_PRS_REG, "PRS"},
+ {DMAR_PECTL_REG, "PECTL"},
+ {DMAR_PEDATA_REG, "PEDATA"},
+ {DMAR_PEADDR_REG, "PEADDR"},
+ {DMAR_PEUADDR_REG, "PEUADDR"} };
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (iommu) {
+ if (!drhd->reg_base_addr) {
+ seq_printf(m, "IOMMU: Invalid base address\n");
+ rcu_read_unlock();
+ return -EINVAL;
+ }
+
+ base = drhd->reg_base_addr;
+ seq_printf(m, "\nDMAR: %s: reg_base_addr %llx\n",
+
[PATCH v2 3/6] iommu/vt-d: Add Intel IOMMU debugfs to show extended context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump internals such as extended context table
entries for each IOMMU to the userspace.
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar1: Extended Root Table Addr:4558a1800
Extended Root tbl entries:
Bus 0 L: 4558a6001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[16]:00:02.00 4558a5005 102
Higher Context tbl entries for Bus: 0
[16]:00:02.00 401bc 40140
IOMMU dmar0: Extended Root Table Addr:4558a2800
Extended Root tbl entries:
Bus 0 L: 4016f4001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 4016f3a05 102
Higher Context tbl entries for Bus: 0
[80]:00:0a.00 4015c 671b8000
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v2: No change
drivers/iommu/intel-iommu-debug.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 90872ed..ef46820 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -33,6 +33,38 @@
#define TOTAL_BUS_NR (256) /* full bus range 256 */
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, int ctx,
+ struct context_entry *context, bool new_ext)
+{
+ u64 ctx_lo;
+
+ if (new_ext) {
+ seq_printf(m, "Higher Context tbl entries for Bus: %d\n", bus);
+ ctx_lo = context[0].lo;
+
+ if (!(ctx_lo & CONTEXT_PASIDE)) {
+ context[1].hi = (u64)virt_to_phys(
+ iommu->pasid_state_table);
+ context[1].lo = (u64)virt_to_phys(iommu->pasid_table) |
+ intel_iommu_get_pts(iommu);
+ }
+
+ seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n", ctx,
+ iommu->segment, bus, PCI_SLOT(ctx), PCI_FUNC(ctx),
+ context[1].lo, context[1].hi);
+ }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, int ctx,
+ struct context_entry *context, bool new_ext)
+{
+ return;
+}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
static void ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, bool ext,
bool new_ext)
@@ -56,6 +88,9 @@ static void ctx_tbl_entry_show(struct seq_file *m, void
*unused,
seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n",
ctx, iommu->segment, bus, PCI_SLOT(ctx),
PCI_FUNC(ctx), context[0].lo, context[0].hi);
+
+ ext_ctx_tbl_entry_show(m, unused, iommu, bus, ctx,
+ context, new_ext);
}
}
out:
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v2 6/6] iommu/vt-d: Add debugfs support for Intel IOMMU Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/intel_iommu_interrupt_remap
provides detailed information, such as Index, Source Id, Destination Id,
Vector and the raw values for entries with the present bit set, in the
format shown.
Remapped Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
---
Index SID Dest_ID Vct Raw_value_high Raw_value_low
1 3a00 0600 2c 00043a00 062c0009
1114301 0900 a2 00044301 09a20009
Posted Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
Index SID PDA_high PDA_low Vct Raw_value_high Raw_value_low
4 4300 0010 40c7c880 41 00144300 40c7c88000418001
5 4300 0010 40c7c880 51 00144300 40c7c88000518001
Cc: Gayatri Kammela <gayatri.kamm...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
v2: Handle the case when IR is not enabled. Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 123 ++
1 file changed, 123 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 22a0683..7fda862 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -12,6 +12,7 @@
*
* Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
* Jacob Pan <jacob.jun....@linux.intel.com>
+ * Sohil Mehta <sohil.me...@intel.com>
*
*/
@@ -280,6 +281,119 @@ static const struct file_operations intel_iommu_regs_fops
= {
.release= single_release,
};
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *ri_entry;
+
+ /* Print the header only once */
+ seq_printf(m, " Index SID Dest_ID Vct"
+ " Raw_value_high Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+ seq_printf(m,
+ " %d\t%04x %08x %02x %016llx %016llx\n",
+ idx, ri_entry->sid,
+ ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *pi_entry;
+
+ /* Print the header only once */
+ seq_printf(m, " Index SID PDA_high PDA_low Vct"
+ " Raw_value_high Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+ seq_printf(m,
+ " %d\t%04x %08x %08x %02x %016llx %016llx\n",
+ idx, pi_entry->sid,
+ pi_entry->pda_h, (pi_entry->pda_l)<<6,
+ pi_entry->vector, pi_entry->high,
+ pi_entry->low);
+ }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int intel_iommu_ir_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!iommu || !ecap_ir_support(iommu->ecap))
+ continue;
+
+ seq_printf(m,
+ "\nRemapped Interrupt supported on IOMMU: %s\n"
+ " IR table address:%p\n",
+ iommu->name, iommu->ir_table);
+
+ seq_printf(m, "---"
+ "\n");
+
+ if (iommu->ir_table)
+ ir_tbl_remap_entry_show(m, unused, iommu);
+ else
+ seq_printf(m, "Interrupt Remapping is not enabled\n");
+ }
+
+ seq_printf(m, "\n\t\t
[PATCH v2 1/6] iommu/vt-d: Add debugfs support for Intel IOMMU internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Enable Intel IOMMU debug to export Intel IOMMU internals in debugfs
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v2: No change
drivers/iommu/Kconfig | 10 ++
drivers/iommu/intel-iommu.c | 31 +++
include/linux/intel-iommu.h | 32
include/linux/intel-svm.h | 2 +-
4 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f3a2134..d7588ee 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -152,6 +152,16 @@ config INTEL_IOMMU
and include PCI device scope covered by these DMA
remapping devices.
+config INTEL_IOMMU_DEBUG
+ bool "Export Intel IOMMU internals in DebugFS"
+ depends on INTEL_IOMMU && DEBUG_FS
+ default n
+ help
+ IOMMU internal states such as context, PASID tables can be seen via
+ debugfs. Select this option if you want to export these internals.
+
+ Say Y if you need this.
+
config INTEL_IOMMU_SVM
bool "Support for Shared Virtual Memory with Intel IOMMU"
depends on INTEL_IOMMU && X86
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 6784a05..419a559 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -185,16 +185,6 @@ static int rwbf_quirk;
static int force_on = 0;
int intel_iommu_tboot_noforce;
-/*
- * 0: Present
- * 1-11: Reserved
- * 12-63: Context Ptr (12 - (haw-1))
- * 64-127: Reserved
- */
-struct root_entry {
- u64 lo;
- u64 hi;
-};
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
/*
@@ -220,21 +210,6 @@ static phys_addr_t root_entry_uctp(struct root_entry *re)
return re->hi & VTD_PAGE_MASK;
}
-/*
- * low 64 bits:
- * 0: present
- * 1: fault processing disable
- * 2-3: translation type
- * 12-63: address space root
- * high 64 bits:
- * 0-2: address width
- * 3-6: aval
- * 8-23: domain id
- */
-struct context_entry {
- u64 lo;
- u64 hi;
-};
static inline void context_clear_pasid_enable(struct context_entry *context)
{
@@ -261,7 +236,7 @@ static inline bool __context_present(struct context_entry
*context)
return (context->lo & 1);
}
-static inline bool context_present(struct context_entry *context)
+bool context_present(struct context_entry *context)
{
return context_pasid_enabled(context) ?
__context_present(context) :
@@ -821,7 +796,7 @@ static void domain_update_iommu_cap(struct dmar_domain
*domain)
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
}
-static inline struct context_entry *iommu_context_addr(struct intel_iommu
*iommu,
+struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
u8 bus, u8 devfn, int
alloc)
{
struct root_entry *root = >root_entry[bus];
@@ -5200,7 +5175,7 @@ static void intel_iommu_put_resv_regions(struct device
*dev,
#ifdef CONFIG_INTEL_IOMMU_SVM
#define MAX_NR_PASID_BITS (20)
-static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
+unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
{
/*
* Convert ecap_pss to extend context entry pts encoding, also
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 485a5b4..defbc32 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -382,6 +382,33 @@ struct pasid_entry;
struct pasid_state_entry;
struct page_req_dsc;
+/*
+ * 0: Present
+ * 1-11: Reserved
+ * 12-63: Context Ptr (12 - (haw-1))
+ * 64-127: Reserved
+ */
+struct root_entry {
+ u64 lo;
+ u64 hi;
+};
+
+/*
+ * low 64 bits:
+ * 0: present
+ * 1: fault processing disable
+ * 2-3: translation type
+ * 12-63: address space root
+ * high 64 bits:
+ * 0-2: address width
+ * 3-6: aval
+ * 8-23: domain id
+ */
+struct context_entry {
+ u64 lo;
+ u64 hi;
+};
+
struct intel_iommu {
void __iomem*reg; /* Pointer to hardware regs, virtual addr */
u64 reg_phys; /* physical address of hw register set */
@@ -487,8 +514,13 @@ struct intel_svm {
extern int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct
intel_svm_dev *sdev);
extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev);
+extern unsigned long intel_iommu_get_pts(struct intel_iommu *iommu);
#endif
extern const struct attribute_group *intel_iommu_groups[];
+extern void intel_iommu_debugfs_init(void);
+extern bool context_present(struct context_entry *context);
+extern struct context_entry *iommu_contex
[PATCH v2 5/6] iommu/vt-d: Add debugfs extension to show Pasid table contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar0: Extended Root Table Addr:4310c4800
Extended Root tbl entries:
Bus 0 L: 3ff5a8001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 3ff5a9a05 102
Higher Context tbl entries for Bus: 0
[80]:00:0a.00 4016c 72514000
Pasid Table Addr : 8db2c160
Pasid table entries for domain:
[Entry] Contents
[0] 26a609801
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v2: Fix seq_printf formatting
drivers/iommu/intel-iommu-debug.c | 32
drivers/iommu/intel-svm.c | 8
include/linux/intel-svm.h | 8
3 files changed, 40 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 3e1ce7d..22a0683 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -34,6 +34,31 @@
#define TOTAL_BUS_NR (256) /* full bus range 256 */
#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, void *unused,
+struct intel_iommu *iommu)
+{
+ int pasid_size = 0, i;
+
+ if (ecap_pasid(iommu->ecap)) {
+ pasid_size = intel_iommu_get_pts(iommu);
+ seq_printf(m, "Pasid Table Addr : %p\n", iommu->pasid_table);
+
+ if (iommu->pasid_table) {
+ seq_printf(m, "Pasid table entries for domain %d:\n",
+ iommu->segment);
+ seq_printf(m, "[Entry]\t\tContents\n");
+
+ /* Publish the pasid table entries here */
+ for (i = 0; i < pasid_size; i++) {
+ if (!iommu->pasid_table[i].val)
+ continue;
+ seq_printf(m, "[%d]\t\t%04llx\n", i,
+ iommu->pasid_table[i].val);
+ }
+ }
+ }
+}
+
static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, int ctx,
struct context_entry *context, bool new_ext)
@@ -57,6 +82,12 @@ static void ext_ctx_tbl_entry_show(struct seq_file *m, void
*unused,
}
}
#else /* CONFIG_INTEL_IOMMU_SVM */
+static void pasid_tbl_entry_show(struct seq_file *m, void *unused,
+struct intel_iommu *iommu)
+{
+ return;
+}
+
static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, int ctx,
struct context_entry *context, bool new_ext)
@@ -93,6 +124,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, void
*unused,
context, new_ext);
}
}
+ pasid_tbl_entry_show(m, unused, iommu);
out:
spin_unlock_irqrestore(>lock, flags);
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index f6697e5..2003f23 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
static irqreturn_t prq_event_thread(int irq, void *d);
-struct pasid_entry {
- u64 val;
-};
-
-struct pasid_state_entry {
- u64 val;
-};
-
int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
{
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
struct device;
+struct pasid_entry {
+ u64 val;
+};
+
+struct pasid_state_entry {
+ u64 val;
+};
+
struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
u32 private, int rwxp, int response);
--
2.7.4
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v2 2/6] iommu/vt-d: Add Intel IOMMU debugfs to show context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
IOMMU internals states such as root and context can be exported to the
userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar2:Root Table Addr:4558a3000
Root tbl entries:
Bus 0 L: 4558aa001 H: 0
Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[160] :00:14.00 4558a9001 102
[184] :00:17.00 400eac001 302
[248] :00:1f.00 4558af001 202
[251] :00:1f.03 40070e001 502
[254] :00:1f.06 4467c9001 602
Root tbl entries:
Bus 1 L: 3fc8c2001 H: 0
Context table entries for Bus: 1
[entry] DID :B :D .FLow High
[0] :01:00.00 3fc8c3001 402
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Jacob Pan <jacob.jun@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
v2: No change
drivers/iommu/Makefile| 1 +
drivers/iommu/intel-iommu-debug.c | 149 ++
drivers/iommu/intel-iommu.c | 4 +
3 files changed, 154 insertions(+)
create mode 100644 drivers/iommu/intel-iommu-debug.c
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 1fb6958..fdbaf46 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_SMMU) += arm-smmu.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
+obj-$(CONFIG_INTEL_IOMMU_DEBUG) += intel-iommu-debug.o
obj-$(CONFIG_INTEL_IOMMU_SVM) += intel-svm.o
obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o
obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
new file mode 100644
index 000..90872ed
--- /dev/null
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright © 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
+ * Jacob Pan <jacob.jun@linux.intel.com>
+ *
+ */
+
+#define pr_fmt(fmt) "INTEL_IOMMU: " fmt
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "irq_remapping.h"
+
+#define TOTAL_BUS_NR (256) /* full bus range 256 */
+
+static void ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, bool ext,
+ bool new_ext)
+{
+ struct context_entry *context;
+ int ctx;
+ unsigned long flags;
+
+ seq_printf(m, "%s Context table entries for Bus: %d\n",
+ ext ? "Lower" : "", bus);
+ seq_printf(m, "[entry]\tDID :B :D .F\tLow\t\tHigh\n");
+
+ spin_lock_irqsave(>lock, flags);
+
+ /* Publish either context entries or extended contenxt entries */
+ for (ctx = 0; ctx < (ext ? 128 : 256); ctx++) {
+ context = iommu_context_addr(iommu, bus, ctx, 0);
+ if (!context)
+ goto out;
+ if (context_present(context)) {
+ seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n",
+ ctx, iommu->segment, bus, PCI_SLOT(ctx),
+ PCI_FUNC(ctx), context[0].lo, context[0].hi);
+ }
+ }
+out:
+ spin_unlock_irqrestore(>lock, flags);
+}
+
+static void root_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, u64 rtaddr_reg,
+ bool ext, bool new_ext)
+{
+ int bus;
+
+ seq_printf(m, "\nIOMMU %s: %2s Root Table Addr:%llx\n", iommu->name,
+ ext ? "Extended" : "", rtaddr_reg);
+ /* Publish extended root table entries or root table entries here */
+ for (bus = 0; bus < TOTAL_BUS_NR; bus++) {
+ if (!iommu->root_entry[bus].lo)
+ continue;
+
+ seq_printf(m, "%s Root tbl entries:\n", ext ? "Extended" : "");
+ seq_printf(m, "Bus %d L: %llx H: %llx\n", bus,
+
[PATCH v2 0/6] Intel IOMMU debugfs support
Hi all, This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU registers, internal context and dumps individual table entries to help debug Intel IOMMUs. The first patch does the ground work for the following patches by creating a new Kconfig option - INTEL_IOMMU_DEBUG. It also reorganizes some Intel IOMMU data structures. The next five patches add debugfs support for IOMMU context internals, extended context, register contents, PASID internals, and Interrupt remapping in that order. The information can be accessed in sysfs at '/sys/kernel/debug/intel_iommu/'. Regards, Sohil Changes since v1: - Fixed seq_printf formatting - Handled the case when Interrupt remapping is not enabled Gayatri Kammela (5): iommu/vt-d: Add debugfs support for Intel IOMMU internals iommu/vt-d: Add Intel IOMMU debugfs to show context internals iommu/vt-d: Add Intel IOMMU debugfs to show extended context internals iommu/vt-d: Add debugfs extension to show register contents iommu/vt-d: Add debugfs extension to show Pasid table contents Sohil Mehta (1): iommu/vt-d: Add debugfs support for Intel IOMMU Interrupt remapping drivers/iommu/Kconfig | 10 + drivers/iommu/Makefile| 1 + drivers/iommu/intel-iommu-debug.c | 435 ++ drivers/iommu/intel-iommu.c | 35 +-- drivers/iommu/intel-svm.c | 8 - include/linux/intel-iommu.h | 32 +++ include/linux/intel-svm.h | 10 +- 7 files changed, 494 insertions(+), 37 deletions(-) create mode 100644 drivers/iommu/intel-iommu-debug.c -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH 6/6] iommu/vt-d: Debugfs support for Intel IOMMU Interrupt remapping
Debugfs extension for Intel IOMMU to dump Interrupt remapping table
entries for Interrupt remapping and Interrupt posting.
The file /sys/kernel/debug/intel_iommu/intel_iommu_interrupt_remap
provides detailed information, such as Index, Source Id, Destination Id,
Vector and the raw values for entries with the present bit set, in the
format shown.
Remapped Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
---
Index SID Dest_ID Vct Raw_value_high Raw_value_low
1 3a00 0600 2c 00043a00 062c0009
1114301 0900 a2 00044301 09a20009
Posted Interrupt supported on IOMMU: dmar5
IR table address:93e09d54c310
Index SID PDA_high PDA_low Vct Raw_value_high Raw_value_low
4 4300 0010 40c7c880 41 00144300 40c7c88000418001
5 4300 0010 40c7c880 51 00144300 40c7c88000518001
Cc: Gayatri Kammela <gayatri.kamm...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Sohil Mehta <sohil.me...@intel.com>
---
drivers/iommu/intel-iommu-debug.c | 115 ++
1 file changed, 115 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 2de4f1b..102aca6 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -12,6 +12,7 @@
*
* Authors: Gayatri Kammela <gayatri.kamm...@intel.com>
* Jacob Pan <jacob.jun....@linux.intel.com>
+ * Sohil Mehta <sohil.me...@intel.com>
*
*/
@@ -282,6 +283,111 @@ static const struct file_operations intel_iommu_regs_fops
= {
.release= single_release,
};
+#ifdef CONFIG_IRQ_REMAP
+static void ir_tbl_remap_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *ri_entry;
+
+ /* Print the header only once */
+ seq_printf(m, " Index SID Dest_ID Vct"
+ " Raw_value_high Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ ri_entry = >ir_table->base[idx];
+ if (!ri_entry->present || ri_entry->p_pst)
+ continue;
+ seq_printf(m,
+ " %d\t%04x %08x %02x %016llx %016llx\n",
+ idx, ri_entry->sid,
+ ri_entry->dest_id, ri_entry->vector,
+ ri_entry->high, ri_entry->low);
+ }
+}
+
+static void ir_tbl_posted_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu)
+{
+ int idx;
+ struct irte *pi_entry;
+
+ /* Print the header only once */
+ seq_printf(m, " Index SID PDA_high PDA_low Vct"
+ " Raw_value_high Raw_value_low\n");
+
+ for (idx = 0; idx < INTR_REMAP_TABLE_ENTRIES; idx++) {
+ pi_entry = >ir_table->base[idx];
+ if (!pi_entry->present || !pi_entry->p_pst)
+ continue;
+ seq_printf(m,
+ " %d\t%04x %08x %08x %02x %016llx %016llx\n",
+ idx, pi_entry->sid,
+ pi_entry->pda_h, (pi_entry->pda_l)<<6,
+ pi_entry->vector, pi_entry->high,
+ pi_entry->low);
+ }
+}
+
+/*
+ * For active IOMMUs go through the Interrupt remapping
+ * table and print valid entries in a table format for
+ * Remapped and Posted Interrupts.
+ */
+static int intel_iommu_ir_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (!iommu || !ecap_ir_support(iommu->ecap))
+ continue;
+
+ seq_printf(m,
+ "\nRemapped Interrupt supported on IOMMU: %s"
+ "\n IR table address:%llx\n",
+ iommu->name, (long long)iommu->ir_table);
+
+ seq_printf(m, "---"
+ "\n");
+ ir_tbl_remap_entry_show(m, unused, iommu);
+ }
+
+ seq_printf(m, "\n\t\t\t\t\t\t\t\n");
+
+ for_each_active_iommu(iommu, drhd) {
+ if (!iommu || !cap_pi_support(iommu->cap))
+ continue;
+
+ se
[PATCH 4/6] iommu/vt-d: Add debugfs extension to show register contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump all the register contents for each IOMMU
device to the user space via debugfs.
example:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_regset
DMAR: dmar1: reg_base_addr fed9
Name Offset Contents
VER 0x00 0x0010
CAP 0x08 0x01cc40660462
ECAP 0x10 0x019e2ff0505e
GCMD 0x18 0x
GSTS 0x1c 0xc700
RTADDR 0x20 0x0004558d6800
CCMD 0x28 0x0800
FSTS 0x34 0x
FECTL0x38 0x
FEDATA 0x3c 0xfee0100c4141
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
drivers/iommu/intel-iommu-debug.c | 97 +++
1 file changed, 97 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index ef46820..295cadc 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -161,6 +161,94 @@ static const struct file_operations intel_iommu_debug_fops
= {
.owner = THIS_MODULE,
};
+static int intel_iommu_debugfs_regs_show(struct seq_file *m, void *unused)
+{
+ struct dmar_drhd_unit *drhd;
+ struct intel_iommu *iommu;
+ unsigned long long base;
+ int i;
+ struct regset {
+ int offset;
+ char *regs;
+ };
+
+ static const struct regset regstr[] = {{DMAR_VER_REG, "VER"},
+ {DMAR_CAP_REG, "CAP"},
+ {DMAR_ECAP_REG, "ECAP"},
+ {DMAR_GCMD_REG, "GCMD"},
+ {DMAR_GSTS_REG, "GSTS"},
+ {DMAR_RTADDR_REG, "RTADDR"},
+ {DMAR_CCMD_REG, "CCMD"},
+ {DMAR_FSTS_REG, "FSTS"},
+ {DMAR_FECTL_REG, "FECTL"},
+ {DMAR_FEDATA_REG, "FEDATA"},
+ {DMAR_FEADDR_REG, "FEADDR"},
+ {DMAR_FEUADDR_REG, "FEUADDR"},
+ {DMAR_AFLOG_REG, "AFLOG"},
+ {DMAR_PMEN_REG, "PMEN"},
+ {DMAR_PLMBASE_REG, "PLMBASE"},
+ {DMAR_PLMLIMIT_REG, "PLMLIMIT"},
+ {DMAR_PHMBASE_REG, "PHMBASE"},
+ {DMAR_PHMLIMIT_REG, "PHMLIMIT"},
+ {DMAR_IQH_REG, "IQH"},
+ {DMAR_IQT_REG, "IQT"},
+ {DMAR_IQ_SHIFT, "IQ"},
+ {DMAR_IQA_REG, "IQA"},
+ {DMAR_ICS_REG, "ICS"},
+ {DMAR_IRTA_REG, "IRTA"},
+ {DMAR_PQH_REG, "PQH"},
+ {DMAR_PQT_REG, "PQT"},
+ {DMAR_PQA_REG, "PQA"},
+ {DMAR_PRS_REG, "PRS"},
+ {DMAR_PECTL_REG, "PECTL"},
+ {DMAR_PEDATA_REG, "PEDATA"},
+ {DMAR_PEADDR_REG, "PEADDR"},
+ {DMAR_PEUADDR_REG, "PEUADDR"} };
+
+ rcu_read_lock();
+ for_each_active_iommu(iommu, drhd) {
+ if (iommu) {
+ if (!drhd->reg_base_addr) {
+ seq_printf(m, "IOMMU: Invalid base address\n");
+ rcu_read_unlock();
+ return -EINVAL;
+ }
+
+ base = drhd->reg_base_addr;
+ seq_printf(m, "\nDMAR: %s: reg_base_addr %llx\n",
+ iommu->name, base);
+
[PATCH 3/6] iommu/vt-d: Add Intel IOMMU debugfs to show extended context internals
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump internals such as extended context table
entries for each IOMMU to the userspace.
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar1: Extended Root Table Addr:4558a1800
Extended Root tbl entries:
Bus 0 L: 4558a6001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[16]:00:02.00 4558a5005 102
Higher Context tbl entries for Bus: 0
[16]:00:02.00 401bc 40140
IOMMU dmar0: Extended Root Table Addr:4558a2800
Extended Root tbl entries:
Bus 0 L: 4016f4001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 4016f3a05 102
Higher Context tbl entries for Bus: 0
[80]:00:0a.00 4015c 671b8000
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
drivers/iommu/intel-iommu-debug.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 90872ed..ef46820 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -33,6 +33,38 @@
#define TOTAL_BUS_NR (256) /* full bus range 256 */
+#ifdef CONFIG_INTEL_IOMMU_SVM
+static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, int ctx,
+ struct context_entry *context, bool new_ext)
+{
+ u64 ctx_lo;
+
+ if (new_ext) {
+ seq_printf(m, "Higher Context tbl entries for Bus: %d\n", bus);
+ ctx_lo = context[0].lo;
+
+ if (!(ctx_lo & CONTEXT_PASIDE)) {
+ context[1].hi = (u64)virt_to_phys(
+ iommu->pasid_state_table);
+ context[1].lo = (u64)virt_to_phys(iommu->pasid_table) |
+ intel_iommu_get_pts(iommu);
+ }
+
+ seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n", ctx,
+ iommu->segment, bus, PCI_SLOT(ctx), PCI_FUNC(ctx),
+ context[1].lo, context[1].hi);
+ }
+}
+#else /* CONFIG_INTEL_IOMMU_SVM */
+static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
+ struct intel_iommu *iommu, int bus, int ctx,
+ struct context_entry *context, bool new_ext)
+{
+ return;
+}
+#endif /* CONFIG_INTEL_IOMMU_SVM */
+
static void ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, bool ext,
bool new_ext)
@@ -56,6 +88,9 @@ static void ctx_tbl_entry_show(struct seq_file *m, void
*unused,
seq_printf(m, "[%d]\t%04x:%02x:%02x.%02x\t%llx\t%llx\n",
ctx, iommu->segment, bus, PCI_SLOT(ctx),
PCI_FUNC(ctx), context[0].lo, context[0].hi);
+
+ ext_ctx_tbl_entry_show(m, unused, iommu, bus, ctx,
+ context, new_ext);
}
}
out:
--
2.7.4
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[PATCH 5/6] iommu/vt-d: Add debugfs extension to show Pasid table contents
From: Gayatri Kammela <gayatri.kamm...@intel.com>
Debugfs extension to dump the internals such as pasid table entries for
each IOMMU to the userspace.
Example of such dump in Kabylake:
root@OTC-KBLH-01:~# cat /sys/kernel/debug/intel_iommu/intel_iommu_ctx
IOMMU dmar0: Extended Root Table Addr:4310c4800
Extended Root tbl entries:
Bus 0 L: 3ff5a8001 H: 0
Lower Context table entries for Bus: 0
[entry] DID :B :D .FLow High
[80]:00:0a.00 3ff5a9a05 102
Higher Context tbl entries for Bus: 0
[80]:00:0a.00 4016c 72514000
Pasid Table Addr : 8db2c160
Pasid table entries for domain:
[Entry] Contents
[0] 26a609801
Cc: Sohil Mehta <sohil.me...@intel.com>
Cc: Fenghua Yu <fenghua...@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Ashok Raj <ashok@intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kamm...@intel.com>
---
drivers/iommu/intel-iommu-debug.c | 33 +
drivers/iommu/intel-svm.c | 8
include/linux/intel-svm.h | 8
3 files changed, 41 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/intel-iommu-debug.c
b/drivers/iommu/intel-iommu-debug.c
index 295cadc..2de4f1b 100644
--- a/drivers/iommu/intel-iommu-debug.c
+++ b/drivers/iommu/intel-iommu-debug.c
@@ -34,6 +34,32 @@
#define TOTAL_BUS_NR (256) /* full bus range 256 */
#ifdef CONFIG_INTEL_IOMMU_SVM
+static void pasid_tbl_entry_show(struct seq_file *m, void *unused,
+struct intel_iommu *iommu)
+{
+ int pasid_size = 0, i;
+
+ if (ecap_pasid(iommu->ecap)) {
+ pasid_size = intel_iommu_get_pts(iommu);
+ seq_printf(m, "Pasid Table Addr : %llx\n", (unsigned long long)
+ iommu->pasid_table);
+
+ if (iommu->pasid_table) {
+ seq_printf(m, "Pasid table entries for domain %d:\n",
+ iommu->segment);
+ seq_printf(m, "%2s\t\t%4s\n", "[Entry]", "Contents");
+
+ /* Publish the pasid table entries here */
+ for (i = 0; i < pasid_size; i++) {
+ if (!iommu->pasid_table[i].val)
+ continue;
+ seq_printf(m, "[%d]\t%04llx\n", i,
+ iommu->pasid_table[i].val);
+ }
+ }
+ }
+}
+
static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, int ctx,
struct context_entry *context, bool new_ext)
@@ -57,6 +83,12 @@ static void ext_ctx_tbl_entry_show(struct seq_file *m, void
*unused,
}
}
#else /* CONFIG_INTEL_IOMMU_SVM */
+static void pasid_tbl_entry_show(struct seq_file *m, void *unused,
+struct intel_iommu *iommu)
+{
+ return;
+}
+
static void ext_ctx_tbl_entry_show(struct seq_file *m, void *unused,
struct intel_iommu *iommu, int bus, int ctx,
struct context_entry *context, bool new_ext)
@@ -93,6 +125,7 @@ static void ctx_tbl_entry_show(struct seq_file *m, void
*unused,
context, new_ext);
}
}
+ pasid_tbl_entry_show(m, unused, iommu);
out:
spin_unlock_irqrestore(>lock, flags);
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index f6697e5..2003f23 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -28,14 +28,6 @@
static irqreturn_t prq_event_thread(int irq, void *d);
-struct pasid_entry {
- u64 val;
-};
-
-struct pasid_state_entry {
- u64 val;
-};
-
int intel_svm_alloc_pasid_tables(struct intel_iommu *iommu)
{
struct page *pages;
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index 733eaf9..a8abad6 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -18,6 +18,14 @@
struct device;
+struct pasid_entry {
+ u64 val;
+};
+
+struct pasid_state_entry {
+ u64 val;
+};
+
struct svm_dev_ops {
void (*fault_cb)(struct device *dev, int pasid, u64 address,
u32 private, int rwxp, int response);
--
2.7.4
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[PATCH 0/6] Intel IOMMU debugfs support
Hi all, This series aims to add debugfs support for Intel IOMMU. It exposes IOMMU registers, internal context and dumps individual table entries to help debug Intel IOMMUs. The first patch does the ground work for the following patches by creating a new Kconfig option - INTEL_IOMMU_DEBUG. It also reorganizes some Intel IOMMU data structures. The next five patches add debugfs support for IOMMU context internals, extended context, register contents, PASID internals, and Interrupt remapping in that order. The information can be accessed in sysfs at '/sys/kernel/debug/intel_iommu/'. Regards, Sohil Gayatri Kammela (5): iommu/vt-d: Add debugfs support for Intel IOMMU internals iommu/vt-d: Add Intel IOMMU debugfs to show context internals iommu/vt-d: Add Intel IOMMU debugfs to show extended context internals iommu/vt-d: Add debugfs extension to show register contents iommu/vt-d: Add debugfs extension to show Pasid table contents Sohil Mehta (1): iommu/vt-d: Debugfs support for Intel IOMMU Interrupt remapping drivers/iommu/Kconfig | 10 + drivers/iommu/Makefile| 1 + drivers/iommu/intel-iommu-debug.c | 429 ++ drivers/iommu/intel-iommu.c | 35 +--- drivers/iommu/intel-svm.c | 8 - include/linux/intel-iommu.h | 32 +++ include/linux/intel-svm.h | 10 +- 7 files changed, 488 insertions(+), 37 deletions(-) create mode 100644 drivers/iommu/intel-iommu-debug.c -- 2.7.4 ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
