Re: [RFC PATCH v5 5/7] iommu/vt-d: Fixup delivery mode of the HPET hardlockup interrupt

2021-05-04 Thread Thomas Gleixner
On Tue, May 04 2021 at 12:10, Ricardo Neri wrote: > In x86 there is not an IRQF_NMI flag that can be used to indicate the There exists no IRQF_NMI flag at all. No architecture provides that. > delivery mode when requesting an interrupt (via request_irq()). Thus, > there is no way for the

Re: [Patch V2 08/13] genirq: Set auxiliary data for an interrupt

2021-03-26 Thread Thomas Gleixner
On Fri, Mar 26 2021 at 10:32, Marc Zyngier wrote: > On Thu, 25 Mar 2021 18:59:48 +, > Thomas Gleixner wrote: >> Though that leaves the question of the data type for 'val'. While u64 is >> probably good enough for most stuff, anything which needs more than that >> is

Re: [Patch V2 12/13] irqchip: Add IMS (Interrupt Message Store) driver

2021-03-25 Thread Thomas Gleixner
On Thu, Mar 25 2021 at 17:43, Marc Zyngier wrote: > On Fri, 26 Feb 2021 20:11:16 +, > Megha Dey wrote: >> + >> +#include >> + >> +#ifdef CONFIG_IMS_MSI_ARRAY > > Given that this covers the whole driver, what is this #defined used > for? You might as well make the driver depend on this config

Re: [Patch V2 08/13] genirq: Set auxiliary data for an interrupt

2021-03-25 Thread Thomas Gleixner
On Thu, Mar 25 2021 at 17:23, Marc Zyngier wrote: >> +/** >> + * irq_set_auxdata - Set auxiliary data >> + * @irq:Interrupt to update >> + * @which: Selector which data to update >> + * @auxval: Auxiliary data value >> + * >> + * Function to update auxiliary data for an interrupt, e.g. to

Re: [Patch V2 07/13] irqdomain/msi: Provide msi_alloc/free_store() callbacks

2021-03-25 Thread Thomas Gleixner
On Thu, Mar 25 2021 at 17:08, Marc Zyngier wrote: > Megha Dey wrote: >> @@ -434,6 +434,12 @@ int __msi_domain_alloc_irqs(struct irq_domain *domain, >> struct device *dev, >> if (ret) >> return ret; >> >> +if (ops->msi_alloc_store) { >> +ret =

Re: iommu/vt-d: Cure VF irqdomain hickup

2020-11-16 Thread Thomas Gleixner
Geert, On Mon, Nov 16 2020 at 10:47, Geert Uytterhoeven wrote: > On Thu, Nov 12, 2020 at 8:16 PM Thomas Gleixner wrote: >> The recent changes to store the MSI irqdomain pointer in struct device >> missed that Intel DMAR does not register virtual function devices. Due to >>

Re: iommu/vt-d: Cure VF irqdomain hickup

2020-11-13 Thread Thomas Gleixner
On Fri, Nov 13 2020 at 09:19, Marc Zyngier wrote: > On 2020-11-12 21:34, Thomas Gleixner wrote: >> That would allow to add a irq_find_matching_fwspec() based lookup to >> pci_msi_get_device_domain(). > > Just so that I understand the issue: is the core of the problem that >

Re: iommu/vt-d: Cure VF irqdomain hickup

2020-11-12 Thread Thomas Gleixner
On Thu, Nov 12 2020 at 20:15, Thomas Gleixner wrote: > The recent changes to store the MSI irqdomain pointer in struct device > missed that Intel DMAR does not register virtual function devices. Due to > that a VF device gets the plain PCI-MSI domain assigned and then issues > compat

iommu/vt-d: Cure VF irqdomain hickup

2020-11-12 Thread Thomas Gleixner
mm/vt-d: Store irq domain in struct device") Reported-by: Jason Gunthorpe Signed-off-by: Thomas Gleixner --- drivers/iommu/intel/dmar.c | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) --- a/drivers/iommu/intel/dmar.c +++ b/drivers/iommu/intel/dmar.c @@ -333

Re: REGRESSION: Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-11-12 Thread Thomas Gleixner
On Thu, Nov 12 2020 at 15:15, Thomas Gleixner wrote: > On Thu, Nov 12 2020 at 08:55, Jason Gunthorpe wrote: >> On Wed, Aug 26, 2020 at 01:16:28PM +0200, Thomas Gleixner wrote: >> They were unable to bisect further into the series because some of the >> interior commits don't

Re: REGRESSION: Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-11-12 Thread Thomas Gleixner
Jason, (trimmed CC list a bit) On Thu, Nov 12 2020 at 08:55, Jason Gunthorpe wrote: > On Wed, Aug 26, 2020 at 01:16:28PM +0200, Thomas Gleixner wrote: > They were unable to bisect further into the series because some of the > interior commits don't boot :( > > When we try to load

Re: [PATCH] [v2] x86: apic: avoid -Wshadow warning in header

2020-10-29 Thread Thomas Gleixner
On Thu, Oct 29 2020 at 17:59, Paolo Bonzini wrote: > On 29/10/20 17:56, Arvind Sankar wrote: >>> For those two just add: >>> struct apic *apic = x86_system_apic; >>> before all the assignments. >>> Less churn and much better code. >>> >> Why would it be better code? >> > > I think he means

Re: [PATCH] [v2] x86: apic: avoid -Wshadow warning in header

2020-10-29 Thread Thomas Gleixner
Arnd, On Thu, Oct 29 2020 at 10:51, Arnd Bergmann wrote: > On Thu, Oct 29, 2020 at 8:04 AM Paolo Bonzini wrote: >> On 28/10/20 22:20, Arnd Bergmann wrote: >> > Avoid this by renaming the global 'apic' variable to the more descriptive >> > 'x86_system_apic'. It was originally called 'genapic',

Re: [PATCH v3 15/35] PCI: vmd: Use msi_msg shadow structs

2020-10-28 Thread Thomas Gleixner
On Wed, Oct 28 2020 at 13:49, Kees Cook wrote: > On Sat, Oct 24, 2020 at 10:35:15PM +0100, David Woodhouse wrote: >> +memset(, 0, sizeof(*msg); > > This should be: > > + memset(msg, 0, sizeof(*msg); memset(msg, 0, sizeof(*msg)); Then it compiles _and_ is correct :)

Re: [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs()

2020-10-08 Thread Thomas Gleixner
On Thu, Oct 08 2020 at 12:10, David Woodhouse wrote: > On Thu, 2020-10-08 at 11:34 +0200, Thomas Gleixner wrote: >> The overall conclusion for this is: >> >> 1) X2APIC support on bare metal w/o irq remapping is not going to >> happen unless you: >> >&g

Re: [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs()

2020-10-08 Thread Thomas Gleixner
On Thu, Oct 08 2020 at 08:21, David Woodhouse wrote: > On Wed, 2020-10-07 at 17:57 +0200, Thomas Gleixner wrote: >> Multiqueue devices want to have at max 1 queue per CPU or if the device >> has less queues than CPUs they want the queues to have a fixed >> associa

Re: [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs()

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 17:11, David Woodhouse wrote: > On 7 October 2020 16:57:36 BST, Thomas Gleixner wrote: >>There is not lot's of nastiness. > > OK, but I think we do have to cope with the fact that the limit is > dynamic, and a CPU might be added which widens the mask

Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 16:46, David Woodhouse wrote: > The PCI MSI domain, HPET, and even the IOAPIC are just the things out > there on the bus which might perform those physical address cycles. And > yes, as you say they're just a message store sending exactly the > message that was composed for

Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 15:23, David Woodhouse wrote: > On Wed, 2020-10-07 at 16:05 +0200, Thomas Gleixner wrote: >> On Wed, Oct 07 2020 at 14:08, David Woodhouse wrote: >> > On 7 October 2020 13:59:00 BST, Thomas Gleixner wrote: >> > > On Wed, Oct 07 2020 a

Re: [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs()

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 15:10, David Woodhouse wrote: > On Wed, 2020-10-07 at 15:37 +0200, Thomas Gleixner wrote: >> What is preventing you to change the function signature? But handing >> down irqdomain here is not cutting it. The right thing to do is to >> replace 'str

Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 16:05, David Woodhouse wrote: > On Wed, 2020-10-07 at 16:05 +0200, Thomas Gleixner wrote: >> The top most MSI irq chip does not even have a compose function, neither >> for the remap nor for the vector case. The composition is done by the >> parent domai

Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 14:08, David Woodhouse wrote: > On 7 October 2020 13:59:00 BST, Thomas Gleixner wrote: >>On Wed, Oct 07 2020 at 08:48, David Woodhouse wrote: >>> To fix *that* case, we really do need the whole series giving us per- >>> domain restricted affini

Re: [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs()

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 08:19, David Woodhouse wrote: > On Tue, 2020-10-06 at 23:26 +0200, Thomas Gleixner wrote: >> On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: >> > From: David Woodhouse >> > >> > This is the maximum possible set of CPUs which c

Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR

2020-10-07 Thread Thomas Gleixner
On Wed, Oct 07 2020 at 08:48, David Woodhouse wrote: > On Tue, 2020-10-06 at 23:54 +0200, Thomas Gleixner wrote: >> On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > This is the case I called out in the cover letter: > > This patch series implements a per-domain &quo

Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR

2020-10-06 Thread Thomas Gleixner
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > From: David Woodhouse > > When interrupt remapping isn't enabled, only the first 255 CPUs can No, only CPUs with an APICid < 255 > receive external interrupts. Set the appropriate max affinity for > the IOAPIC and MSI IRQ domains

Re: [PATCH 09/13] x86/irq: Add x86_non_ir_cpumask

2020-10-06 Thread Thomas Gleixner
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > From: David Woodhouse > > This is the mask of CPUs to which IRQs can be delivered without interrupt > remapping. > > +/* Mask of CPUs which can be targeted by non-remapped interrupts. */ > +cpumask_t x86_non_ir_cpumask = { CPU_BITS_ALL };

Re: [PATCH 08/13] genirq: Add irq_domain_set_affinity()

2020-10-06 Thread Thomas Gleixner
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > +/** > + * irq_domain_set_affinity - Set maximum CPU affinity for domain > + * @parent: Domain to set affinity for > + * @affinity:Pointer to cpumask, consumed by domain > + * > + * Sets the maximal set of CPUs to which interrupts in

Re: [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs()

2020-10-06 Thread Thomas Gleixner
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > From: David Woodhouse > > This is the maximum possible set of CPUs which can be used. Use it > to calculate the default affinity requested from __irq_alloc_descs() > by first attempting to find the intersection with irq_default_affinity, > or

Re: [PATCH 06/13] genirq: Add default_affinity argument to __irq_alloc_descs()

2020-10-06 Thread Thomas Gleixner
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > From: David Woodhouse > It already takes an array of affinities for each individual irq being > allocated but that's awkward to allocate and populate in the case > where they're all the same and inherited from the irqdomain, so pass > the

Re: [PATCH 05/13] genirq: Prepare for default affinity to be passed to __irq_alloc_descs()

2020-10-06 Thread Thomas Gleixner
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > > #else /* CONFIG_SMP */ > > +#define irq_default_affinity (NULL) ... > static int alloc_descs(unsigned int start, unsigned int cnt, int node, > const struct irq_affinity_desc *affinity, > +

Re: [PATCH 02/13] x86/msi: Only use high bits of MSI address for DMAR unit

2020-10-06 Thread Thomas Gleixner
On Mon, Oct 05 2020 at 16:28, David Woodhouse wrote: > -static void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg) > +static void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, > int dmar) bool dmar? > +/* > + * The Intel IOMMU (ab)uses the high bits of the MSI

Re: Boot crash due to "x86/msi: Consolidate MSI allocation"

2020-10-01 Thread Thomas Gleixner
Yan, On Thu, Oct 01 2020 at 09:39, Zi Yan wrote: > On 1 Oct 2020, at 4:22, Thomas Gleixner wrote: >> Can you please test: >> >>git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/irq >> >> which contains fixes and if it still crashes provide the

Re: Boot crash due to "x86/msi: Consolidate MSI allocation"

2020-10-01 Thread Thomas Gleixner
Yan, On Wed, Sep 30 2020 at 21:29, Zi Yan wrote: > I am running linux-next on my Dell R630 and the system crashed at boot > time. I bisected linux-next and got to your commit: > > x86/msi: Consolidate MSI allocation > > The crash log is below and my .config is attached. > > [ 11.840905]

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-09-30 Thread Thomas Gleixner
Megha, On Wed, Sep 30 2020 at 10:25, Megha Dey wrote: > On 9/30/2020 8:20 AM, Thomas Gleixner wrote: >>>> Your IMS patches? Why do you need something special again? > > By IMS patches, I meant your IMS driver patch that was updated (as it > was untested, it had some compi

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-09-30 Thread Thomas Gleixner
On Wed, Sep 30 2020 at 08:43, Jason Gunthorpe wrote: > On Wed, Sep 30, 2020 at 08:41:48AM +0200, Thomas Gleixner wrote: >> On Tue, Sep 29 2020 at 16:03, Megha Dey wrote: >> > On 8/26/2020 4:16 AM, Thomas Gleixner wrote: >> >> #9is obviously just f

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-09-30 Thread Thomas Gleixner
On Tue, Sep 29 2020 at 16:03, Megha Dey wrote: > On 8/26/2020 4:16 AM, Thomas Gleixner wrote: >> #9 is obviously just for the folks interested in IMS >> > > I see that the tip tree (as of 9/29) has most of these patches but > notice that the DEV_MSI related patches >

Re: [patch V2 34/46] PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable

2020-09-28 Thread Thomas Gleixner
On Sat, Sep 26 2020 at 14:38, Vasily Gorbik wrote: > On Fri, Sep 25, 2020 at 09:54:52AM -0400, Qian Cai wrote: > Yes, as well as on mips and sparc which also don't FORCE_PCI. > This seems to work for s390: > > diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig > index b0b7acf07eb8..41136fbe909b

[PATCH] x86/apic/msi: Unbreak DMAR and HPET MSI

2020-09-27 Thread Thomas Gleixner
: 9006c133a422 ("x86/msi: Use generic MSI domain ops") Reported-by: Qian Cai Reported-by: Peter Zijlstra Signed-off-by: Thomas Gleixner --- arch/x86/kernel/apic/msi.c |2 ++ 1 file changed, 2 insertions(+) --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -30

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-09-25 Thread Thomas Gleixner
On Fri, Sep 25 2020 at 17:49, Peter Zijlstra wrote: > Here it looks like this: > > [1.830276] BUG: kernel NULL pointer dereference, address: > [1.838043] #PF: supervisor instruction fetch in kernel mode > [1.844357] #PF: error_code(0x0010) - not-present page > [

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-09-03 Thread Thomas Gleixner
Ashok, On Thu, Sep 03 2020 at 09:35, Ashok Raj wrote: > On Wed, Aug 26, 2020 at 01:16:28PM +0200, Thomas Gleixner wrote: >> This is the second version of providing a base to support device MSI (non >> PCI based) and on top of that support for IMS (Interrupt Message Storm) &g

Re: [patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-08-31 Thread Thomas Gleixner
On Mon, Aug 31 2020 at 08:51, Lu Baolu wrote: > On 8/26/20 7:16 PM, Thomas Gleixner wrote: >> This is the second version of providing a base to support device MSI (non >> PCI based) and on top of that support for IMS (Interrupt Message Storm) >> based devices in a halfways arc

Re: [patch V2 43/46] genirq/msi: Provide and use msi_domain_set_default_info_flags()

2020-08-28 Thread Thomas Gleixner
On Thu, Aug 27 2020 at 09:17, Marc Zyngier wrote: > On 2020-08-26 12:17, Thomas Gleixner wrote: >> #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN >> +void msi_domain_set_default_info_flags(struct msi_domain_info *info) >> +{ >> +/* Required so that a device latches a v

Re: [patch V2 34/46] PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable

2020-08-28 Thread Thomas Gleixner
On Thu, Aug 27 2020 at 13:20, Bjorn Helgaas wrote: > On Wed, Aug 26, 2020 at 01:17:02PM +0200, Thomas Gleixner wrote: >> Make the architectures and drivers which rely on them select them in Kconfig >> and if not selected replace them by stub functions which emit a warning and >

Re: [patch V2 34/46] PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 22:14, Marc Zyngier wrote: > On Wed, 26 Aug 2020 12:17:02 +0100, > Thomas Gleixner wrote: >> @@ -103,6 +105,7 @@ config PCIE_XILINX_CPM >> bool "Xilinx Versal CPM host bridge support" >> depends on ARCH_ZYNQMP || COMPILE_T

Re: [patch V2 04/46] genirq/chip: Use the first chip in irq_chip_compose_msi_msg()

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 20:50, Marc Zyngier wrote: > On Wed, 26 Aug 2020 12:16:32 +0100, > Thomas Gleixner wrote: >> --- >> V2: New patch. Note, that this might break other stuff which relies on the >> current behaviour, but the hierarchy composition of DT based chi

Re: [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 20:32, Thomas Gleixner wrote: > On Wed, Aug 26 2020 at 09:50, Megha Dey wrote: >>> @@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll >>> static irq_hw_number_t dmar_msi_get_hwirq(struct

Re: [patch V2 19/46] x86/msi: Use generic MSI domain ops

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 21:21, Marc Zyngier wrote: > On Wed, 26 Aug 2020 12:16:47 +0100, > Thomas Gleixner wrote: >> -void pci_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc) >> -{ >> -arg->desc = desc; >> -arg->hw

Re: [patch V2 29/46] irqdomain/msi: Allow to override msi_domain_alloc/free_irqs()

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 20:06, Marc Zyngier wrote: > On Wed, 26 Aug 2020 12:16:57 +0100, > Thomas Gleixner wrote: >> /** >> - * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain >> associated tp @dev >> - * @domain: The dom

Re: [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 09:50, Megha Dey wrote: >> @@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll >> static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info, >>msi_alloc_info_t *arg) >> { >> -return arg->dmar_id; >> +

Re: [patch V2 34/46] PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 13:17, Thomas Gleixner wrote: > + * If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by > + * stubs with warnings. > */ > +#ifdef CONFIG_PCI_MSI_DISABLE_ARCH_FALLBACKS Groan, I obviously failed to pull that back from the test box w

[patch V2 45/46] irqdomain/msi: Provide msi_alloc/free_store() callbacks

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner For devices which don't have a standard storage for MSI messages like the upcoming IMS (Interrupt Message Storm) it's required to allocate storage space before allocating interrupts and after freeing them. This could be achieved with the existing callbacks, but that would

[patch V2 41/46] platform-msi: Provide default irq_chip:: Ack

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner For the upcoming device MSI support it's required to have a default irq_chip::ack implementation (irq_chip_ack_parent) so the drivers do not need to care. Signed-off-by: Thomas Gleixner --- drivers/base/platform-msi.c |2 ++ 1 file changed, 2 insertions

[patch V2 42/46] genirq/proc: Take buslock on affinity write

2020-08-26 Thread Thomas Gleixner
. Change the locking in irq_set_affinity() to bus_lock/unlock to help with that. There are a few other callers than the proc interface, but none of them is affected by this change as none of them affects an irq chip with bus lock support. Signed-off-by: Thomas Gleixner --- V2: New patch

[patch V2 40/46] x86/msi: Rename and rework pci_msi_prepare() to cover non-PCI MSI

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Rename it to x86_msi_prepare() and handle the allocation type setup depending on the device type. Add a new arch_msi_prepare define which will be utilized by the upcoming device MSI support. Define it to NULL if not provided by an architecture in the generic MSI header

[patch V2 44/46] platform-msi: Add device MSI infrastructure

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Add device specific MSI domain infrastructure for devices which have their own resource management and interrupt chip. These devices are not related to PCI and contrary to platform MSI they do not share a common resource and interrupt chip. They provide their own domain

[patch V2 43/46] genirq/msi: Provide and use msi_domain_set_default_info_flags()

2020-08-26 Thread Thomas Gleixner
MSI interrupts have some common flags which should be set not only for PCI/MSI interrupts. Move the PCI/MSI flag setting into a common function so it can be reused. Signed-off-by: Thomas Gleixner --- V2: New patch --- drivers/pci/msi.c |7 +-- include/linux/msi.h |1 + kernel/irq

[patch V2 46/46] irqchip: Add IMS (Interrupt Message Storm) driver - NOT FOR MERGING

2020-08-26 Thread Thomas Gleixner
this deeply. Signed-off-by: Thomas Gleixner --- V2: Reworked to handle both devmem arrays and queue based storage. --- drivers/irqchip/Kconfig | 19 + drivers/irqchip/Makefile|1 drivers/irqchip/irq-ims-msi.c | 343 include

[patch V2 23/46] irqdomain/msi: Provide DOMAIN_BUS_VMD_MSI

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner PCI devices behind a VMD bus are not subject to interrupt remapping, but the irq domain for VMD MSI cannot be distinguished from a regular PCI/MSI irq domain. Add a new domain bus token and allow it in the bus token check in msi_check_reservation_mode() to keep

[patch V2 28/46] x86/xen: Consolidate XEN-MSI init

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner X86 cannot store the irq domain pointer in struct device without breaking XEN because the irq domain pointer takes precedence over arch_*_msi_irqs() fallbacks. To achieve this XEN MSI interrupt management needs to be wrapped into an irq domain. Move the x86_msi ops setup

[patch V2 37/46] iommu/vt-d: Remove domain search for PCI/MSI[X]

2020-08-26 Thread Thomas Gleixner
Now that the domain can be retrieved through device::msi_domain the domain search for PCI_MSI[X] is not longer required. Remove it. Signed-off-by: Thomas Gleixner --- V2: New patch --- drivers/iommu/intel/irq_remapping.c |3 --- 1 file changed, 3 deletions(-) --- a/drivers/iommu/intel

[patch V2 38/46] iommu/amd: Remove domain search for PCI/MSI

2020-08-26 Thread Thomas Gleixner
Now that the domain can be retrieved through device::msi_domain the domain search for PCI_MSI[X] is not longer required. Remove it. Signed-off-by: Thomas Gleixner --- V2: New patch --- drivers/iommu/amd/iommu.c |3 --- 1 file changed, 3 deletions(-) --- a/drivers/iommu/amd/iommu.c +++ b

[patch V2 32/46] iommm/amd: Store irq domain in struct device

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner As the next step to make X86 utilize the direct MSI irq domain operations store the irq domain pointer in the device struct when a device is probed. It only overrides the irqdomain of devices which are handled by a regular PCI/MSI irq domain which protects PCI devices

[patch V2 19/46] x86/msi: Use generic MSI domain ops

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner pci_msi_get_hwirq() and pci_msi_set_desc are not longer special. Enable the generic MSI domain ops in the core and PCI MSI code unconditionally and get rid of the x86 specific implementations in the X86 MSI code and in the hyperv PCI driver. Signed-off-by: Thomas Gleixner

[patch V2 24/46] PCI: vmd: Mark VMD irqdomain with DOMAIN_BUS_VMD_MSI

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Devices on the VMD bus use their own MSI irq domain, but it is not distinguishable from regular PCI/MSI irq domains. This is required to exclude VMD devices from getting the irq domain pointer set by interrupt remapping. Override the default bus token. Signed-off

[patch V2 34/46] PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner The arch_.*_msi_irq[s] fallbacks are compiled in whether an architecture requires them or not. Architectures which are fully utilizing hierarchical irq domains should never call into that code. It's not only architectures which depend on that by implementing one or more

[patch V2 12/46] x86/irq: Prepare consolidation of irq_alloc_info

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner struct irq_alloc_info is a horrible zoo of unnamed structs in a union. Many of the struct fields can be generic and don't have to be type specific like hpet_id, ioapic_id... Provide a generic set of members to prepare for the consolidation. The goal is to make

[patch V2 25/46] PCI/MSI: Provide pci_dev_has_special_msi_domain() helper

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Provide a helper function to check whether a PCI device is handled by a non-standard PCI/MSI domain. This will be used to exclude such devices which hang of a special bus, e.g. VMD, to be excluded from the irq domain override in irq remapping. Signed-off-by: Thomas

[patch V2 30/46] x86/xen: Wrap XEN MSI management into irqdomain

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner To allow utilizing the irq domain pointer in struct device it is necessary to make XEN/MSI irq domain compatible. While the right solution would be to truly convert XEN to irq domains, this is an exercise which is not possible for mere mortals with limited XENology

[patch V2 09/46] iommu/vt-d: Consolidate irq domain getter

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner The irq domain request mode is now indicated in irq_alloc_info::type. Consolidate the two getter functions into one. Signed-off-by: Thomas Gleixner --- drivers/iommu/intel/irq_remapping.c | 67 1 file changed, 24 insertions(+), 43

[patch V2 17/46] PCI/MSI: Rework pci_msi_domain_calc_hwirq()

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Retrieve the PCI device from the msi descriptor instead of doing so at the call sites. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- V2: Address Bjorns comments (subject prefix, pdev/dev) --- arch/x86/kernel/apic/msi.c |2 +- drivers/pci/msi.c

[patch V2 26/46] x86/xen: Make xen_msi_init() static and rename it to xen_hvm_msi_init()

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner The only user is in the same file and the name is too generic because this function is only ever used for HVM domains. Signed-off-by: Thomas Gleixner Reviewed-by: Juergen Gross --- arch/x86/pci/xen.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions

[patch V2 21/46] x86/pci: Reducde #ifdeffery in PCI init code

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Adding a function call before the first #ifdef in arch_pci_init() triggers a 'mixed declarations and code' warning if PCI_DIRECT is enabled. Use stub functions and move the #ifdeffery to the header file where it is not in the way. Signed-off-by: Thomas Gleixner

[patch V2 31/46] iommm/vt-d: Store irq domain in struct device

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner As a first step to make X86 utilize the direct MSI irq domain operations store the irq domain pointer in the device struct when a device is probed. This is done from dmar_pci_bus_add_dev() because it has to work even when DMA remapping is disabled. It only overrides

[patch V2 08/46] x86/irq: Add allocation type for parent domain retrieval

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner irq_remapping_ir_irq_domain() is used to retrieve the remapping parent domain for an allocation type. irq_remapping_irq_domain() is for retrieving the actual device domain for allocating interrupts for a device. The two functions are similar and can be unified by using

[patch V2 29/46] irqdomain/msi: Allow to override msi_domain_alloc/free_irqs()

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner To support MSI irq domains which do not fit at all into the regular MSI irqdomain scheme, like the XEN MSI interrupt management for PV/HVM/DOM0, it's necessary to allow to override the alloc/free implementation. This is a preperatory step to switch X86 away from arch_

[patch V2 16/46] x86/irq: Consolidate UV domain allocation

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Move the UV specific fields into their own struct for readability sake. Get rid of the #ifdeffery as it does not matter at all whether the alloc info is a couple of bytes longer or not. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/hw_irq.h | 21

[patch V2 33/46] x86/pci: Set default irq domain in pcibios_add_device()

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Now that interrupt remapping sets the irqdomain pointer when a PCI device is added it's possible to store the default irq domain in the device struct in pcibios_add_device(). If the bus to which a device is connected has an irq domain associated then this domain is used

[patch V2 07/46] x86/irq: Rename X86_IRQ_ALLOC_TYPE_MSI* to reflect PCI dependency

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/hw_irq.h |4 ++-- arch/x86/kernel/apic/msi.c |6 +++--- drivers/iommu/amd/iommu.c | 24 drivers/iommu/intel/irq_remapping.c | 18

[patch V2 13/46] x86/msi: Consolidate HPET allocation

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner None of the magic HPET fields are required in any way. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/hw_irq.h |7 --- arch/x86/kernel/apic/msi.c | 14 +++--- drivers/iommu/amd/iommu.c |2 +- drivers/iommu/intel

[patch V2 35/46] x86/irq: Cleanup the arch_*_msi_irqs() leftovers

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Get rid of all the gunk and remove the 'select PCI_MSI_ARCH_FALLBACK' from the x86 Kconfig so the weak functions in the PCI core are replaced by stubs which emit a warning, which ensures that any fail to set the irq domain pointer results in a warning when the device

[patch V2 20/46] x86/irq: Move apic_post_init() invocation to one place

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner No point to call it from both 32bit and 64bit implementations of default_setup_apic_routing(). Move it to the caller. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/apic/apic.c |3 +++ arch/x86/kernel/apic/probe_32.c |3 --- arch/x86/kernel/apic/probe_64

[patch V2 10/46] iommu/amd: Consolidate irq domain getter

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner The irq domain request mode is now indicated in irq_alloc_info::type. Consolidate the two getter functions into one. Signed-off-by: Thomas Gleixner --- drivers/iommu/amd/iommu.c | 65 ++ 1 file changed, 21 insertions(+), 44

[patch V2 39/46] x86/irq: Add DEV_MSI allocation type

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner For the upcoming device MSI support a new allocation type is required. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/hw_irq.h |1 + 1 file changed, 1 insertion(+) --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h @@ -40,6 +40,7

[patch V2 36/46] x86/irq: Make most MSI ops XEN private

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Nothing except XEN uses the setup/teardown ops. Hide them there. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/x86_init.h |2 -- arch/x86/pci/xen.c | 21 ++--- 2 files changed, 14 insertions(+), 9 deletions(-) --- a/arch/x86

[patch V2 14/46] x86/ioapic: Consolidate IOAPIC allocation

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Move the IOAPIC specific fields into their own struct and reuse the common devid. Get rid of the #ifdeffery as it does not matter at all whether the alloc info is a couple of bytes longer or not. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/hw_irq.h

[patch V2 27/46] x86/xen: Rework MSI teardown

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner X86 cannot store the irq domain pointer in struct device without breaking XEN because the irq domain pointer takes precedence over arch_*_msi_irqs() fallbacks. XENs MSI teardown relies on default_teardown_msi_irqs() which invokes arch_teardown_msi_irq

[patch V2 22/46] x86/irq: Initialize PCI/MSI domain at PCI init time

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner No point in initializing the default PCI/MSI interrupt domain early and no point to create it when XEN PV/HVM/DOM0 are active. Move the initialization to pci_arch_init() and convert it to init ops so that XEN can override it as XEN has it's own PCI/MSI management. The XEN

[patch V2 18/46] x86/msi: Consolidate MSI allocation

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Convert the interrupt remap drivers to retrieve the pci device from the msi descriptor and use info::hwirq. This is the first step to prepare x86 for using the generic MSI domain ops. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/hw_irq.h |8

[patch V2 02/46] x86/init: Remove unused init ops

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Some past platform removal forgot to get rid of this unused ballast. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 10 -- arch/x86/include/asm/x86_init.h | 10 -- arch/x86/kernel/mpparse.c | 26

[patch V2 05/46] x86/msi: Move compose message callback where it belongs

2020-08-26 Thread Thomas Gleixner
the direct delivery chip do the same and move the composition of the direct delivery MSI message to the vector domain irq chip. This prepares for the upcoming device MSI support to avoid having architecture specific knowledge in the device MSI domain irq chips. Signed-off-by: Thomas Gleixner --- V2: New

[patch V2 06/46] x86/msi: Remove pointless vcpu_affinity callback

2020-08-26 Thread Thomas Gleixner
Setting the irq_set_vcpu_affinity() callback to irq_chip_set_vcpu_affinity_parent() is a pointless exercise because the function which utilizes it searchs the domain hierarchy to find a parent domain which has such a callback. Remove the useless indirection. Signed-off-by: Thomas Gleixner

[patch V2 00/46] x86, PCI, XEN, genirq ...: Prepare for device MSI

2020-08-26 Thread Thomas Gleixner
This is the second version of providing a base to support device MSI (non PCI based) and on top of that support for IMS (Interrupt Message Storm) based devices in a halfways architecture independent way. The first version can be found here:

[patch V2 11/46] iommu/irq_remapping: Consolidate irq domain lookup

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Now that the iommu implementations handle the X86_*_GET_PARENT_DOMAIN types, consolidate the two getter functions. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/irq_remapping.h |8 arch/x86/kernel/apic/io_apic.c |2 +- arch/x86/kernel

[patch V2 04/46] genirq/chip: Use the first chip in irq_chip_compose_msi_msg()

2020-08-26 Thread Thomas Gleixner
domain. Signed-off-by: Thomas Gleixner --- V2: New patch. Note, that this might break other stuff which relies on the current behaviour, but the hierarchy composition of DT based chips is really hard to follow. --- arch/x86/kernel/apic/msi.c |7 +-- kernel/irq/chip.c | 12

[patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner None of the DMAR specific fields are required. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/hw_irq.h |6 -- arch/x86/kernel/apic/msi.c| 10 +- 2 files changed, 5 insertions(+), 11 deletions(-) --- a/arch/x86/include/asm/hw_irq.h +++ b

[patch V2 01/46] iommu/amd: Prevent NULL pointer dereference

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner Dereferencing irq_data before checking it for NULL is suboptimal. Signed-off-by: Thomas Gleixner --- drivers/iommu/amd/iommu.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -3717,8

[patch V2 03/46] PCI: vmd: Dont abuse vector irqomain as parent

2020-08-26 Thread Thomas Gleixner
an interrupt vector in the vector domain which is never used. The domain is self contained and has no parent dependencies, so just hand in NULL for the parent and be done with it. Signed-off-by: Thomas Gleixner Cc: Jonathan Derrick Cc: linux-...@vger.kernel.org --- V2: New patch. --- drivers/pci

Re: [patch RFC 10/38] x86/ioapic: Consolidate IOAPIC allocation

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 16:40, Boqun Feng wrote: > I hit a compiler error while I was trying to compile this patchset: > > arch/x86/kernel/devicetree.c: In function ‘dt_irqdomain_alloc’: > arch/x86/kernel/devicetree.c:232:6: error: ‘struct irq_alloc_info’ has no > member named ‘ioapic_id’; did you

Re: [patch RFC 30/38] PCI/MSI: Allow to disable arch fallbacks

2020-08-25 Thread Thomas Gleixner
On Tue, Aug 25 2020 at 23:40, Thomas Gleixner wrote: > On Tue, Aug 25 2020 at 16:35, Bjorn Helgaas wrote: >> On Tue, Aug 25, 2020 at 11:28:30PM +0200, Thomas Gleixner wrote: >>> >>> Or did you just mean that those architectures should select >>> CONFIG_I_

Re: [patch RFC 30/38] PCI/MSI: Allow to disable arch fallbacks

2020-08-25 Thread Thomas Gleixner
On Tue, Aug 25 2020 at 16:35, Bjorn Helgaas wrote: > On Tue, Aug 25, 2020 at 11:28:30PM +0200, Thomas Gleixner wrote: >> >> Or did you just mean that those architectures should select >> CONFIG_I_WANT_THE CRUFT instead of opting out on the fully irq domain >> based ones

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