On Wed, Jul 22, 2020 at 12:34:57PM +, Sironi, Filippo wrote:
> On Wed, 2020-07-22 at 14:19 +0200, j...@8bytes.org wrote:
> I wouldn't be surprised if a PCIe device raises a PCIe SERR if it is
> asked to do DMA beyond its abilities.
Yeah, but that would also make it impossible to safely assign
On Wed, 2020-07-22 at 14:19 +0200, j...@8bytes.org wrote:
>
> On Fri, Jul 17, 2020 at 03:15:43PM +, Sironi, Filippo wrote:
> > I don't believe that we want to trust a userspace driver here, this
> > may
> > result in hosts becoming unstable because devices are asked to do
> > things
> > they a
On Fri, Jul 17, 2020 at 03:15:43PM +, Sironi, Filippo wrote:
> I don't believe that we want to trust a userspace driver here, this may
> result in hosts becoming unstable because devices are asked to do things
> they aren't meant to do (e.g., DMA beyond 48 bits).
How is the hosts stability aff
On Fri, 2020-07-17 at 15:36 +0100, Robin Murphy wrote:
> On 2020-07-17 14:22, Sironi, Filippo wrote:
> > On Fri, 2020-07-17 at 10:47 +0100, Robin Murphy wrote:
> > >
> > > On 2020-07-17 10:20, Sebastian Ott via iommu wrote:
> > > > Hello Joerg,
> > > >
> > > > On 2020-07-10 14:31, Joerg Roedel wr
On 2020-07-17 14:22, Sironi, Filippo wrote:
On Fri, 2020-07-17 at 10:47 +0100, Robin Murphy wrote:
On 2020-07-17 10:20, Sebastian Ott via iommu wrote:
Hello Joerg,
On 2020-07-10 14:31, Joerg Roedel wrote:
On Wed, Jul 01, 2020 at 12:46:31AM +0200, Sebastian Ott wrote:
The IVRS ACPI table spe
On Fri, 2020-07-17 at 10:47 +0100, Robin Murphy wrote:
>
> On 2020-07-17 10:20, Sebastian Ott via iommu wrote:
> > Hello Joerg,
> >
> > On 2020-07-10 14:31, Joerg Roedel wrote:
> > > On Wed, Jul 01, 2020 at 12:46:31AM +0200, Sebastian Ott wrote:
> > > > The IVRS ACPI table specifies maximum addre
On 2020-07-17 10:20, Sebastian Ott via iommu wrote:
Hello Joerg,
On 2020-07-10 14:31, Joerg Roedel wrote:
On Wed, Jul 01, 2020 at 12:46:31AM +0200, Sebastian Ott wrote:
The IVRS ACPI table specifies maximum address sizes for I/O virtual
addresses that can be handled by the IOMMUs in the system
Hello Joerg,
On 2020-07-10 14:31, Joerg Roedel wrote:
On Wed, Jul 01, 2020 at 12:46:31AM +0200, Sebastian Ott wrote:
The IVRS ACPI table specifies maximum address sizes for I/O virtual
addresses that can be handled by the IOMMUs in the system. Parse that
data from the IVRS header to provide ape
Hi Sebastian,
On Wed, Jul 01, 2020 at 12:46:31AM +0200, Sebastian Ott wrote:
> The IVRS ACPI table specifies maximum address sizes for I/O virtual
> addresses that can be handled by the IOMMUs in the system. Parse that
> data from the IVRS header to provide aperture information for DMA
> mappings
The IVRS ACPI table specifies maximum address sizes for I/O virtual
addresses that can be handled by the IOMMUs in the system. Parse that
data from the IVRS header to provide aperture information for DMA
mappings and users of the iommu API.
Changes for V2:
- use limits in iommu_setup_dma_ops()
-
10 matches
Mail list logo