Re: [Patch v1] iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu

2022-04-19 Thread Ashish Mhetre via iommu
On 4/20/2022 1:57 AM, Robin Murphy wrote: External email: Use caution opening links or attachments On 2022-04-17 10:04, Ashish Mhetre wrote: Tegra194 and Tegra234 SoCs have the erratum that causes walk cache entries to not be invalidated correctly. The problem is that the walk cache index

Re: [Patch v1] iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu

2022-04-19 Thread Robin Murphy
On 2022-04-17 10:04, Ashish Mhetre wrote: Tegra194 and Tegra234 SoCs have the erratum that causes walk cache entries to not be invalidated correctly. The problem is that the walk cache index generated for IOVA is not same across translation and invalidation requests. This is leading to page

Re: [Patch v1] iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu

2022-04-19 Thread Jon Hunter via iommu
On 17/04/2022 10:04, Ashish Mhetre wrote: Tegra194 and Tegra234 SoCs have the erratum that causes walk cache entries to not be invalidated correctly. The problem is that the walk cache index generated for IOVA is not same across translation and invalidation requests. This is leading to page

[Patch v1] iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu

2022-04-17 Thread Ashish Mhetre via iommu
Tegra194 and Tegra234 SoCs have the erratum that causes walk cache entries to not be invalidated correctly. The problem is that the walk cache index generated for IOVA is not same across translation and invalidation requests. This is leading to page faults when PMD entry is released during unmap